STP3LN80K5, STU3LN80K5

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1 Electrical ratings Electrical characteristics Electrical characteristics (curves)... 6

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100% avalanche tested Extremely high dv/dt capability Very low intrinsic capacitance Improved diode reverse recovery characteristics Zener-protected

Transcription:

N-channel 800 V, 2.75 Ω typ., 2 A MDmesh K5 Power MOSFET in TO-220 and IPAK packages Datasheet - production data TAB Features Order code V DS RDS(on) max ID TAB IPAK 3 2 1 TO-220 1 2 3 STP3LN80K5 800 V 3.25 Ω 2 A STU3LN80K5 Industry s lowest RDS(on) x area Industry s best FoM (figure of merit) Ultra-low gate charge 100% avalanche tested Zener-protected Figure 1: Internal schematic diagram G(1) D(2, TAB) Applications Switching applications Description These very high voltage N-channel Power MOSFET are designed using MDmesh K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. S(3) AM01476v1 Table 1: Device summary Order code Marking Package Packing STP3LN80K5 TO-220 3LN80K5 STU3LN80K5 IPAK Tube June 2016 DocID027716 Rev 2 1/15 This is information on a product in full production. www.st.com

Contents Contents 1 Electrical ratings... 3 2 Electrical characteristics... 4 2.1 Electrical characteristics (curves)... 6 3 Test circuits... 9 4 Package information... 10 4.1 IPAK package information... 10 4.2 TO-220 type A package information... 12 5 Revision history... 14 2/15 DocID027716 Rev 2

Electrical ratings 1 Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VGS Gate-source voltage ± 30 V ID Drain current (continuous) at TC = 25 C 2 A ID Drain current (continuous) at TC = 100 C 1.25 A ID (1) Drain current (pulsed) 8 A PTOT Total dissipation at TC = 25 C 45 W dv/dt (2) Peak diode recovery voltage slope 4.5 dv/dt (3) MOSFET dv/dt ruggedness 50 V/ns Tstg Tj Storage temperature range - 55 to 150 C Operating junction temperature range Notes: (1) Pulse width limited by safe operating area. (2) ISD 2 A, di/dt 100 A/µs; VDSpeak < V(BR)DSS, VDD = 640 V. (3) VDS 640 V. Table 3: Thermal data Value Symbol Parameter TO-220 IPAK Unit Rthj-case Thermal resistance junction-case 2.78 C/W Rthj-amb Thermal resistance junction-ambient 62.5 100 C/W Table 4: Avalanche characteristics Symbol Parameter Value Unit IAR Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax) 0.7 A EAS Single pulse avalanche energy (starting Tj = 25 C, ID = IAR; VDD = 50 V) 155 mj DocID027716 Rev 2 3/15

Electrical characteristics 2 Electrical characteristics (TC = 25 C unless otherwise specified) Table 5: On /off states Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS IDSS IGSS Drain-source breakdown voltage Zero gate voltage drain current Gate body leakage current ID = 1 ma, VGS = 0 V 800 V VDS = 800 V, VGS = 0 V 1 µa VDS = 800 V, VGS = 0 V, TC = 125 C (1) 50 µa VGS = ± 20 V, VGS = 0 V ±10 µa VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µa 3 4 5 V RDS(on) Notes: Static drain-source on-resistance (1) Defined by design, not subject to production test. VGS = 10 V, ID = 1 A 2.75 3.25 Ω Table 6: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance - 102 - pf Coss Output capacitance VDS = 100 V, f = 1 MHz, VGS = 0 V - 11 - pf Crss Reverse transfer capacitance - 0.1 - pf Cotr (1) Coer (2) Equivalent capacitance time related Equivalent capacitance energy related VDS = 0 to 640 V, VGS = 0 V - 20 - pf - 7 - pf RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 12 - Ω Qg Total gate charge VDD = 640 V, ID = 2 A, - 2.63 - nc Qgs Gate-source charge VGS = 10 V ( see Figure 17: "Test circuit for gate charge - 0.91 - nc Qgd Gate-drain charge behavior" ) - 1.53 - nc Notes: (1) Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS (2) Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS 4/15 DocID027716 Rev 2

Electrical characteristics Table 7: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD = 400 V, ID = 1 A, RG = 4.7 Ω, - 6.2 - ns VGS = 10 V ( see Figure 16: "Test tr Rise time - 7 - ns circuit for resistive load switching td(off) Turn-off delay time times" and Figure 21: "Switching - 30 - ns tf Fall time time waveform" ) - 26 - ns Table 8: Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current - 2 A ISDM (1) Source-drain current (pulsed) - 8 A VSD (2) Forward on voltage ISD = 2 A, VGS = 0 V - 1.5 V trr Qrr IRRM trr Qrr IRRM Notes: Reverse recovery time Reverse recovery charge Reverse recovery current Reverse recovery time Reverse recovery charge Reverse recovery current (1) Pulse width limited by safe operating area. (2) Pulsed: pulse duration = 300 µs, duty cycle 1.5%. ISD = 2 A, di/dt = 100 A/µs, VDD = 60 V ( see Figure 18: "Test circuit for inductive load switching and diode recovery times" ) ISD = 2 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 C, (see Figure 18: "Test circuit for inductive load switching and diode recovery times" ) - 210 ns - 0.8 µc - 7.6 A - 345 ns - 1.2 µc - 7.2 A Table 9: Gate-source Zener diode Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)GSO Gate-source breakdown voltage IGS = ± 1 ma, ID = 0 A 30 - - V The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry. DocID027716 Rev 2 5/15

Electrical characteristics 2.1 Electrical characteristics (curves) Figure 2: Safe operating area for TO-220 Figure 3: Thermal impedance for TO-220 Figure 4: Safe operating area for IPAK Figure 5: Thermal impedance for IPAK K CG34360 10 0 c 10-1 10-2 10-5 10-4 10-3 10-2 10-1 t p (s) Figure 6: Output characteristics Figure 7: Transfer characteristics 6/15 DocID027716 Rev 2

Figure 8: Gate charge vs gate-source voltage Electrical characteristics Figure 9: Static drain-source on-resistance Figure 10: Capacitance variations Figure 11: Source-drain diode forward characteristics Figure 12: Normalized gate threshold voltage vs temperature Figure 13: Normalized on-resistance vs temperature DocID027716 Rev 2 7/15

Electrical characteristics Figure 14: Normalized V(BR)DSS vs temperature Figure 15: Maximum avalanche energy vs starting TJ 8/15 DocID027716 Rev 2

Test circuits 3 Test circuits Figure 16: Test circuit for resistive load switching times Figure 17: Test circuit for gate charge behavior V DD RL V GS I G = CONST 100 Ω D.U.T. pulse width 2200 μf + 2.7 kω 47 kω V G 1 kω AM01469v10 Figure 18: Test circuit for inductive load switching and diode recovery times Figure 19: Unclamped inductive load test circuit Figure 20: Unclamped inductive waveform Figure 21: Switching time waveform DocID027716 Rev 2 9/15

Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 4.1 IPAK package information Figure 22: IPAK (TO-251) type A package outline 10/15 DocID027716 Rev 2

Package information Table 10: IPAK (TO-251) type A package mechanical data mm Dim. Min. Typ. Max. A 2.20 2.40 A1 0.90 1.10 b 0.64 0.90 b2 0.95 b4 5.20 5.40 B5 0.30 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 E 6.40 6.60 e 2.28 e1 4.40 4.60 H 16.10 L 9.00 9.40 L1 0.80 1.20 L2 0.80 1.00 V1 10 DocID027716 Rev 2 11/15

Package information 4.2 TO-220 type A package information Figure 23: TO-220 type A package outline 12/15 DocID027716 Rev 2

Package information Table 11: TO-220 type A mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.55 c 0.48 0.70 D 15.25 15.75 D1 1.27 E 10.00 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13.00 14.00 L1 3.50 3.93 L20 16.40 L30 28.90 øp 3.75 3.85 Q 2.65 2.95 DocID027716 Rev 2 13/15

Revision history 5 Revision history Table 12: Document revision history Date Revision Changes 09-Jul-2015 1 Initial release 28-Jun-2016 2 Updated title and features in cover page. Updated Section 1: "Electrical ratings". Updated Section 2: "Electrical characteristics". Added Section 2.1: "Electrical characteristics (curves)". Document status promoted from preliminary to production data. Minor text changes. 14/15 DocID027716 Rev 2

IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 2016 STMicroelectronics All rights reserved DocID027716 Rev 2 15/15