STC04IE170HV. Emitter switched bipolar transistor ESBT 1700V - 4A W. General features. Internal schematic diagrams. Description.

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Emitter switched bipolar transistor ESBT 1700V - 4A - 0.17 W General features Table 1. General features V CS(ON) I C R CS(ON) 0.7V 4A 0.17Ω High voltage / high current cascode configuration Low equivalent on resistance Very fast-switch, up to 150 khz 1 234 TO247-4L HV Squared RBSOA, up to 1700 V Very low C ISS driven by R G = 47 Ω Very low turn-off cross over time In compliance with the 2002/93/EC European Directive Internal schematic diagrams Description The is manufactured in Monolithic ESBT technology, aimed to provide the best performance in High Frequency / High voltage applications. It is designed for use in Gate Driven based topologies. Applications Aux SMPS for three phase mains Order codes Part Number Marking Package Packing C04IE170HV TO247-4L HV Tube November 2006 Rev 2 1/11 www.st.com 11

Contents 1 Electrical ratings............................................ 3 2..................................... 4 2.1 (curves)................................ 5 3 Package mechanical data..................................... 8 4 Revision history........................................... 10 2/11

Electrical ratings 1 Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit V CS(SS) Collector-source voltage (V BS =V GS =0V) 1700 V V BS(OS) Base-source voltage (I C =0, V GS =0V) 30 V V SB(OS) Source-base voltage (I C =0, V GS =0V) 17 V V GS Gate-source voltage ± 17 V I C Collector current 4 A I CM Collector peak current (t P < 5ms) 15 A I B Base current 2 A I BM Base peak current (t P < 1ms) 4 A P tot Total dissipation at T c 25 C 178 W T stg Storage temperature -40 to 150 C T J Max. operating junction temperature 150 C Table 3. Thermal data Symbol Parameter Value Unit R thj-case Thermal resistance junction-case max 0.7 C/W 3/11

2 (T case = 25 C unless otherwise specified) Table 4. Symbol Parameter Test Conditions Min. Typ. Max. Unit I CS(SS) I BS(OS) I SB(OS) I GS(OS) Collector-source current (V BS =V GS =0V) Base-source current (I C =0, V GS =0V) Source-base current (I C =0, V GS =0V) Gate-source leakage (V BS =0V) V CS(SS) =1700V 100 µa V BS(OS) =30V 10 µa V SB(OS) =17V 100 µa V GS = ± 17V 100 na V CS(ON) Collector-source ON voltage V GS =10V I C =4A I B =0.8A V GS =10V I C =1.5A I B =0.15A 0.7 0.6 1.5 1.4 V V h FE DC current gain V CS =1V V GS =10V I C =4A V CS =1V V GS =10V I C =1.5A 4 7 5.5 11 V BS(ON) Base-source ON voltage V GS =10V I C =4A I B =0.8A V GS =10V I C =1.5A I B =0.15A 1.3 0.9 1.5 1.1 V V V GS(th) Gate threshold voltage V BS =V GS I B =250µA 2 3 4 V C iss Input capacitance V CS =25V V GS =0V f =1MHz 510 pf Q GS(tot) Gate-source Charge V GS =10V 3.9 nc t s t f INDUCTIVE LOAD Storage time Fall time V GS =10V R G =47Ω V Clamp =1360V t p =4µs I C =2A I B =0.4A 770 10 ns ns t s t f INDUCTIVE LOAD Storage time Fall time V GS =10V R G =47Ω V Clamp =1360V t p =4µs I C =2A I B =0.2A 410 10 ns ns V CC =V Clamp =400V V CS(dyn) Collector-source dynamic voltage (500ns) V GS =10V I C =1.5A I B = 0.3A t peak =500ns R G =47Ω I Bpeak =3A (2I C ) 5.36 V 4/11

Table 4. Symbol Parameter Test Conditions Min. Typ. Max. Unit V CS(dyn) Collector-source dynamic voltage (1µs) V CC =V Clamp =400V V GS =10V I C = 1.5A I B = 0.3A t peak =500ns R G =47Ω I Bpeak = 3A (2I C ) 4.32 V V CSW Maximum collectorsource voltage switched without snubber R G =47Ω h FE =5 I C = 4A 1700 V Note (1) Pulsed duration = 300 µs, duty cycle 1.5% 2.1 (curves) Figure 1. Output characteristics Figure 2. Dynamic collector-source saturation voltage Figure 3. DC current gain Figure 4. Gate threshold voltage vs temperature 5/11

Figure 5. Collector-source On voltage Figure 6. Collector-source On voltage Figure 7. Base-source On voltage Figure 8. Base-source On voltage Figure 9. Inductive load switching time Figure 10. Inductive load switching time 6/11

Figure 11. Reverse biased safe operating area 7/11

Package mechanical data 3 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 8/11

Package mechanical data TO247-4L HV MECHANICAL DATA DIM. mm. MIN. TYP MAX. A 4.85 5.15 A1 2.20 2.50 2.60 A2 1.27 b 0.95 1.10 1.30 b2 2.50 2.90 c 0.40 0.80 D 23.85 24 24.15 D1 21.50 E 15.45 15.60 15.75 e 2.54 e1 5.08 L 10.20 10.80 L1 2.20 2.50 2.80 L2 18.50 L3 3 øp 3.55 3.65 S 5.50 7734874 9/11

Revision history 4 Revision history Table 5. Revision history Date Revision Changes 11-Sep-2006 1 First release. 21-Nov-2006 2 Improved application target. 10/11

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