Supporting Information. Air-stable surface charge transfer doping of MoS 2 by benzyl viologen

Similar documents
Semiconductor Physics and Devices

Supporting Information. Vertical Graphene-Base Hot-Electron Transistor

MoS 2 nanosheet phototransistors with thicknessmodulated

Transparent p-type SnO Nanowires with Unprecedented Hole Mobility among Oxide Semiconductors

Wu Lu Department of Electrical and Computer Engineering and Microelectronics Laboratory, University of Illinois, Urbana, Illinois 61801

Dominik Kufer and Gerasimos Konstantatos *

Gigahertz Ambipolar Frequency Multiplier Based on Cvd Graphene

photolithographic techniques (1). Molybdenum electrodes (50 nm thick) are deposited by

Supporting Information

Supporting Information. Epitaxially Aligned Cuprous Oxide Nanowires for All-Oxide, Single-Wire Solar Cells

Synthesis of Silicon. applications. Nanowires Team. Régis Rogel (Ass.Pr), Anne-Claire Salaün (Ass. Pr)

Supplementary Figure 1 Schematic illustration of fabrication procedure of MoS2/h- BN/graphene heterostructures. a, c d Supplementary Figure 2

Major Fabrication Steps in MOS Process Flow

Supporting Information. Atomic-scale Spectroscopy of Gated Monolayer MoS 2

SUPPLEMENTARY INFORMATION

INTRODUCTION: Basic operating principle of a MOSFET:

Notes. (Subject Code: 7EC5)

Low-power carbon nanotube-based integrated circuits that can be transferred to biological surfaces

Record I on (0.50 ma/μm at V DD = 0.5 V and I off = 100 na/μm) 25 nm-gate-length ZrO 2 /InAs/InAlAs MOSFETs

High-Speed Scalable Silicon-MoS 2 P-N Heterojunction Photodetectors

Reconfigurable Complementary Monolayer MoTe2. Field-Effect Transistors for Integrated Circuits. Supporting Information

ECE 5745 Complex Digital ASIC Design Topic 2: CMOS Devices

NAME: Last First Signature

SUPPLEMENTARY INFORMATION

GRADE Graphene-based Devices and Circuits for RF Applications Collaborative Project

Supplementary information for Stretchable photonic crystal cavity with

Solid State Device Fundamentals

Ultra High-Speed InGaAs Nano-HEMTs

Supporting Information for

Supplementary Information

EE 5611 Introduction to Microelectronic Technologies Fall Thursday, September 04, 2014 Lecture 02

Supporting Information. Single-Nanowire Electrochemical Probe Detection for Internally Optimized Mechanism of

Esaki diodes in van der Waals heterojunctions with broken-gap energy band alignment

5. Lithography. 1. photolithography intro: overall, clean room 2. principle 3. tools 4. pattern transfer 5. resolution 6. next-gen

SUPPLEMENTARY INFORMATION

Fabrication and Characterization of Pseudo-MOSFETs

Supporting Information

Analog Synaptic Behavior of a Silicon Nitride Memristor

Organic Electronics. Information: Information: 0331a/ 0442/

UNIT-VI FIELD EFFECT TRANSISTOR. 1. Explain about the Field Effect Transistor and also mention types of FET s.

Atomic-layer deposition of ultrathin gate dielectrics and Si new functional devices

SUPPLEMENTARY INFORMATION

Supplementary Figure 1. Schematics of conventional vdw stacking process. Thin layers of h-bn are used as bottom (a) and top (b) layer, respectively.

Digital Electronics. By: FARHAD FARADJI, Ph.D. Assistant Professor, Electrical and Computer Engineering, K. N. Toosi University of Technology

3-D Modelling of the Novel Nanoscale Screen-Grid Field Effect Transistor (SGFET)

Nanofluidic Diodes based on Nanotube Heterojunctions

Depletion-mode operation ( 공핍형 ): Using an input gate voltage to effectively decrease the channel size of an FET

Supporting Information

Department of Electrical Engineering IIT Madras

Three Terminal Devices

CHAPTER 9 CURRENT VOLTAGE CHARACTERISTICS

Transistor was first invented by William.B.Shockley, Walter Brattain and John Bardeen of Bell Labratories. In 1961, first IC was introduced.

Nano-structured superconducting single-photon detector

Lecture #29. Moore s Law

High-speed logic integrated circuits with solutionprocessed self-assembled carbon nanotubes

Section 2: Lithography. Jaeger Chapter 2 Litho Reader. EE143 Ali Javey Slide 5-1

Experiment 3. 3 MOSFET Drain Current Modeling. 3.1 Summary. 3.2 Theory. ELEC 3908 Experiment 3 Student#:

Supplementary information for

Transistor Characteristics

Depletion width measurement in an organic Schottky contact using a Metal-

Design and Analysis of Double Gate MOSFET Devices using High-k Dielectric

End-of-line Standard Substrates For the Characterization of organic

Scaling of InGaAs MOSFETs into deep-submicron regime (invited)

Supplementary Materials for

Future MOSFET Devices using high-k (TiO 2 ) dielectric

value of W max for the device. The at band voltage is -0.9 V. Problem 5: An Al-gate n-channel MOS capacitor has a doping of N a = cm ;3. The oxi

Performance Evaluation of MISISFET- TCAD Simulation

MOSFET short channel effects

Han Liu, Adam T. Neal, Yuchen Du and Peide D. Ye

We are right on schedule for this deliverable. 4.1 Introduction:

discovery in 1993 [1]. These molecules are interesting due to their superparamagneticlike

EFM Ec. a) Sketch the electrostatic potential inside the semiconductor as a function of position.

Lecture 0: Introduction

Structural, optical, and electrical properties of phasecontrolled cesium lead iodide nanowires

Parylene-Based Double-Layer Gate Dielectrics for

EE143 Fall 2016 Microfabrication Technologies. Lecture 3: Lithography Reading: Jaeger, Chap. 2

MOS Field-Effect Transistors (MOSFETs)

Quantum Condensed Matter Physics Lecture 16

MOSFET & IC Basics - GATE Problems (Part - I)

InGaAs MOSFETs for CMOS:

Performance advancement of High-K dielectric MOSFET

Section 2: Lithography. Jaeger Chapter 2 Litho Reader. The lithographic process

Project Staff: Feng Zhang, Prof. Jianfeng Dai (Lanzhou Univ. of Tech.), Prof. Todd Hasting (Univ. Kentucky), Prof. Henry I. Smith

Integrated Focusing Photoresist Microlenses on AlGaAs Top-Emitting VCSELs

Logic circuits based on carbon nanotubes

2014, IJARCSSE All Rights Reserved Page 1352

Normally-Off Operation of AlGaN/GaN Heterojunction Field-Effect Transistor with Clamping Diode

SUPPLEMENTARY INFORMATION

Fabrication and Characterization of Pseudo-MOSFETs

Supplementary Materials for

CHAPTER 3 TWO DIMENSIONAL ANALYTICAL MODELING FOR THRESHOLD VOLTAGE

Integrated into Nanowire Waveguides

Effective Channel Mobility of AlGaN/GaN-on-Si Recessed-MOS-HFETs

Supplementary Information. Zn doped p type Gallium Phosphide Nanowire Photocathodes from a. Surfactant free Solution Synthesis

Lecture-45. MOS Field-Effect-Transistors Threshold voltage

Metal Oxide Nanowires: : Synthesis, Characterization and Device Applications

Fabrication of a submicron patterned using an electrospun single fiber as mask. Author(s)Ishii, Yuya; Sakai, Heisuke; Murata,

MODULE-2: Field Effect Transistors (FET)

Section 2: Lithography. Jaeger Chapter 2. EE143 Ali Javey Slide 5-1

Zota, Cezar B.; Lindelow, Fredrik; Wernersson, Lars Erik; Lind, Erik

Transcription:

Supporting Information Air-stable surface charge transfer doping of MoS 2 by benzyl viologen Daisuke Kiriya,,ǁ, Mahmut Tosun,,ǁ, Peida Zhao,,ǁ, Jeong Seuk Kang, and Ali Javey,,ǁ,* Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, California 94720, United States Materials Sciences Division, Lawrence Berkeley National Laboratory, Berkeley, California 94720, United States ǁ Berkeley Sensor and Actuator Center, University of California, Berkeley, California 94720, United States * ajavey@berkeley.edu S1

Synthesis of BV molecule and doping method The preparation of the BV solution is done via the method described in reference (ref.19 in manuscript). Briefly, benzyl viologen dichloride (5~25 mg, Sigma-Aldrich) was dissolved into Milli-Q water (5 ml) followed by adding toluene (5 ml) to make a bilayer. Sodium borohydride (~3.7 g, Sigma-Aldrich) was added to the water/toluene bilayer solution which was then kept for one day. The top toluene layer was then extracted and used for doping. The MoS 2 doping was performed by either drop-casting the BV solution onto the device substrate or immersion of the device substrate into the BV solution for 12 hours. Both approaches gave similar results. After that, N 2 gas was then used to remove extra amount of molecule and solvent. Fabrication of the devices All devices are fabricated with standard lithographic techniques using S1818 photoresist for photolithography (for devices shown in Fig. 2d an Fig. S1b) and PMMA for electron beam lithography. The gate oxide of the top gated device consists of a 1 nm thick SiO x layer deposited via electron beam evaporation followed by a 20 nm thick ZrO 2 layer deposited via atomic layer deposition at 110 C (Cambridge Nano Tech). The SiO x layer was used as a nucleation layer for ALD of ZrO 2. The gate-stack was made by electron beam lithography, deposition of SiO x /ZrO 2 gate dielectric, evaporation of the metal gate, followed by the lift-off of the entire gate stack in acetone. Source, drain, and gate metals were all deposited via electron beam evaporation. Characterization Microscope images were taken using an Olympus BX51 microscope equipped with a digital camera (Olympus, QCOLOR3). All electrical characterizations were carried out with an HP 4155C analyzer with a probe station. The low temperature electrical characterization was carried out with cryogenic probe station (Lake Shore) with a Lake Shore 332 temperature controller. Raman spectroscopy was conducted with HORIBA LabRAM HR800. We used 532 nm excitation wavelength and 10 sec exposure (two integration times) for the measurement shown in Figure 2c. Temperature dependency of the I DS -V GS for the BV doped device In addition to testing in an ambient environment shown in Figures 2 and 3, the electronic properties of the BV-doped MoS 2 were also explored in vacuum and at low temperatures. A small increase in the current was observed after placing the sample under vacuum (1 10-5 Torr, Fig. S3), which can be attributed to a reduction in the work function of the S/D metal electrodes (Ni/Au) via removal of gases such as O 2. Figure S4a shows the temperature dependence of the transfer curves under high vacuum. A monotonic increase of the on-current level is observed as the temperature was decreased for the BV doped sample (Fig. S4a). Figure S4b shows the temperature dependence of the transconductance calculated from V G = 20 to 40 V; the transconductance increases as the temperature is decreased from 297 to 100 K. For Schottky contacted devices, the current injection over the Schottky barrier (SB, thermionic emission in Fig. S4c) at the source decreases at lower S2

temperatures. This was previously observed in undoped TMDC devices, which is indicative of the SB nature of the devices, suggesting that the current of the device is limited by the contact resistance and not the channel resistance. The BV doped samples, on the other hand, exhibit opposite trend with enhanced conductance at lower temperatures. In our BV doped device, the thermionic emission is not the dominant mechanism of current injection given the thinning of the barrier by degenerate doping of MoS 2 (Fig. S4d). Instead, the current in our device is limited by phonon scattering in the MoS 2 channel which has an inverse relationship to temperature, consistent with the temperature dependent results. The data clearly depicts ohmic contact formation with BV doping. S3

Supporting Figures Figure S1. Transfer characteristic curves of a device with a (a) quad-layered flake and (b) a thick MoS 2 flake channel (shown in the inset picture, thickness of the flake is ~150 nm) before and after BV-doping. Both devices exhibit effective n-doping of MoS 2 by BV coverage. Furthermore, both devices exhibit excellent stability in ambient air. S4

Figure S2. (a) Transfer characteristic curves and (b) resistance versus channel length for a MoS 2 flake with Ni/Au contacts before BV doping (undoped). (c) Transfer characteristic curves and (d) resistance versus channel length at V GS = 0 V for the same MoS 2 after BV doping. S5

Figure S3 The transfer characteristic curves of a BV-doped MoS 2 sample under high vacuum (1 10-5 Torr). Dashed lines are the curves in vacuum and solid lines are in air with V DS = 0.05 (pink) and 1 V (orange). S6

Figure S4 (a) Temperature dependence of the transfer characteristic curves from room temperature (297 K) to 100 K for the same flake shown in Figure 2b. Monotonic increase of the on-current was observed as the temperature was decreased. The applied drain voltage is V DS = 0.05 V. (b) Temperature dependence of the transconductance obtained from the slope of the transfer curves for V G = 20 to 40. (c) A qualitative energy diagram between Ni/Au metal source (S) and MoS 2 flake for the undoped sample. Tunneling current is low because the Schottky barrier width (W undoped ) is thick. (d) A qualitative energy diagram for the BV-doped MoS 2 sample. Due to the thin Schottky width (W doped ), electrons can tunnel directly through the barrier, resulting in ohmic contact formation. S7

Figure S5. Output characteristic curves of the top-gated MoS 2 device shown in Figure 4 of the main text before BV doping (a) with the back-gate grounded (V BG = 0 V) and (b) with a back gate voltage of V BG = 40 V. Output curves are measured in 0.3 V increments. S8

Figure S6 (a) Transfer characteristic curves of the top-gated FET with BV-doped (n + ) source/drain contacts after keeping in air for 2 days. (b) Output characteristic curves of the device shown in (a). The top gate bias was applied in 0.25 V increments. (c) Transfer characteristic curves of the top gate device before BV doping and (d) after toluene immersion of the BV-doped device to remove BV dopant under V DS = 50 mv (blue and pink) and 1 V (purple and orange). S9