THERE IS a demand for millimeter-wave and

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 47, NO. 4, APRIL 1999 419 A High-Power Fixed-Tuned Millimeter-Wave Balanced Frequency Doubler David W. Porterfield, Member, IEEE, Thomas W. Crowe, Senior Member, IEEE, Richard F. Bradley, Member, IEEE, and Neal R. Erickson Abstract We report on the design and evaluation of a 40 80-GHz (40/80-GHz) high-power wide-band fixed-tuned balanced doubler. The active device is a single GaAs chip comprising a linear array of six planar Schottky varactors. The varactors and a quartz microstrip circuit are embedded in a split waveguide block. We have achieved a measured 3-dB fixed-tuned bandwidth of 17% and measured flange-to-flange peak efficiency of 48% at an input-power level of 200 mw. The doubler operates at near-peak efficiency (45%) at an input power of 250 mw. We have cooled the block to 14 K and achieved an efficiency of 61% at an input-power level of 175 mw and an efficiency of 48% at an input-power level of 365 mw. Emphasis has been placed on making the design easy to fabricate and scalable to higher frequencies. Index Terms Balanced doubler, finite-element method, frequency multiplier, HFSS, varactor. Fig. 1. Balanced frequency-doubler schematic. I. INTRODUCTION THERE IS a demand for millimeter-wave and submillimeter-wave power sources, primarily for use as local oscillators in heterodyne radiometers for remote sensing, atmospheric physics, and radio astronomy. An ideal source for most of these applications, and particularly for those which involve space qualification, would exhibit high output power and efficiency, large electronically tuned bandwidth (fixed mechanical tuning), high tolerance to mechanical and thermal stress, high reliability, low noise, low mass, and low cost. Systems using frequency multipliers based on GaAs Schottky varactors and a fundamental oscillator, such as a Gunneffect diode, have been used to achieve some of these goals. Until very recently, the most successful millimeter-wave multipliers relied on whisker-contacted GaAs varactors to minimize shunt capacitances for high-frequency operation [1]. However, high-quality planar varactors have recently been developed [2] and incorporated into successful millimeter-wave multipliers [3], [4]. These systems are mechanically reliable and exhibit high efficiency and power handling. Unfortunately, these systems have limited fixed-tuned bandwidth and are challenging to assemble. Manuscript received January 21, 1998; revised May 20, 1998. This work was supported by the U.S. Army National Ground Intelligence Center under Contract DAHC90-96-C-0010, under NASA Grant NAGW-4007, under NASA Grant NAG5-6084, and under NASA Grant NGT-51326. D. W. Porterfield and T. W. Crowe are with the Department of Electrical Engineering, University of Virginia, Charlottesville, VA 22903 USA. R. F. Bradley is with the National Radio Astronomy Observatory, Central Development Laboratory, Charlottesville, VA 22903 USA. N. R. Erickson is with the Five College Radio Astronomy Observatory, University of Massachusetts, Amherst, MA 01003 USA. Publisher Item Identifier S 0018-9480(99)02997-X. Our 40/80-GHz balanced doubler design is derived from a prototype 80/160-GHz balanced doubler reported by Erickson [1], [3], [4]. Balanced doublers use electromagnetic (EM) mode orthogonality to isolate the input and output frequency circuits and, thus, do not require distributed filters which are lossy and tend to degrade the multiplier bandwidth. One way to achieve orthogonal input and output frequency modes in a balanced doubler is by placing an even number of varactors in antiseries at the junction between a balanced and unbalanced transmission line, as shown in Fig. 1. If the incident power at frequency is in a balanced mode, then the output radiation at is generated in an unbalanced mode. The prototype 80/160-GHz multiplier [1] achieved record output power and efficiency at 160 GHz. The design incorporated two whisker-contacted varactors mounted on a machined cylindrical metal pin. The pin acted as an output waveguide probe, low-pass filter, dc-bias line and center conductor in a quasi-coaxial structure that supported a transverse electromagnetic (TEM) mode. A successful modification was made to the design [3], [4] by replacing the two whisker-contacted varactors with a planar varactor chip. This modification increased the mechanical reliability of the multiplier and resulted in higher output power and efficiency. The following are four important advantages in the prototype 80/160-GHz balanced multiplier: 1) balanced design eliminates the need for lossy distributed filters; 2) rectangular waveguides and the coaxial line have low loss; 3) dc bias is easily provided to the varactors through the metal pin; 0018 9480/99$10.00 1999 IEEE

420 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 47, NO. 4, APRIL 1999 Fig. 2. 40/80-GHz planar balanced frequency doubler. The exploded view shows the planar varactor chip, which is facing up for illustrative purposes. 4) design is amenable to the use of multiple varactors in a planar package, resulting in high-power handling and reliability. There are also, however, two important limitations: 1) it is difficult to mount the pin in the waveguide block and to solder the varactor chip to the pin and 2) the output frequency-matching circuit is limited by the pin geometry resulting in a rather narrow fixed-tuned bandwidth. A pair of Teflon transformers located in the input and output waveguides improve the multiplier efficiency by providing a wide range of mechanical tuning. However, these transformers cannot be adjusted during operation. Also, the transformers are located some distance away from the varactors, which further compromises the instantaneous bandwidth. In the new 40/80-GHz doubler design, we kept all of the important advantages of the prototype 80/160-GHz multiplier while significantly increasing the fixed-tuned bandwidth and making the multiplier easier to machine and assemble. II. OVERVIEW OF THE IMPROVED 40/80-GHz DESIGN Fig. 2 shows a sketch of the 40/80-GHz planar balanced doubler. There are no adjustable mechanical tuners in this design, but rather a fixed indium backshort. We replaced the metal pin in the 80/160-GHz prototype design with a quartz substrate. The center conductor for the TEM line, an output waveguide probe, and a radio-frequency (RF) blocking filter for the dc-biasing network are photolithographically formed on the quartz substrate. This allows for a high degree of flexibility and control of the center conductor dimensions and, therefore, substantial control over the embedding impedance at the output frequency. Another advantage is the ease and low cost of producing the quartz circuits in large numbers. The input radiation is incident on the varactors in a balanced mode ( ) in reduced-height -band waveguide. However, the input radiation can propagate beyond the varactor chip toward the -band output waveguide. EM simulations using Hewlett-Packard s high-frequency structure simulator (HFSS) show that the center conductor and quartz dielectric in this quasi-coaxial region only slightly perturb the mode. At a point between the varactor chip and output waveguide, the width of the quasi-coaxial waveguide section is sufficiently reduced to cutoff propagation of the fundamental frequency, creating an effective input frequency backshort. The reduced-width section, more appropriately termed as enclosed suspended microstrip, extends to the output waveguide. The position of the backshort and length of the reduced-height waveguide section between the varactors and the full-height input waveguide are design parameters that were used to obtain an acceptable input frequency embedding impedance. The output frequency is generated by the varactors in an unbalanced TEM mode and is free to propagate to the output waveguide. However, there are a number of propagating modes supported by the input waveguide at the output frequency. The lowest order of these modes, which can couple to the output frequency TEM field distribution, is the. The mode can be cutoff by sufficiently reducing the input waveguide height and, thus, the output frequency radiation is restricted to the output circuit. The machining of the block, formation of the backshort, and mounting of the varactor chip and circuit are relatively simple. Two bond wires (1 mil) are attached to pads along the outer edge of the quartz circuit and a dc bias wire is soldered to the opposite end of the circuit. The varactor chip is then soldered 1 at each end to the bond-wire pads and additionally to a third pad provided at the center conductor. The entire circuit is then placed in the split waveguide block, the two bond wires are soldered to the block, and the bias wire is soldered to a dc feed. III. DESIGN METHODOLOGY The harmonic-balance analysis described in [5], Hewlett- Packard s microwave design system (MDS), and the harmonic analysis of Penfield Rafuse [6] were used to determine a range of optimum embedding impedances for maximum doubler efficiency. The embedding impedances provided by the distributed circuit are frequency dependent and the embedding impedances required for optimum multiplier efficiency are dependent on frequency and on semiconductor device parameters. With about 200 mw of available power in the 35 45-GHz band, our goal was to maximize the power output of the doubler in the corresponding 70 90-GHz band. Power handling in Schottky varactors is determined mainly by the epitaxial doping, anode size, number of varactors on the chip, and thermal properties. Power handling can be increased by lowering the epitaxial-layer doping since this will lead to larger reverse breakdown voltage. However, decreasing the epitaxial doping increases the series resistance resulting in more power dissipation in the varactor, lower multiplier efficiency, and higher ambient temperatures, which can ultimately lead to increased failure rates. For a given epitaxial doping, larger anodes can handle more power, but the required embedding impedances are inversely proportional to anode size, and 1 Indalloy #1, Indium Corporation of America, Utica, NY, 13503.

PORTERFIELD et al.: HIGH-POWER FIXED-TUNED MMW BALANCED FREQUENCY DOUBLER 421 Fig. 3. UVA-type SB13T1 linear varactor array comprising six Schottky varactors. there are practical limits on the range of impedances that can be matched. Stacking varactors in series increases the power-handling capability and increases the impedance of the varactor circuit. However, stacking is limited by the physical size of the reduced-height waveguide where the chip is mounted. Velocity saturation was another factor in choosing the epitaxial-layer doping [7]. The maximum current in the undepleted epitaxial region can be calculated based on the maximum average electron velocity, epitaxial doping, charge of an electron, and the anode cross-sectional area,. The maximum average electron velocity for GaAs is approximately 2 10 m/s. At higher frequencies, it is necessary to reduce the anode diameter to reduce the net capacitance and, thus, it may be necessary to increase the epitaxial layer doping to forestall the onset of velocity saturation. We chose a linear array of six varactors with an epitaxial layer doping of 1 10 cm and a buffer layer thickness of 8 m, the skin depth for GaAs at 40 GHz. The varactors, designated as type SB13T1, were fabricated at the University of Virginia (UVA) Semiconductor Device Laboratory, Charlottesville. Fig. 3 shows a scanning electron micrograph of the SB13T1 planar varactor chip. The finger lengths are 50 m, the ohmic contact pads are 3200 m, and the semiinsulating GaAs substrate is 75- m thick. The overall chip dimensions are 800 m 90 m 75 m. Three versions of the SB13T1 chip were fabricated with anode diameters of 12, 13, and 14 m. We calculated a series resistance of 0.8 per varactor (13- m anodes), which includes contributions from the spreading resistance, epitaxial layer resistance, substrate resistance, and resistance in the ohmic contacts [8]. There is some degree of uncertainty in the series resistance calculation. Measured values at dc tended to be closer to 1.2, and RF values may be even higher due to skin effects. The series resistance could be further elevated due to heating. The reverse-breakdown voltage was measured to be approximately 14 V at 1- A reverse current. Using the specified doping levels and anode sizes for the SB13T1, we calculated greater than 400 ma, while harmonic-balance simulations for this varactor indicate peak currents of approximately 90 ma at an input-power level of 200 mw. We used HFSS and MDS to model all parts of the waveguide block, quartz circuit, and varactor chip. HFSS ports were attached to probes at each anode to calculate the individual varactor embedding impedances. A large number of geometrical perturbations of the waveguide, varactor chip, and quartz circuit were analyzed in HFSS and MDS to determine a range of embedding impedances that could be provided by each configuration. The calculated circuit-impedance data were compared to the optimum varactor embedding-impedance data, Fig. 4. Optimum and HFSS calculated embedding impedances for the 40/80-GHz balanced doubler circuit. and a circuit and block design which provided the best match over the widest bandwidth was chosen. A sample of the optimum and calculated embedding impedances is shown in Fig. 4. The embedding impedances change slowly with frequency and, thus, a relatively large bandwidth is achieved without using mechanical tuners. The circuit, block, and backshort were fabricated according to the HFSS simulation geometry. Most of the HFSS modeling was done with lossless materials to substantially reduce the finite-element convergence time and memory requirements. HFSS simulations indicated that the return loss for the transition from the suspended microstrip to the output waveguide [9] was better than 25 db across the band from 70 to 90 GHz. IV. MEASURED PERFORMANCE AT 290 K Power levels were measured using HP437 meters with - and -band power sensors. Since the doubler block incorporated an -band output waveguide flange, an waveguide adapter was used. The reference planes for all power measurements were the input waveguide flange on the doubler block and the -band flange on the waveguide adapter at the output. No corrections were made for losses within the multiplier block or in the external waveguide adapter. The graph in Fig. 5 shows measured output power and efficiency versus input power for varactors with 12- and 13- m anodes. The quartz circuit was the same in both cases. The peak efficiency was 48% at 82 GHz for the varactor chip with 12- m anodes and 46% at 78 GHz for the varactor chip with 13- m anodes. Input power was provided from a Gunneffect oscillator capable of delivering over 200 mw in the 37 43-GHz band and from several klystrons operating in the 35 45-GHz band with output power typically in excess of 300 mw. Fig. 6 shows measured output power versus output frequency for the same 12- and 13- m anode varactors. The input power for these measurements was 200 mw. Tuning was provided through an external electronic dc-bias supply. The measured 3-dB fixed-tuned bandwidth of 17% is typical for this version of the quartz circuit.

422 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 47, NO. 4, APRIL 1999 Fig. 5. Measured output power and efficiency versus input power for two different varactor chips. Fig. 8. Measured dc current and bias voltage versus output frequency for the 13-m anode chip. Fig. 6. Measured output power versus output frequency for an input-power level of 200 mw. levels were typically less than 1% of the incident power at the center of the band, indicating a good input impedance match. The quality of the output impedance match was evaluated by attaching a 1-in section of -band waveguide to the doubleroutput waveguide flange, inserting a Teflon quarter-wave transformer, and measuring the output power as a function of the transformer position. The input-power level was held constant at 200 mw. The output power was measured to be 94 mw prior to the insertion of the Teflon. With the Teflon transformer inserted in the output waveguide, the measured output-power extrema were 72 and 85 mw. Using this data, we calculated the standing-wave ratio (SWR) in the output waveguide to be less than 1.6 (without the Teflon transformer), indicating a very good output impedance match. This calculation assumes that the available output power from the doubler is constant and is unperturbed by the transformer position. A graph of measured dc-bias voltage and current versus output frequency is shown in Fig. 8. These curves were obtained from measurements with the 13- m anode chip and 200-mW input power, but are typical for the six chips we evaluated. The voltages and currents shown in Fig. 8 are those measured at the dc supply and, thus, the voltage across each varactor is one-third that shown in the graph, and the current through each varactor is one-half that shown in the graph. The graph in Fig. 6 shows that the peak efficiency for this varactor occurred at 78 GHz. At this frequency, the bias current through each varactor was 100 A. Forcing the dc current to zero resulted in only a very small degradation in efficiency. Fig. 7. Measured input-power reflection coefficient versus output frequency at Pin =200mW. Fig. 7 shows the measured input reflected power versus output frequency for the 12- and 13- m anode chips. The reflected power measurements were made with an HP8565E spectrum analyzer through a directional coupler. The spectrum analyzer was also used to monitor the input frequency. Reflected power V. COMPARISON OF SIMULATED AND MEASURED DATA The waveguide and circuit losses were estimated using HFSS port solves at each distinct cross section in the block. The electrical conductivity of Au and the loss tangent of quartz were taken to be 4.1 S/m 10 S/m and 10, respectively. No corrections were made for conductor surface roughness, although actual measured waveguide losses are typically much higher than those based on conductivity and skin depth [10]. The loss in the E W waveguide adapter was measured using an HP8510 vector network analyzer. The waveguide probe, hammerhead filter, and indium backshort

PORTERFIELD et al.: HIGH-POWER FIXED-TUNED MMW BALANCED FREQUENCY DOUBLER 423 TABLE I ESTIMATED WAVEGUIDE AND CIRCUIT LOSSES BASED ON Au CONDUCTIVITY AND QUARTZ LOSS TANGENT Fig. 10. Simulated and measured output power and dc current versus input power at 82 GHz. Fig. 9. Simulated and measured output power versus output frequency at Pin =200 mw. losses were estimated using a full HFSS adaptive analysis. The results are summarized in Table I. Two measured output-power curves and three simulated output-power curves are shown in Fig. 9. The measured curves are the same as shown in Fig. 6. The simulated curves were generated using a harmonic-balance analysis with an input power of 200 mw, zero biased junction capacitance of 140 ff, and the circuit embedding impedances calculated by HFSS. The peak simulated output power of 145 mw occurred using the calculated series resistance of 0.8 per varactor and the estimated external circuit losses of 0.42 db. The discrepancy between the peak output power of this simulated curve and the measured peak output power is 1.8 db. The two remaining simulated curves in Fig. 9 were generated by introducing additional loss mechanisms sufficient to equate the simulated to the measured output power. In one case, this was done by using a series resistance of 2.5. In the second case, the calculated 0.8- series resistance and a total of 2.2 db in unspecified external circuit losses were used. The actual losses probably result from a combination of both mechanisms. The following are three additional factors which may reduce the multiplier efficiency. 1) Some power may get converted to higher harmonics. 2) The real part of the embedding impedance is actually somewhat higher than the simulated values due to circuit losses. 3) There is a small imbalance in the embedding impedances for varactors near the center conductor and varactors near the waveguide walls. HFSS simulations indicate that the imbalance is negligible for the mode at the input frequency, but is slightly more pronounced for the radially dependent EM field distribution at the output frequency. It may be possible to reduce the effect by altering the spacing between the varactors. There is a discrepancy in the peak frequency of the measured and simulated data in Fig. 9. The simulated data was generated using a zero biased junction capacitance of 140 ff, which corresponds to an anode diameter of 13 m and epitaxial layer doping of 1 10 cm. However, the simulated peak frequency of 82 GHz corresponds to the measured peak frequency for the 12- m anodes. We attribute this discrepancy to uncertainties in the actual varactor anode diameter and epitaxial layer doping. Fig. 10 contains several plots of simulated and measured output power and dc current versus input power. The three simulated results were obtained using the calculated embedding impedances from HFSS and the estimated series resistance of 0.8 per varactor. The measured output-power data for the 12- m anode chip is the same as shown in Fig. 5. Again, good agreement is obtained between the simulated and measured data when an additional 2.2 db of loss is included. For input powers in the range of 200 250 mw, there is an inflection in the simulated output-power curves, which coincides with an inflection in the measured data. Parametric oscillation can be ruled out as a cause for the inflection since the harmonic-balance simulations do not model this effect. We interpret this inflection as a crossover between two operating regimes. For input-power levels below 200 mw, optimum efficiency is achieved by steadily increasing the reverse bias voltage as the input power increases. In this regime, the dc current remains near zero (indicating a varactor mode of

424 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 47, NO. 4, APRIL 1999 Fig. 11. Measured output power and efficiency versus input power for the 13-m anode chip at 14 K. operation) and the bias voltage essentially tunes the average varactor capacitance to yield the best impedance match to the circuit. For input-power levels above 250 mw, the optimum operating point is dominated by the need to minimize power dissipation in the series and junction resistances. Fig. 12. Measured efficiency versus input power for various block temperatures. The output frequency is 78 GHz. VI. MEASURED PERFORMANCE AT CRYOGENIC TEMPERATURES For many applications, particularly in radio astronomy, it may be feasible to cool the multiplier. For these applications, it is necessary to determine the temperature dependence of the multiplier output power, efficiency, and bandwidth, and to determine if the multiplier can survive thermal cycling. Only a minor temperature dependence is expected in the circuit losses and embedding impedances. However, the electron mobility in GaAs has a strong temperature dependence. There is a peak in the electron mobility near 100 K for an epitaxial doping of 1 10 cm [11], [12]. Since the series resistance is inversely proportional to the electron mobility, an increase in multiplier efficiency is expected at cryogenic temperatures [13]. A reduction in dissipated power in the varactor will also improve the reliability of the multiplier. The cryogenic performance of the doubler was measured at the National Radio Astronomy Observatory s Central Development Laboratory, Charlottesville, VA. A dewar was outfitted with waveguides and vacuum windows at both the input and output frequencies. These components were calibrated by measuring the insertion loss as a function of temperature. The input and output-power measurements shown below are referred to the waveguide flanges on the doubler block. The specified temperatures are referenced to the multiplier block. The Schottky junction temperatures are expected to be somewhat higher due to power dissipation in the device. Fig. 11 shows a measured efficiency of 61% at 78 GHz for an inputpower level of 150 mw and block temperature of 14 K. The efficiency rolls off to 48% at an input power of 365 mw ( mw). Fig. 12 shows measured efficiency versus input power at four different temperatures. There is an increase in efficiency from 46% at 295 K to 61% at 14 K. Also, the input-power Fig. 13. Measured efficiency versus frequency at block temperatures of 295 K and 14 K. level for peak efficiency drops as the block temperature is decreased. Both of these phenomena are probably attributable to the temperature-dependent electron mobility in GaAs. The fixed-tuned 3-dB multiplier bandwidth is largely dependent on the embedding impedances provided by the circuit. Since these impedances have only a very small temperature dependence, the fixed-tuned bandwidth is not expected to have a strong temperature dependence. The two plots in Fig. 13 show measured efficiency for the 13- m anode chip as a function of frequency at block temperatures of 295 K and 14 K. The input power in both cases was held constant at 200 mw. The fixed-tuned 3-dB bandwidth for both curves is approximately 17%. VII. CONCLUSIONS We have designed and evaluated a high-power wide-band fixed-tuned 40/80-GHz balanced frequency doubler. The doubler uses a single GaAs chip comprising a linear array of six planar Schottky varactors. The varactor chip and a quartz circuit are housed in a split waveguide block.

PORTERFIELD et al.: HIGH-POWER FIXED-TUNED MMW BALANCED FREQUENCY DOUBLER 425 With the waveguide block at room temperature, the measured 3-dB fixed-tuned bandwidth was 17% for an input power of 200 mw. The peak efficiency of 48% occurred at an output frequency of 82 GHz and input power of 200 mw. We compared the measured results to harmonic-balance simulations using the calculated embedding impedances from HFSS. The measured fixed-tuned bandwidth of 17% was in excellent agreement with the simulated bandwidth and the measured peak output power was within 1.8 db of the simulated result. The 1.8-dB discrepancy between the measured and simulated results may be due to additional circuit losses and an elevated temperature-dependent series resistance in the varactors. We also evaluated the multiplier at cryogenic temperatures in a calibrated dewar. The measured efficiency was 61% at an input power of 150 mw and a block temperature of 14 K. The efficiency dropped to 48% at an input power of 365 mw ( mw). The 175-mW output-power level should be sustainable at cryogenic temperatures. The 3-dB output-power bandwidth was approximately 17% at both 14 K and 295 K, and exhibited only a weak temperature dependence. ACKNOWLEDGMENT The authors would like to acknowledge W. L. Bishop, University of Virginia, Charlottesville, for designing the SB13T1 mask set and fabricating the varactors. REFERENCES [1] N. Erickson, High efficiency submillimeter frequency multipliers, in IEEE MTT-S Int. Microwave Symp. Dig., 1990, pp. 1301 1304. [2] W. L. Bishop, T. W. Crowe, and R. J. Mattauch, Planar GaAs Schottky diode fabrication: Progress and challenges, in Proc. 4th Int. Space THz Tech. Symp., Los Angeles, CA, Mar. 1993. [3] N. Erickson, B. Rizzi, and T. Crowe, A high-power doubler for 174 GHz using a planar diode array, in Proc. 4th Int. Space THz Tech. Symp., Mar. 1993, pp. 287 296. [4] N. Erickson, J. Tuovinen, B. Rizzi, and T. Crowe, A balanced doubler using a planar diode array for 270 GHz, in Proc. 5th Int. Space THz Tech. Symp., May 1994, pp. 409 413. [5] P. Siegel, A. Kerr, and W. Hwang, Topics in the optimization of millimeter-wave mixers, Washington, DC, NASA, NASA Tech. Rep. 2287, Mar. 1984. [6] P. Penfield and R. P. Rafuse, Varactor Applications. Cambridge, MA: MIT Press, 1962. [7] E. Kollberg, T. Tolmunen, M. Frerking, and J. East, Current saturation in submillimeter wave varactors, IEEE Trans. Microwave Theory Tech., vol. 40, pp. 831 838, May 1992. [8] L. Dickens, Spreading resistance as a function of frequency, IEEE Trans. Microwave Theory Tech., vol. MTT-15, pp. 101 109, Feb. 1967. [9] J. L. Hesler, K. Hui, R. M. Weikle, II, and T. W. Crowe, Design, analysis and scale model testing of fixed-tuned broadband waveguide to microstrip transitions, in Proc. 8th Int. Space THz Tech. Symp., Mar. 1993. [10] T. C. Edwards, Foundations for Microstrip Circuit Design. New York: Wiley, 1985. [11] G. Stillman, C. Wolfe, and J. Dimmock, Hall coefficient factor for polar mode scattering in n-type GaAs, J. Phys. Chem. Solids, vol. 31, pp. 1199 1204, 1970. [12] J. Ruch and W. Fawcett, Temperature dependence of the transport properties of gallium arsenide determined by a Monte Carlo method, J. Appl. Phys., vol. 41, no. 9, pp. 3843 3849, 1970. [13] J. T. Louhi, A. V. Raisanen, and N. R. Erickson, Cooled Schottky varactor frequency multipliers at submillimeter wavelengths, IEEE Trans. Microwave Theory Tech., vol. 41, pp. 565 571, Apr. 1993. David W. Porterfield (S 95 M 98) was born in Hagerstown, MD, in 1959. He received the B.E.E. degree (highest honors) from the Georgia Institute of Technology, Atlanta, in 1990, and the M.S.E.E. and Ph.D. degrees from the University of Virginia, Charlottesville, in 1994 and 1998, respectively. His primary research areas have been in millimeter-wave and submillimeterwave mixers and multipliers. Dr. Porterfield is a member of Eta Kappa Nu and Tau Beta Pi. Thomas W. Crowe (S 82 M 82 SM 91) received the B.S. degree in physics from Montclair State College, Montclair, NJ, in 1980, and the M.S.E.E. degree and Ph.D. degree in electrical engineering from the University of Virginia, Charlottesville, in 1982 and 1986, respectively. He became a Research Assistant Professor of electrical engineering in March 1986, a Research Associate Professor in July 1991, and a Research Professor in August 1997. Since January 1989, he has been the Director of the Semiconductor Device Laboratory and, in 1996, he was elected Director of the Applied Electrophysics Laboratories. He is also a Founder and President of Virginia Diodes, Inc. His main areas of interest include the development of high-frequency semiconductor devices and the optimization of such devices for use in low-noise submillimeter wavelength receivers. His current research is focused on the investigation of novel device structures for high-frequency applications, development of solid-state power sources for terahertz frequencies, and the use of planar device technologies to allow the routine implementation of heterodyne receivers on space platforms for radio astronomy and studies of the chemistry of the upper atmosphere. Richard F. Bradley (S 81 M 82) was born in Pittsburgh, PA, on December 31, 1960. He received the B.S.E.E. and M.S.E.E. degrees from Carnegie Mellon University, Pittsburgh, PA, in 1982 and 1983, respectively, and the Ph.D. degree from the University of Virginia, Charlottesville, in 1992. In 1984, he joined the National Radio Astronomy Observatory (NRAO), Green Bank, WV, where he designed cryogenic, low-noise microwave receiver systems. In 1986, he was co-founder of the NSF Secondary Science Teachers Institute, NRAO, where he built instrumentation and developed astronomical observing and laboratory exercises for the educational program. Since 1992, he has been with the NRAO Central Development Laboratory, Charlottesville, VA, where he has developed microwave components for radio telescopes at NRAO and throughout the world. Since 1992, he has also held a Visiting Faculty position in the Electrical Engineering Department, University of Virginia, where he has assumed both research and teaching responsibilities. His areas of interest include millimeter-wave frequency multipliers and sources, submillimeter-wave mixers, cryogenic low-noise amplifiers, array feed systems, and interference canceling techniques. He holds a U.S. patent in the area of optical distance measurement technology. Dr. Bradley is a member of the American Institute of Physics, American Astronomical Society, International Union of Radio Science (Commissions D and J), Sigma Xi, Tau Beta Pi, and Eta Kappa Nu. Neal R. Erickson (M 85) received the B.S. degree from the California Institute of Technology, Pasadena, in 1970, and the Ph.D. degree from the University of California at Berkeley, in 1979. Since 1979, he has worked in the Physics and Astronomy Department, University of Massachusetts, Amherst, where he is currently a Research Professor. He has worked extensively in the field of low-noise millimeterand submillimeter-wave receiver systems and astronomical observations with these systems. He has designed Schottky diode mixers from 80 to 2500 GHz and frequency multipliers from 40 to 900 GHz. He has also worked in the field of quasi-optics for the millimeter and submillimeter range and in the design of low-noise high electron-mobility transistor (HEMT) amplifiers up through 115 GHz. His recent work has involved the development of high-power frequency doublers for 150 and 300 GHz, and completion of a 32-element cryogenic receiver array for the 85 115-GHz range. In 1982, he helped found Millitech Corporation, South Deerfield, MA, where he has worked part time.

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