Output Input Efficiency PARD (mvp-p) Vin Nom. Regulation Max (V)

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Output Input Efficiency PARD (mvp-p) Vin Nom. (V)

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Features: Small size, minimal footprint SMT/SIP package A Output Current (all voltages) High Efficiency: up to 9% High reliability RoHS Compliant Cost efficient open frame design Output voltage programmable by an external resistor. Monotonic Start with Pre-Bias. +ve Enable Logic and ve Enable Logic models available Output Input Efficiency PARD (mvp-p) Regulation Max Vin Nom. Range (V) Iin Typ Full Load Vout (V) Iout (A) (V) (A) Typ. Max. Line Load Typ..75 5 75 +/-.% +/-.5%.3 1.99 77% 1. 5 75 +/-.% +/-.5%.3 1.9 3% 1.5 5 75 +/-.% +/-.5%.3.3 % 1. 5 75 +/-.% +/-.5%.3.77 %. 5 75 +/-.% +/-.5%.3.99 9%.5 5 75 +/-.% +/-.5%.3 3.7 9% 3.3 5 75 +/-.% +/-.5%.3.73 9% 5. 5 75 +/-.% +/-.5%.3 7.9 9% Technical enquiries email: sales@murata-ps.com, tel: +5 339 3 1 NEA B1_1//

Input Characteristics Notes & Conditions Min Typ. Max Units Input Voltage Operating Range.3 Vdc Input Reflected Ripple Current ma p-p Inrush Current Transient. A s Input Filter Type (external) 1 μf Input Turn ON Threshold.5 V Input Turn OFF Threshold. V ON Control Open Circuit or =Vin OFF Control <.Vdc Output Characteristics Notes & Conditions Min Typ. Max Units Vout Accuracy 1% load -1.5 +1.5 % Output Loading A Output Ripple & Noise 75 MVp-p @ Mhz Bandwidth. Maximum Capacitive Load Low ESR μf Vout Trim Range (Nom).75 5. V Total Accuracy Over line/load temperature <% Current Limit 3 A Output Line Regulation -. +. % Output Load Regulation -.5 +.5 % Turn-on Overshoot 1 % SC Protection Technique Pre-bias Start-up at output Hiccup with auto recovery Unit starts monotonically with prebias Dynamic Characteristics Notes & Conditions Min Typ. Max Units Load Transient 5% step,.1a/μs 1 mv Settling Time μs Frequency 3 KHz Rise Time 1% Vo to 9% Vo 3.5 ms Start-Up Time Vin to Vout and On/Off to Vout Vout rise to monotonic 7 ms General Specifications Notes & Conditions Min Typ. Max Units MTBF Calculated (MIL-HDBK-17F) Calculated (Bellcore TR-33, Issue ) 1..7 x1 Hrs x1 Hrs Thermal Protection Hotspot 11 C Operating Temperature Without derating 3LFM - 5 C Operating Ambient Temperature See Power derating curve - 5 C SIP Dimensions Lx.37 Wx.5 H (5.x.3x13.mm) SMT Dimensions 1.3 Lx.53 Wx.3 H (33x13.x9.3mm) SIP Pin Dimensions.5 (.mm) SQUARE. mm SMT Block Dimensions.3 x.5 x.1 SQUARE Pin and Block Material Matte Sn Finish on component Leads Weight 1 g Flammability Rating UL- NEA B1_1//

Standards Compliance CSA C., No.95/UL 95, Third Edition (), File UL E5113 Thermal Considerations The power module operates in a variety of thermal environments; however, sufficient cooling should be provided to help ensure reliable operation of the unit. The thermal data presented is based on measurements taken at various airflows. Note that airflow is parallel to the long axis of the module as shown in Figure 1 and derating applies accordingly. Figure 1. Thermal Tests Set-Up. The temperature at either location should not exceed 11 C. The output power of the module should not exceed the rated power for the module(vo,set X Io,max). Convection Requirements for Cooling To predict the approximate cooling needed for the module, refer to the Power Derating Curves in Figures -17. These derating curve are approximations of the ambient temperature and airflow required to keep the power module temperature below it's maximum rating. Once the module is assembled in the actual system, the module's temperature should be verified. 3 NEA B1_1//

TYPICAL DERATING CURVES SIP/SMT VERSION NEA151S Vo=.75V Derating Curve 1 LFM 1LFM LFM 3LFM 3 5 7 9 1 Fig.. SMT Power Derating vs Output Current for Vin.75V Out. NEA151B Vo=.75V Derating Curve 1 LFM 1LFM LFM 3LFM 3 5 7 9 1 Fig. 3. SIP Power Derating vs Output Current for Vin.75V Out. NEA B1_1//

NEA151S Vo=1.V Derating Curve 1 LFM 1LFM LFM 3LFM 3 5 7 9 1 Fig. SMT Power Derating vs Output Current for Vin 1.V Out. NEA151B Vo=1.V Derating Curve 1 LFM 1LFM LFM 3LFM 3 5 7 9 1 Fig 5. SIP Power Derating vs Output Current for Vin 1.V Out. 5 NEA B1_1//

NEA151S Vo=1.5V Derating Curve 1 LFM 1LFM LFM 3LFM 3 5 7 9 1 Fig. SMT Power Derating vs Output Current for Vin 1.5V Out. NEA151B Vo=1.5V Derating Curve 1 LFM 1LFM LFM 3LFM 3 5 7 9 1 Fig 7. SIP Power Derating vs Output Current for Vin 1.5V Out. NEA B1_1//

NEA151S Vo=1.V Derating Curve 1 LFM 1LFM LFM 3LFM 3 5 7 9 1 Fig. SMT Power Derating vs Output Current for Vin 1.V Out. NEA151B Vo=1.V Derating Curve 1 LFM 1LFM LFM 3LFM 3 5 7 9 1 Fig 9. SIP Power Derating vs Output Current for Vin 1.V Out. 7 NEA B1_1//

NEA151S Vo=.V Derating Curve 1 LFM 1LFM LFM 3LFM 3 5 7 9 1 Fig 1. SMT Power Derating vs Output Current for Vin.V Out. NEA151B Vo=.V Derating Curve 1 LFM 1LFM LFM 3LFM 3 5 7 9 1 Fig 11. SIP Power Derating vs Output Current for Vin.V Out. NEA B1_1//

NEA151S Vo=.5V Derating Curve 1 LFM 1LFM LFM 3LFM 3 5 7 9 1 Fig. SMT Power Derating vs Output Current for Vin.5V Out. NEA151B Vo=.5V Derating Curve 1 LFM 1LFM LFM 3LFM 3 5 7 9 1 Fig 13. SIP Power Derating vs Output Current for Vin.5V Out. 9 NEA B1_1//

NEA151S Vo=3.3V Derating Curve 1 LFM 1LFM LFM 3LFM 3 5 7 9 1 Fig.. SMT Power Derating vs Output Current for Vin 3.3V Out. NEA151B Vo=3.3V Derating Curve 1 LFM 1LFM LFM 3LFM 3 5 7 9 1 Fig 15. SIP Power Derating vs Output Current for Vin 3.3V Out. 1 NEA B1_1//

NEA151S Vo=5.V Derating Curve 1 LFM 1LFM LFM 3LFM 3 5 7 9 1 Fig.. SMT Power Derating vs Output Current for Vin 5.V Out NEA151B Vo=5.V Derating Curve 1 LFM 1LFM LFM 3LFM 3 5 7 9 1 Fig 17. SIP Power Derating vs Output Current for Vin 5.V Out. 11 NEA B1_1//

TYPICAL EFFICIENCY CURVES FOR VARIOUS VOLTAGE MODELS SIP/SMT VERSION. 1% 9% 5% % 7% 5% % 55% 5% NEA151S (Eff Vs Io) Vout=.75V 1 Fig. SMT Efficiency Curves for Vout=75V (5C) V V 1% 9% 5% % 7% 5% % 55% 5% NEA151B (Eff Vs Io) Vout=.75V 1 Fig 19. SIP Efficiency Curves for Vout=.75V (5C) V V NEA B1_1//

1% NEA151S (Eff Vs Io) Vout=1.V 9% 5% % 7% 5% % V V 1 Fig. SMT Efficiency Curves for Vout=1.V (5C) 1% 9% 5% % 7% 5% % NEA151B (Eff Vs Io) Vout=1.V 1 Fig 1. SIP Efficiency Curves for Vout=1.V (5C) V V 13 NEA B1_1//

1% NEA151S (Eff Vs Io) Vout=1.5V 9% 5% % 7% 5% % V V 1 Fig. SMT Efficiency Curves for Vout=1.5V (5C) 1% NEA151B (Eff Vs Io) Vout=1.5V 9% 5% % 7% 5% % 1 Fig 3. SIP Efficiency Curves for Vout=1.5V (5C) V V NEA B1_1//

1% NEA151S (Eff Vs Io) Vout=1.V 9% 5% % 7% 5% % V V 1 Fig. SMT Efficiency Curves for Vout=1.V (5C) 1% 9% 5% % 7% 5% % NEA151B (Eff Vs Io) Vout=1.V 1 V V Fig 5. SIP Efficiency Curves for Vout=1.V (5C) 15 NEA B1_1//

1% NEA151S (Eff Vs Io) Vout=.V 9% 5% % V V 7% 1 Fig. SMT Efficiency Curves for Vout=.V (5C) 1% NEA151B (Eff Vs Io) Vout=.V 9% 5% % V V 7% 1 Fig 7. SIP Efficiency Curves for Vout=.V (5C) NEA B1_1//

1% NEA151S (Eff Vs Io) Vout=.5V 9% 5% % V V 7% 1 Fig. SMT Efficiency Curves for Vout=.5V (5C) 1% NEA151B (Eff Vs Io) Vout=.5V 9% 5% % V V 7% 1 Fig 9. SIP Efficiency Curves for Vout=.5V (5C) 17 NEA B1_1//

1% NEA151S (Eff Vs Io) Vout=3.3V 9% 5% % V V 7% 1 Fig 3. SMT Efficiency Curves for Vout=3.3V (5C) 1% NEA151B (Eff Vs Io) Vout=3.3V 9% 5% % V V 7% 1 Fig 31. SIP Efficiency Curves for Vout=3.3V (5C) NEA B1_1//

1% NEA151S (Eff Vs Io) Vout=5V 9% 5% % V V 7% 1 Fig 3. SMT Efficiency Curves for Vout=5.V (5C) 1% NEA151B (Eff Vs Io) Vout=5V 9% 5% % V V 7% 1 Fig 33. SIP Efficiency Curves for Vout=5.V (5C) 19 NEA B1_1//

Typical Start Up Ch1. Vin Ch. Vout, Full load. Ch3. Q1-Vgs Ch. Q-Vgs Typical Start Up with pre-bias Ch1 : Enable Ch : Vout Ch3 : Output current at Full Load. NEA B1_1//

Typical Output Noise and Ripple Vin = Vdc, Vo=5.V/A Output with 1uF ceramic and 1uF tantalum capacitor Typical Output Transient Response Vin = Vdc, Vo=5.V, 5% - 1% - 5% Load change, @.1A/uS 1 NEA B1_1//

Output Voltage Set point adjustment. The following relationship establish the calculation of external resistors: Radj 15.7 = ( ) 1 (KΩ) Vo.755 For Vout setting an external resistor is connected between the TRIM and Ground Pin. Resistor values for different output voltages are calculated as given in the table: Vo, set (Volts) RAdj (KΩ).75 Open 1.. 1.5 13.5 1. 9.. 7.17.5 5.9 3.3 3. 5. 1.7 Remote Sense: All MURATA POWER SOLUTIONS SMT/SIP power modules offer an option for remote sense. The remote sense compensates for any distribution drops to accurately control voltage at the point of load. The voltage between the sense pin to Vout pin should not exceed.5v. NEA B1_1//

SMT Lead free Reflow profile 1. Ramp up rate during preheat : 1.33 /Sec ( From 3 to 15 ). Soaking temperature :.9 /Sec ( From 15 to ) 3. Ramp up rate during reflow :. /Sec ( From to 5 ). Peak temperature : 5, above to 7 Seconds 5. Ramp up rate during cooling : -1.5 /Sec ( From to 15 ) Mechanical and pinning Information. Given below is the outline drawing showing physical dimensions of the SIP & SMT package. The external dimensions for SMT package are 33.mm X 13.mm X 9.3mm. BOTTOMVIEWOFBOARD Recommended Pad Layout 33. (1.3) 7.7.3.3.3 7.5 (.31) (.19) (.19) (.19) (.97) 1.5 (.5) 9.3 (.3) max. Dimensions are in millimetes and(inches) 7.5.3.3.3 7.7 (.97) (.19) (.19) (.19) (.31) COM +VO TRIM +SENSE 1.9 13. (.5) (.53) 1.9 (.5) +SENSE TRIM +VO COM Top Viewof Board 1.9 (.3) 1. (.3) +VIN SURFACEMOUNTCONTACT. (.1) Dimensions are in millimeters (Inches) Tolerances: X.X.5mm(.in), X.XX.5mm(.1in),unless otherwise noted. ON/OFF 1. (.) 1.91 (.75) L1 INDUCTOR. (.5) ON/OFF PADSIZE MIN:3.55x.13(.x.95) MAX:.19x.79(.5x.11) 9.9 (1.177) +VIN 3 NEA B1_1//

Whereas, the external dimensions of the SIP version are 5.mm X.7mm X.3mm..(3.).1(.5).9(7.) SIZE SIP 1 3 5.(1.).5(.).(5.) 1.(5.).1(.5) min. LAYOUT PATTERN TOP VIEW All Dimmension In Inches(mm) Tolerance :.XX=. (.X=.5 ).XXX=.1 (.XX=.5 ) 7 9 1 11.5(1.3).3(5.).5(.7).33(.).(7.1).37(.3)max. 1.1mm PLATED THROUGH HOLE 1.mm PAD SIZE.5(.) PIN CONNECTION Pin FUNCTION 1 +Output +Output 3 +Sense +Output 5 Common Common 7 9 1 11 +V Input +V Input No Pin Trim On/Off Control Safety Considerations The NEA series of converters are certified to IEC/EN/CSA/UL 95. If this product is built into information technology equipment, the installation must comply with the above standard. An external input fuse (no more A recommended) must be used to meet the above requirements. The output of the converter [Vo(+)/Vo(-)] is considered to remain within SELV limits when the input to the converter meets SELV or TNV- requirements. The converters and materials meet UL - flammability ratings. Ordering Information Part Number Vin Vout Iout Enable Logic Pin Length NEA15BC.3V -.V.75V 5.V A Negative.139" NEA15SC.3V -.V.75V 5.V A Negative SMT NEA151BC.3V -.V.75V 5.V A Positive.139" NEA151SC.3V -.V.75V 5.V A Positive SMT NEA B1_1//

Label Information N E A 1 1 5 B X C Iout Place Holder Vout Range F=Fixed A=Adjustable Vin (value or range) C= 3.3V -5.V E=.3V-V F=.V-V Vout X = Factory control character (not required when ordering) = Standard. (No PGood option) P = Power Good Option Pin Length Option B=.139 S=SMT Enable Logic, for ve, 1 for +ve C = RoHS Compliant Non-Isolated Family RoHS Compliant The NEA series of converters is in compliance with the European Union Directive /95/EC (RoHS) with repsect to the following sustances: lead (Pb), mercury (Hg), cadmium (Cd), hexavalent chromium, polybrominated biphenyls (PBB) or polybrominated diphenyl ethers (PBDE). 5 NEA B1_1//