STW20NB50. N - CHANNEL 500V Ω - 20A - TO-247 PowerMESH MOSFET

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Transcription:

N - CHANNEL 500V - 0.22Ω - 20A - TO-247 PowerMESH MOSFET TYPE V DSS R DS(on) I D 500 V < 0.25 Ω 20 A TYPICAL RDS(on) = 0.22 Ω EXTREMELY HIGH dv/dt CAPABILITY ± 30V GATE TO SOURCE VOLTAGE RATING 100% AVALANCHE TESTED REPETITIVE AVALANCHE DATA AT 100 o C VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED DESCRIPTION Using the latest high voltage technology, STMicroelectronics has designed an advanced family of power Mosfets with outstanding performances. The new patent pending strip layout coupled with the Company s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. 3 2 1 TO-247 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING SWITCH MODE POWER SUPPLIES (SMPS) DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit V DS Drain-source Voltage (V GS = 0) 500 V V DGR Drain- gate Voltage (R GS = 20 kω) 500 V V GS Gate-source Voltage ± 30 V I D Drain Current (continuous) at T c = 25 o C 20 A I D Drain Current (continuous) at T c = 100 o C 12.7 A I DM ( ) Drain Current (pulsed) 80 A P tot Total Dissipation at T c = 25 o C 250 W Derating Factor 2 W/ o C dv/dt(1) Peak Diode Recovery voltage slope 4 V/ T stg Storage Temperature -65 to 150 T j Max. Operating Junction Temperature 150 ( ) Pulse width limited by safe operating area (1) ISD 20A, di/dt 200 A/µs, VDD V(BR)DSS, Tj TJMAX October 1999 o C o C 1/8

THERMAL DATA R thj-case R thj-amb R thc-sink T l Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose 0.5 30 0.1 300 o C/W oc/w o C/W o C AVALANCHE CHARACTERISTICS Symbol Parameter Max Value Unit I AR Avalanche Current, Repetitive or Not-Repetitive 20 A (pulse width limited by T j max, δ < 1%) E AS Single Pulse Avalanche Energy (starting T j = 25 o C, I D = I AR, V DD = 50 V) 1000 mj ELECTRICAL CHARACTERISTICS (Tcase = 25 o C unless otherwise specified) OFF V (BR)DSS Drain-source Breakdown Voltage I D = 250 µa V GS = 0 500 V I DSS I GSS Zero Gate Voltage Drain Current (V GS = 0) Gate-body Leakage Current (V DS = 0) V DS = Max Rating V DS = Max Rating T c = 125 o C 10 100 V GS = ± 30 V ± 100 na µa µa ON ( ) V GS(th) Gate Threshold V DS = V GS I D = 250 µa 3 4 5 V Voltage R DS(on) Static Drain-source On V GS = 10 V I D = 10 A 0.22 0.25 Ω Resistance I D(on) On State Drain Current V DS > I D(on) x R DS(on)max V GS = 10 V 20 A DYNAMIC g fs ( ) Forward Traconductance V DS > I D(on) x R DS(on)max I D = 10 A 9 13.5 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Trafer Capacitance V DS = 25 V f = 1 MHz V GS = 0 3600 460 55 4700 600 75 pf pf pf 2/8

ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON t d(on) t r Q g Q gs Q gd Turn-on Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD = 250 V I D = 10 A R G = 4.7 Ω V GS = 10 V (see test circuit, figure 3) 32 15 V DD = 400 V I D = 20 A V GS = 10 V 85 21 37 43 21 110 nc nc nc SWITCHING OFF t r(voff) t f t c Off-voltage Rise Time Fall Time Cross-over Time V DD = 400 V I D = 20 A R G = 4.7 Ω V GS = 10 V (see test circuit, figure 5) 20 25 47 27 33 62 SOURCE DRAIN DIODE I SD I SDM ( ) Source-drain Current Source-drain Current (pulsed) V SD ( ) Forward On Voltage I SD = 20 A V GS = 0 1.6 V t rr Reverse Recovery I SD = 20 A di/dt = 100 A/µs 700 Time V DD = 100 V T j = 150 o C Q rr I RRM Reverse Recovery Charge Reverse Recovery Current (see test circuit, figure 5) 9 25 µc A ( ) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % ( ) Pulse width limited by safe operating area 20 80 A A Safe Operating Area Thermal Impedance 3/8

Output Characteristics Trafer Characteristics Traconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variatio 4/8

Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8

Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8

TO-247 MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A 4.7 5.3 0.185 0.209 D 2.2 2.6 0.087 0.102 E 0.4 0.8 0.016 0.031 F 1 1.4 0.039 0.055 F3 2 2.4 0.079 0.094 F4 3 3.4 0.118 0.134 G 10.9 0.429 H 15.3 15.9 0.602 0.626 L 19.7 20.3 0.776 0.779 L3 14.2 14.8 0.559 0.582 L4 34.6 1.362 L5 5.5 0.217 M 2 3 0.079 0.118 P025P 7/8

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no respoibility for the coequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licee is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 1999 STMicroelectronics Printed in Italy All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. 8/8 http://www.st.com.