DER inverter development and testing using HIL simulation Athanasios Vasilakis, Foivos Palaiogiannis, Dimitris Lagos Smart Grids Research Unit Smart RUE ICCS National Technical University o Athens EriGrid Workshop, Advanced power system testing using Hardware in the Loop simulation, Athens, Greece 23 Nov 218
Power interaces or DG and storage Power interaces are the point o physical interaction between DG and the electrical inrastructure, usually the local electric grid. The power interace is designed to interact with and serve between the DER and the power system. The DG unit studied in this presentation is a battery systems. Distribution networks are becoming increasingly smarter, as well as more complex: Advanced control strategies to manage such networks are becoming necessary. These strategies need to be thoroughly tested and validated, beore they can be implemented in a real network. Electrical Interace Complexity with Respect to Interace Coniguration *. * Arthur D. Little, Electrical Interace Complexity with Respect to Interace Coniguration, White Paper, 1999.
Development Overview o Battery Inverter and test procedure Testing Design Design Requirements o Interacing Leadacid battery Simulation Validation Islanded mode bank with AC bus o Grid connected Operation o Islanded Operation o Bidirectional Power low o Grid Support Functions o Battery Management System (BMS) o Integrated protection unctionalities o Communication interace PI SRRF Voltage Contro PR Voltage Control HIninity Control Gridconnected mode PI SF Voltage Control Virtual Resistance 2DoF CHIL Tests o Island operation o Grid connected operation o Grid support unctionalities Hardware tests o Island operation PI SRRF Voltage Control PR Voltage Control HIninity Control o Grid connected operation PI SF Voltage Control Virtual Resistance 2DoF PowerHardwareinthe Loop Tests o Grid support unctionalities o Integrated protection o Communication interace
Overview o the CHIL & Hardware test setup CHIL test set up in ICCS laboratory Hardware test set up in ICCS laboratory
Overview o the PHIL setup The operation o the developed battery inverter have tested in the ICCS laboratory. PHIL test set up in ICCS laboratory Real Time Simulator (RTDS) Grid Emulation Voltage reerence Power Ampli ier Z Vin Simulation o PHIL Setup Converter Settings PHIL Protection Monitoring and Logging Open Close HIL Voltage and Measurement Triphase Power Module AC GRID Iout Ba tte ry Stora g e Sys te m K*Vin Vout DC Grid emulator Hardware Under Test
Battery Inverter Storage Power Interace Leadacid battery bank DCDC Bidirectional Converter DCAC HBridge Inverter Low pass ilter Control Unit (DSP, RTPC, FPGA ) Some Control Design Considerations Stability under all operational conditions (Resonance issues, Nonlinearity issues, Time delays etc.). Low current harmonic distortion Good dynamic perormance
7 Battery Inverter LCL ilter design considerations (1/2) C Inverter to Inverter Voltage Frequency Response BUT: control stability issues due to resonance. Grid to Inverter Voltage Frequency Response 15 1 1 5 5 5 5 1 1 15 15 2 3 1 For high power, low switching requency applications LCL ilter can provide switching ripple reduction with: Lower cost & weight Switching ripples reduction.compared to L ilter 15 Gain (db) Gain (db) I inv 4 1 Response Frequencies (rad/s) 5 1 2 3 1 4 1 Response Frequencies (rad/s) Resonance Peaks (Zero Impedance) Requires Damping or power quality and stability improvement 5 1
Battery Inverter LCL ilter design considerations (2/2) Passive Damping Techniques: Actual passive components placed on ilter. perormance & eiciency degradation. Inductor Side Virtual Resistance ZAD Active Damping Techniques: Modiication o the current control algorithm. Synchronous reerence rame PIbased Cascaded doubleloop Gridside current only using HP eedback Filterbased (Notch Filters) Optimal control algorithms Virtual resistance Virtual Impedance C VLCL R Filter Capacitance Virtual Resistance ZAD Implemented VLCL C Virtual Impedance
Design o the power interaces: Battery inverter (1/2) Grid connected operation PISRRF Voltage Control C PISRRF technique (without active damping): Stable with the inverter current eedback. Unstable with the grid current eedback. Stabile or low bandwidth controller. ZAD C Virtual Impedance Virtual Resistance Virtual Resistance technique: Capacitance Virtual Resistance has better damping perormance in regards to others. Grid current eedback stability is achieved Extra sensor is required (Voltage or current), or estimating the state variable (virtual lux) HPF C 2DoF (PID) 2 Degree o reedom technique: Excellent damping perormance (98%) Diicult tuning process Better THD perormance
Design o the power interaces: Battery inverter (2/2) Islanded operation ap_re _re PI SRRF PI Voltage SRRF PI SRRF Voltage Control C ILoad LLoad R RLoad kad ap_re _re PR Controller PR Voltage Controller PR Voltage Control Ic C ILoad LLoad R ap_re HIninity Control K Ic C R Proportional Resonant control strategy: Based on αβrame (stationary) Active damping with capacitor current eedback More robust behavior RLoad PISRRF technique (without active damping): Simple design Relatively good perormance ILoad LLoad RLoad H ininity Loop shaping approach: Optimizes the response near the system bandwidth. Based on αβ stationary rame Multiplicative uncertainty, taking in to concentration all the possible models Robust perormance
Hardware test results o the Battery inverter 45 4 C PI SRRF 3 _re PI Voltage SRRF 25 2 C Virtual Resistance 486.75 486.8 486.85 486.9 Time (sec) 486.95 487 487.5 Power (W) C RLoad PR Controller 46.9 46.95 461 461.5 461.1 461.15 461.2 461.25 Time (sec) 461.3 46.85 PR Voltage Controller 25 45 Pbat 4 Ic C.2.25.3 Time (sec).35.4.45.5 Pload LLoad R 2 1 ILoad 1.5.1.15.2 RLoad.25.3 Time (sec).35.4.45 4 HIninity Control.5 Pload C ap_re 35 3 K 25 2 15 81.6 81.65 81.7 81.75 81.8 81.85 Time (sec) 81.9 81.95 82 82.5 Power (W) Power (W).15 3.1 HPF.5 3 _re 2 2DoF 1 4 ap_re 3 15 LLoad kad Virtual Impedance 1 Pbat 35 2 PR Voltage Control 45 ILoad 487.1 4 486.7 ZAD R 15 486.65 3 ap_re 35 Power (W) Pload 4 Power (W) PI SRRF Voltage Control Pbat Power (W) PI SRRF Voltage Control Ic C R ILoad LLoad RLoad 2 1 1.5.1.15.2.25.3 Time (sec).35.4.45.5
Tests or Droop Curves Veriication Measured P Curve Setup or droop curve evaluation 1.5 Power Ampliier A c tive P o w e r (p.u.) 1.5 Triphase Power Module AC GRID.5 Battery Storage System 1 1.5 DC 49 49.2 49.4 49.6 49.8 5 5.2 Frequency (Hz) 5.4 5.6 5.8 51 Measured QV Curve 1.5 R e a c tiv e P o w e r (p.u.) 1.5.5 1 1.5.94.96.98 1 Voltage (p.u.) 1.2 1.4 1.6 REAL TIME DIGITAL SIMULATION
PHIL tests or Islanding Detection Methods Evaluation Islanding detection DP PHIL setup or Islanding detection tests UOV/UOF DQ/PDER (%) ROCOF Island Detection Time Island Detection Time Detection (seconds) Detection (seconds) NO.259 1 NO.117 1 NO.18 2.624.56 2.986.58 3.42.51 3.624.47 4.341.44 4.431.35 5.28.37 5.368.43 C u rr e n t (A ), S T A T U S 15 Real Time Digital Simulator S1 R GRID Battery Storage System DC Power Ampliier 5 1 1 1.1 Time (sec) 1.2 1.3 1.4 Input AC GRID.9 V Triphase Power Module 5 15.8 L Voltage Measurement Output ROCOF Status Breaker Status 1 C 1.5
Conclusions A design and testing methodology that aims to test power electrinics components and control algorithms, in all their development stages, using advanced laboratory setups has been proposed The design process combines the longestablished methods with HIL approaches in order also to combine the advantages o each method Power electronics design is complex procedure that need great attention by the designer on each development stage HIL simulation is an eicient tool or DER inverter testing The use o HIL simulation or Loss o Main detection can be considered or uture standardized testing
Thank You! EriGrid Workshop, Advanced power system testing using Hardware in the Loop simulation, Athens, Greece 23 Nov 218