Modeling and Simulation of Via Conductor Losses in Co-fired Ceramic Substrates Used In Transmit/Receive Radar Modules

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Modeling and Simulation of Via Conductor Losses in Co-fired Ceramic Substrates Used In Transmit/Receive Radar Modules 4/5/16 Rick Sturdivant, CTO 310-980-3039 rick@rlsdesigninc.com Edwin K.P. Chong, Professor Colorado State University http://www.engr.colostate.edu/~echong/

Major Goal: Goal Of The Presentation Demonstrate the effect of via resistance on vertical transitions within co-fired ceramic substrates. Motivation During a product development, it was suggested that via conductor losses may be increasing the insertion loss of the vertical transition. Specifically, the center conductor via for the quasi-coaxial transition. Describe the use of vertical transitions in RLS transmit Design, receive Inc. modules. Show simulation results Describe the model developed

T/R Modules Are Used In AESA Radar and Communication Systems Active Electronically Scanned Array (AESA) Airborne Radar Switch Switch Switch Switch defense-update.com T/R T/R T/R T/R Power Divider Network (Manifold) AESA Radar TX RX T/R modules are being used in multiple military systems including airborne, ground based, and sea based systems. Commercial applications of T/R modules include communication systems, satellite systems, consumer high data rate mobile. Ground Based RLS Radar Design, Inc. neviditelnypes.lidovky.cz koreansentry.com

Typical Transmit Receive Module Showing Location Of Vertical Transition Circulator Combines RX and TX functions to one radiator port. Limiter and Low Noise Amplifier Must handle at least the reverse power of HPA output. LNA, G>20dB typ., NF~1-1.5dB Phase Shifter and VGA 6 bits of phase 5 bits of attenuation Vertical Transition Power Detector Detects HPA output power level. Wilkenson Power Divider Power combines HPA outputs High Power Amplifiers Two amplifiers Si and Other Functions: ASIC, Regulators, Energy Storage, HEXFETs, etc. Switches SPDT Used to switch between TX and RX paths.

How Can A Transition Between Stripline and Microstrip Be Created? stripline Vertical Transition microstrip This is a very common transition since many applications require the signal line to be buried inside the PCB at some point. Requires careful design of the transmission lines and transition area between the transmission lines.

Line Impedance (ohm) Onset Of TE01 Resonant Mode (GHz) Design Of The Stripline Section Requires Careful Attention To Via Placement Detail Stripline Desired Mode via e r a Avoiding the two undesired modes results in a limited range for acceptable values for dimension a. 50.0 47.5 45.0 Allowed Range For Dimension a 100 90 80 Stripline Undesired Mode1 42.5 40.0 70 60 e r f sr1 = v 0 2a ε r μ r 37.5 35.0 50 40 a 32.5 30.0 30 20 Stripline Undesired Mode2 e r a Simulate using quasi-static or fullwave simulator to determine change in impedance and effective dielectric constant as a function of spacing between vias. 27.5 10 25.0 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Cavity Cavity Width, a b (mm) (for e r =9.8, b=1mm, w=0.203mm)

The Equivalent Circuit Model Of The Transition Is An LC Network Microstrip h D GND1 b Via Diameter, d D cp Stripline GND2 L1 = inductance of the via through substrate thickness h. L2 = inductance of via through the top section of substrate thickness b. C1 = capacitance created by via passing through the ground plane below the microstrip. C2 = capacitance created by the via catch pad at the stripline interface. RLS Equivalent Design, Inc. Circuit Model L1 L2 C1 C2

Return Loss (db) The Model Creation Procedure Requires Three Steps L Via = μ 0 2π h ln h + r2 + h 2 r + 3 2 r r2 + h 2 (4) C 1 = A1 h + b 2 C 2 = A cp ε o ε r spacing = π ε r 60 v o ln D/d D CP 2 ε 2 0 ε r b 2 (6) (5) Step 1: Calculate L1 and L2 using (4). Step 2: Calculate C1 using (5). Step 3: Calculate C2 using (6) L1 L2 C1 C2 For LTCC (er=7.8), h=0.25mm, b=0.5mm, D=0.55mm, d=0.2mm, D cp =0.35mm which yield L1=0.0259nH, L20=0.108nH, C1=0.102pF, C2=0.0781pF Frequency (GHz)

What Effect Does The Conductor Loss Of The Via Have On Performance? Approach Convert ohm/sq into resistivity Perform EM simulation Extract insertion loss as a function of metal conductivity Modify circuit model to accommodate via resistance effect.

Co-Fired Ceramic Fabricators Specify Metal Conductivity in Ohm/sq Total Length, L W Must convert ohm/sq into resistivity or conductivity for EM simulators. L (a) Top Down View R From Definition Of Resistivity L L A W t From Ohm/Square Ohm L R Sq W t W (b) Isometric View Area A W t Use This for EM Simulator Input Data L Ohm L W t Sq W Ohm t Sq

Insertion loss (db) The Via Can Be Modeled As A Simple Resistor For Insertion Loss Contribution 0.00-0.05-0.10-0.15-0.20 Insertion Loss Effect of The Center Conductor Via HFSS Ideal (DC Case) Considering DC (i.e., f=0) Current Only A =p(d/2) 2 D -0.25-0.30-0.35 R = (L /A ) (1) L -0.40 1000 10000 100000 1000000 Via Conductivity (S/m) Contribution of resistive part to the insertion loss of the transition can be found from (1), but only if we were just concerned about DC effects (i.e., effects at zero frequency). However, (1) does not capture the full story because of the skin depth effect.

Skin Depth Effect Tells Us That The RF Current Only Penetrates A Small Distance Into The Metal X E x (z) Air Region J 0 Metal Region (, ) J x (z) =J o e -z/ Z Skin Depth 1 p f Where: = permeability = metal conductivity f = frequency RLS Design, of concern Inc.

Because of Skin Depth Effects, The Current Only Travels On The Surface Of The Via Effective Area Due To Skin Depth Effects D Skin Depth Effect A A' -A1 eff D D - n p - 2 2 R ' ' L A eff 2 2 (2) n= number of skin depths to include L Using (2) provide a more accurate estimate of the 2 S21( db) 20 LOG10 ' 2 R Z0

When Skin Depth Effects Are Taken Into Account, The Lumped Model Agrees With HFSS Insertion loss (db) 0.00-0.05 Insertion Loss Effect of The Center Conductor Via HFSS -0.10 Model -0.15 Ideal (DC Case) -0.20 @10GHz -0.25-0.30-0.35 Au Cu W -0.40 1000 10000 100000 1000000 Via Conductivity (S/m)

Insertion Loss (db) Simulations Were Performed Using HFSS From Ansys 0-0.05-0.1 Insertion Loss Versus Frequence and Via Conductivity Alumina HTCC -0.15-0.2-0.25-0.3-0.35-0.4-0.45-0.5 DB( S(2,1) ) Transition_IMAPS_Ramp1_Mod0_HFSSDesign1 DB( S(2,1) ) Transition_IMAPS_Ramp1_Mod1_HFSSDesign1 DB( S(2,1) ) Transition_IMAPS_Ramp1_Mod2_HFSSDesign1 DB( S(2,1) ) Transition_IMAPS_Ramp1_Mod3_HFSSDesign1 DB( S(2,1) ) Transition_IMAPS_Ramp1_Mod4_HFSSDesign1 DB( S(2,1) ) Transition_IMAPS_Ramp1_Mod5_HFSSDesign1 DB( S(2,1) ) Transition_IMAPS_Ramp1_Mod6_HFSSDesign1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Frequency (GHz) Results show a steady increase in insertion loss as a function of frequency and via conductivity. Roll off above 10GHz is due to mismatch losses.

Conclusions The goal of the presentation was to show the effect of the center conductor resistivity for vertical transitions. We showed: 1) For good conductivity metals, the contribution of the center conductor to overall insertion loss of the vertical transition is less than approximately 0.1dB. 2) The skin depth effect must be accounted for when calculating the resistive part of the via transition. Suggestions For Further Study: 1) All the vias including the ground vias in the location of the transition should be taken into account. 2) A analytical solution for n should be calculated. L1 R L2 Modified Model C1 C2