Prof. Anyes Taffard Physics 120/220 Diode Transistor
Diode One can think of a diode as a device which allows current to flow in only one direction. Anode I F Cathode stripe Diode conducts current in this direction: I F A diode is fabricated from a pn junction. Semi-conductors (eg Si, Ge) can be doped with small concentration of impurities to yield a material that conducts electricity via e- transport (n-type) or via holes (p-type). Brought together, you get a pn junction. The e (holes) migrate away from the n- type (p-type) side. When the diode is forward bias, the redistribution of charge give rise to a potential gap: ΔV~0.6-0.7V (Si) 2
Diode application: rectifier Rectifier: converts AC à DC 3 AC R load V load V load V in minus the diode voltage drop (~0.7V) Output waveform will have a large amount of ripples. To produce a steady continuous DC voltage, one can connect a large value capacitor across the output voltage terminals (Smoothing capacitor). NB: In forward bias conduction, diode resistance à 0. The power dissipated in diode V 2 /0à. To avoid burning diode, you must use current limiting resistor, typically 100-1k.
Diode application: Full wave bridge rectifier 4 Another example: Full wave bridge rectifier Positive 1/2 cycle. D1 & D2 conduct in series D3 and D4 are reverse biased Negative 1/2 cycle. D3 & D4 conduct in series D1 and D2 are reverse biased The current through the load flows always in the same direction. During each ½ cycle, the current flows through 2 diodes, so the output voltage drops by 2 0.71.4V with respect to the input voltage.
Diode application: Limiter 5 This circuit limits the output swing to one diode drop (~±0.6-0.7V) This clamp circuit is often used as input protection for a high gain amplifier. For eg, RHS diode at +5V, V out is clamped at about +0.6V and -0.6V. NB: If you burn a diode, you would not see it beside the fact that your circuit isn't working so well. Use a tester (diode setting) to check your diode.
6 Transistors & Transistor circuits
Introduction 7 One of the most important example of active component: a device that can amplify: produce an output signal with more power than the input. The additional power comes from an external source of power (PS). Transistor is the essential ingredient of every electronic circuit: amplifier switch logic gates/digital computer (eg CPU contains >4 billions transistors) Integrated circuits (ICs) have largely replaced circuits constructed with discrete transistors. ü Transistors count on ICs: x2/year (Moore s law)
Bipolar Junction Transistor (BJT) 8 3-terminal device available in 2 flavors: npn & pnp B-C diode is usually reverse-biased (except in saturation ) B-E diode is usually forward-biased, i.e. conducting (except in cut-off ) npn is more common eg 2N3904 Somehow behave like diode, but don t take this too literally (in particular for B-C). transistor model Other type of technology: FETs (Field-Effect-Transistor)
Notations 9 Voltages: V C, V B, V E : voltage on transistor terminals C, B, E relative to ground V CE, V BE : voltage drop between terminals V CC : positive power supply voltage (collector) V EE : negative power supply voltage (emitter) Currents: I C, I B, I E : current flowing through that lead of the transistor I C or I E is usually what you use a transistor for I B is much smaller, and is the input used to control I C or I E I B is diode conduction, I C is not I E I C + I B Modes of operations Saturated (ON): I C is big Cutoff (OFF): I C is zero Active region: I C h FE I B
Transistor rules of operations (active region) 10 The following conditions need to be met in order to operate the transistor 1. V C > V E [if not, transistor not useful] 2. V B V E + 0.6V (B-E diode fwd-biased) [if not, cut-off mode I C 0] 3. V C > V B (B-C diode reverse-biased) [if not, saturated mode, I C is big] 4. Don t exceed max rating for I C, I B and V CE When all conditions are met: [Active region] h FE β : current gain (typically ~100) Using Kirchhoff s rule: I C h FE I B βi B I E I B + I C I B ( β +1) I C If the transistor cannot achieve its nominal β, saturated. I C βi B, the transistor is Since V B ~V E & I E >> I B, then input impedance >> output impedance. The transistor is able to control a large current I C I E with a small current I B.
Example Given V CC 20V, V B 5.6V. R 1 4.7k, R 2 3.3k and h FE 100. Find V E, I E, I B V E V B 0.6 5V I E V E 0 R 2 5 3.3k 1.5mA 11 I B I E ( 1+ h FE ) 1.5 100 0.015mA I C I E I B I E 1.5mA V C V CC I C R 1 20 1.5mA 4.7k 20 7 13V
Emitter follower Called follower because the output terminal (emitter) follows the input one (base). For an operating transistor: V out V E V B 0.6 12 v out v E v B where v, i represent the time varying signal (AC) From the above, we can determine the gain: ü (ie no voltage gain) Since ( ) i E i B β +1 output to input equal to β +1., follower exhibits a current gain of ( ) Assuming V out draws negligible current: i B i E β +1 v E R β +1 v B R β +1 ( ) i E v E R G v out v in v E v B 1 Here, R is the load, or the load is in parallel to R, but R dominates the equivalent resistance.
Emitter follower input/output impedance Input impedance of the follower (@base): Z in v in i in v B Z load ( β +1) i B 13 Output impedance (@ emitter): Z out v in i E v in Z source ( β +1)i B β +1 ( ) where Z source is the impedance of the circuit which gave rise to v in. The emitter-follower reduces the output impedance relative to that of the source impedance by a factor (β+1)~100. This configuration is useful for impedance matching applications, because of the very high input impedance while having a relatively low output impedance.
Emitter follower impedance (cont.) Thus the input and output sees what it wants to see on the other side of the transistor: 14 Z in Z load ( β +1) Input impedance as seen at the base Output impedance as seen at the emitter Z out Z source β +1 ( ) Using an emitter follower, a given signal source requires less power to drive a load than if the source were to drive the load directly ü Very good, since in general we want Z out (stage n) << Z in (stage n + 1) (by at least a factor of 10) ü An emitter follower has current gain, even though it has no voltage gain ü The emitter follower has power gain
Emitter Follower Summary The output voltage at the emitter is the same as the input voltage at the collector (i.e. follows ), with the exception of the 0.6V Gain 1 V B >0.6 for the transistor to turn-on, else voltage clipping. Output impedance is much larger than input impedance 15 I E >>I B, i.e current gain by factor h FE The circuit requires less power from the signal source (V in ) to drive the load than if the load was to be directly power by the source.
Common Emitter Amplifier Assume the input, is the sum of a DC offset voltage, V 0, and a time varying signal, v in. V 0 provides the transistor bias, so that V B >V E, and v in is the AC signal of interest. 16 Determining the AC signal gain: v out v in Collector resistor: Emitter: Transistor: Node @ output ( V cc V out ) R c I c V E R E I E V E V B 0.6 V B V in I E I C + I B I E I C ( 1+ β 1 ) (1) [Ohm s law] (2) [Ohm s law] (3) [Active region] I C βi B I B I C β 1 (4) From (1) V out V cc I c R c or v out i c R c [AC part] From (3) V in V B V E + 0.6 I E R E + 0.6 V in I C ( 1+ β 1 )R E + 0.6 (using (2)) (using (4)) v in i C ( 1+ β 1 )R E [AC part]
Common Emitter Amplifier (cont.) 17 Gain: v out v in i C i c R ( c 1+ β 1 )R E β ~ 100 β 1 ~ 0.01 A i R c R E AC gain of common emitter amplifier Note gain <0 à inverting amplifier + à -
Circuit biasing and input 18 How do we provide the input voltage (V 0 +v in ) to our common emitter amplifier? It is necessary to bias the follower so that I C flows during the entire signal swing. In this case, a voltage divider is the simplest way. R 1 & R 2 (voltage divider) provide the DC bias voltage (V 0 ) The time varying signal is input through C, which blocks outside DC current, which may affect the quiescent (no input) values ( AC-coupled follower ) f 3dB 1 2π R eq C so C 1 2π f 3dB R eq where R eq R 1 R 2 βr E
Circuit biasing and input (cont.) The diode and Z in represent the transistor input Voltage drop across B-E diode and input impedance R TH is the Thevenin equivalent resistance for the DC input network (R 1 & R 2 ) ( ) Z in R E β +1 19 Design procedure: 1. Choose the amplifier gain, if need be Choose R E to center V out between V CC and V EE R TH << Z in R E ( β +1) R TH < 1 10 βr E 2. Choose ie A i R c R E 3. Determine R 1 and R 2 based on the equivalent circuit 4. Choose C to provide a proper high-pass cutoff frequency Equivalent circuit as p16, for design of DC input network ü R of the RC high-pass is R TH in parallel with Z in, the input impedance of the follower ü Note that if the transistor circuit is connected to a load, the impedance that gets magnified will be R E in parallel with R load. f 3dB 1 2π R C [Hz] See Student Manual p90 for detailed worked out example in addition to the one here.
Common Emitter Amplifier Summary 20 Current gain, but no voltage gain Avoid clipping during negative input swings Voltage divider (R 1 & R 2 ) is used to give the input signal (after passing through the cap) a positive DC level or operating point (also known as quiescent point) Both input and output caps are added so that an AC input/output signal can be added without disturbing the DC operating point. Caps act as filters.
Common Emitter Amplifier: Design Design a Common Emitter Amplifier to power a 3k load, which has a supply voltage V CC 10 V, a transistor h FE 100 and a desired f 3DB point of 100 Hz. 21 1. Choose a quiescent current I Q I C. I C 1 ma 2. Select V E so that V E 1 to allow for the largest possible symmetric output 2 V CC swing without clipping. V E 5V. To set V E to this value and still get I C 1 ma, we can compute what R E should be: R E 1 2V CC I C 5 1mA 5k
Common Emitter Amplifier: Design (cont.) 3. Set V B V E + 0.6 for quiescent conditions (to match up V E so as to avoid clipping) To set V B we use the voltage divider. The ratio between R1 & R2 is determined by rearranging the voltage-divider relation and substitution into it V B. R 2 V B V E + 0.6 R 1 V CC V B V CC V E + 0.6 ( ) 22 We can make an approximation and set R 1 R 2. This forgets the 0.6 V drop, which usually isn t too dramatic. The actual size of R 1 & R 2 should be such that their parallel resistance is less or equal to 1/10 the DC (quiescent) input resistance at the base. This prevents the voltage divider from lowering under loading conditions: R 1 R 2 R 1 + R 2 1 10 R in(base),dc R 2 1 10 R (using the approx RR R ) in(base),dc 1 2 Here Thus R 1 R 2 100k R in(base),dc h FE R E 100 5k 500k Here we don t need to worry about the AC coupled load. It does not influence the voltage divider because we assume the quiescent setup conditions. C 2 acts as an open circuit, thus eliminating the presence of the load
Common Emitter Amplifier: Design (cont.) 4. Finally we need to choose the AC coupling capacitor, C 1, so that to block out the DC levels and other undesired frequencies. 23 C 1 forms a high-pass filter with R in. To find R in, we treat the voltage divider and R in(base), DC as being in parallel: No longer treat the load as being absent when fluctuating 1 signals are applied to the input. The capacitor begins to pass a displacement current. 1 R in 1 R 1 + 1 R 2 + R in(base),ac We must treat R E and R load in parallel and multiply by h FE to find R in(base), AC R R in(base),ac h E R load 5k 3k FE R E + R 100 load 5k + 3k 190k Let s find R in : 1 1 R in 100k + 1 100k + 1 190 R 40k in Now we can choose C 1 to set the f 3DB point (C 1 and R in form a high-pass filter): C 1 1 2π f 3DB R in 1 2π 100 40k 0.04µF C 2 forms a high-pass filter with the load: C 2 1 2π f 3DB R load 1 2π 100 3k 0.5µF
Backup 24
Emitter Follower Impedance 25 When measuring the input and output impedance of the emitter follower, it is useful to think about the Thévenin equivalent circuit as seen at the input and the output: ü Input impedance seen by the source: V in V B B in Zsource + Zin Z source Z in V Z in V ü Output impedance seen by the load: In the lab, identify what should be V B, V in and Z source V out, no load ~ Z out V out, load Z load V out, load Z out Zload + Z load V out, no load In the lab, identify what should be V out (with and without load), Z load