A_LT-2W & B_LT-2W Series 2W, FIXED INPUT, ISOLATED & UNULATED DUAL/SINGLE OUTPUT - CONVERTER FEATURES Efficiency up t 85% Lw Temperature rise 1KV Islatin SMD Package Operating Temperature Range: - C ~ +85 C N External Cmpnent Required Industry Standard Pinut PART NUMBER SYSTEM A55LT-1W SELECTION GUIDE Input Mdel Number Patent Prtectin RHS Vltage(V) Nminal (Range) Output Current Output (ma) Vltage (V) Max. Min. Input Current (ma)(typ.) @Max. @N Lad Lad APPLICATIONS The A_LT-2W&B_LT-2W Series are designed fr applicatin where islated utput is required frm a distributed pwer system. These prducts apply t where: 1) Input vltage variatin ±1%; 2) 1KV input and utput islatin; 3) Regulated and lw ripple nise is nt required. Such as: digital circuits, lw frequency analg circuits, and IGBT pwer device driving circuits. Reflected Ripple Current (ma,typ.) Max. Capacitive Lad # (µf) Efficiency (%, typ.) @Max. Lad A55LT-2W ±5 ± ± 484 33 37 82 A59LT-2W ±9 ±111 ±11 472 38 36 83 A512LT-2W ±12 ±83 ±8 461 33 25 84 A515LT-2W 5 ±15 ±67 ±7 473 48 45 82 (4.5-5.5) 5 494 54 B59LT-2W 9 222 23 468 36 2 82 B512LT-2W 12 167 17 468 36 5 84 B515LT-2W 15 133 14 476 35 42 A15LT-2W ±5 ± ± 193 16 45 83 A19LT-2W ±9 ±111 ±11 191 15 41 84 A1212LT-2W ±12 ±83 ±8 186 18 46 84 A1215LT-2W 12 ±15 ±67 ±7 193 46 85 B15LT-2W (1.8-13.2) 5 5 49 82 B19LT-2W 9 222 23 196 22 49 2 83 B1212LT-2W 12 167 17 189 19 53 85 B1215LT-2W Nte: # Fr each utput. INPUT SPECIFICATIONS 15 133 14 2 21 48 Input Surge Vltage (1sec. max.) Input Filter OUTPUT SPECIFICATIONS 5V input -.7 -- 9 12V input -.7 -- 18 Apprval The cpyright and authrity fr the interpretatin f the prducts are reserved by MORNSUN A_LT-2W & B_LT-2W B/2-12 Page 1 f 5 84 85 Capacitance Filter Output Pwer.2 -- 2 W Output Vltage Accuracy See tlerance envelpe curve V
Output Vltage Balance Dual Output, Balanced Lads -- ±.4 -- Line Regulatin Fr change f ±1% -- -- ±1.2 Lad Regulatin 1% t % lad 5V utput -- 12.8 15 9V utput -- 8.3 1 12V utput -- 6.8 1 15V utput -- 6.3 1 Temperature Drift % lad -- -- ±.3 %/ C Ripple & Nise* MHz Bandwidth -- 75 15 mvp-p Shrt Circuit Prtectin** -- -- 1 s Nte: 1.Dual utput mdels unbalanced lad: ±5%. 2.*Test ripple and nise by parallel cable methd. See detailed peratin instructins at Testing f Pwer Cnverter sectin, applicatin ntes. 3.**Supply vltage must be discntinued at the end f shrt circuit duratin. COMMON SPECIFICATIONS Islatin Vltage Tested fr 1 minute and leakage current less than 1 ma -- -- V Islatin Resistance Test at 5V -- -- MΩ Islatin Capacitance Input/Output,KHz/.1V -- 3 -- pf Switching Frequency Full lad, nminal input -- 7 -- KHz MTBF MIL-HDBK-217F@25 35 -- -- K hurs Case Material Epxy Resin (UL94-V) Weight -- 2.1 -- g ENVIRONMENTAL SPECIFICATIONS Strage Humidity Nn cndensing -- -- 95 % Operating Temperature Pwer derating (abve 85 ) - -- 85 Strage Temperature -55 -- 125 Temp. rise at full lad -- 25 -- Lead Temperature 1.5mm frm case fr 1 secnds -- -- 3 Cling EMC SPECIFICATIONS Free air cnvectin EMI CE CISPR22/EN5522 CLASS A(External Circuit Refer t Figure1) EMS ESD IEC/EN-4-2 Cntact±8KV perf. Criteria B % C EMC RECOMMENDED CIRCUIT A5XXLT-2W already meet CLASS A, fr ther mdels fllwing Figure 1. EMI Recmmended External Circuit: C1 EUT (Figure 1) (V) LOAD PRODUCT TYPICAL CURVE Tlerance Envelpe Curve +1% +5% Rated Output Vltage Output Vltage Accuracy(%) Typical Lad Line 5 7 Output Current Percent(%) (Nminal Input Vltage) A_LT-2W Series Recmmended external circuit parameters: :12V C1:2.2µF/5V +2.5% -2.5% -7.5% Output Pwer Percent(%) 1 B_LT-2W Series Recmmended external circuit parameters: :5V/12V C1:2.2µF/5V Safe Operating Area Temperature Derating Curve - 85 151 Ambient Temp.( ) The cpyright and authrity fr the interpretatin f the prducts are reserved by MORNSUN A_LT-2W & B_LT-2W B/2-12 Page 2 f 5
Efficiency(%) Efficiency VS Input Vltage curve (Full Lad) 9 7 5 3 1 4.6 4.7 4.8 4.9 5. 5.1 5.2 Input Vltage(V) 5.3 Tem perature ( C ) 5.4 A55LT-2W 5 5.5 25 15 Time (sec.) Remark: The curve applies nly t the ht air reflw sldering OUTLINE DIMENSIONS RECOMMENDED FOOTPRINT & PACKAGING Efficiency(%) Recmmended reflw Sldering Prfile 2C 1 Sec Max 2C 9 7 5 3 1 Efficiency VS Output Lad curve (=-nminal) 9 Sec Max (>2C) 1 3 5 7 9 Ttal Output Current (%) A55LT-2W MECHANICAL DIMENSIONS 17.78 ±.5.7±.] 15.24 [.] 1.16 [.] 5.8 [.] RECOMMENDED FOOTPRINT 15.24 [.] 1.16 [.] 5.8 [.] 14 13 12 1 9 8.±.1 [.24±.4] 1 ( Tp View) 2 3 5 6 7 12.7 ±. [.5 ±.8 ] 1.27±. [.5±.8] 2.1 [.83] 14 13 12 1 9 8 1 2 3 5 6 7 16.68[.657] 6. [.236] 5.75 [.226] (Frnt View) 3. [.118] 1. [.39] Nte: grid 2.54*2.54mm. 1.3±. [.51±.8] 2.54±. [.±.8].1 [.4] 14.36±. [.565±.8] (Side View) A ~ 5 17.78 ±.3 [.7±.12] Nte: Pin sectin tlerances: ±.1mm[±.4inch] General tlerances: ±.25mm[±.1inch] A.25 ±.1 [.1 ±. 4] FOOTPRINT DETAILS Pin 1 2 5 6 7 1 Others Single V :N Cnnectin Dual V The cpyright and authrity fr the interpretatin f the prducts are reserved by MORNSUN A_LT-2W & B_LT-2W B/2-12 Page 3 f 5
TUBE OUTLINE DIMENSIONS 21.5[.846] 14.3[.563] REEL PACKING OUTLINE DIMENSIONS 载带 : 4.[.157] 2.[.79] 1.5[.59] 18.[.79] 1.75[.69] 14.[.559] 1.5[.59].5[.] 8.[.315] 9.[.386] 7.[.299] 18.[.717] 32. [.2] 8.3[.327] 24. [.945] 6.[.268] 卷盘 : 37.[1.472] Nte: General tlerances: ±.5mm[±.inch] L=53mm[.866inch] Devices per tube quantity: 28pcs L=2mm[8.661inch] Devices per tube quantity: 1pcs Shrt tube inner package dimensins: L*W*H= 255*17*mm Shrt tube uter package dimensins(with six inner package bxes): L*W*H= 375*2*27mm Lng tube inner package dimensins: L*W*H= 5**mm Lng tube uter package dimensins(with tw inner package bxes): L*W*H= *215*2mm Lng tube uter package dimensins(with three inner package bxes): L*W*H= *215*325mm.[3.937] 13. [.512] Nte: 21.5 [.846] General tlerances: ±.5mm[±.inch] Per reel f packing quantity:pcs Innerpackage cartndimensins:l*w*h=365*35*15mm Tube Quantity:pcs Outerpackagecartndimensins: L*W*H=39*3*245mm Tube Quantity:1pcs 33.[12.992] TEST CONFIGURATIONS Input Reflected-Ripple Current Test Setup Input reflected-ripple current is measured with an inductr Lin and Capacitr Cin t simulate surce impedance. Oscillscpe Lin Cin Current Prbe Lad Lin(4.7µH) Cin(2µF, ESR < 1.Ω at KHz) DESIGN CONSIDERATIONS 1) Requirement n utput lad T ensure this mdule can perate efficiently and reliably, During peratin, the minimum utput lad culd nt be less than 1% f the full lad. If the actual utput pwer is very small, please cnnect a resistr with prper resistance at the utput end in parallel t increase the lad, r use ur cmpany s prducts with a lwer rated utput pwer (A_T 1W & B_T-1W series). 2) Overlad Prtectin Under nrmal perating cnditins, the utput circuit f these prducts has n prtectin against verlad. The simplest methd is add a circuit breaker t the circuit. 3) Recmmended circuit If yu want t further decrease the input/utput ripple, a capacitr filtering netwrk may be cnnected t the input and utput ends f the / cnverter, see (Figure 2). It shuld als be nted that the capacitance f filter capacitr must be prper. If the capacitance is t big, a startup prblem might arise. Fr every channel f utput, prvided the safe and reliable peratin is ensured, the recmmended capacitance f its filter capacitr sees (Table 1). Dual Output Cut Cin V Cut Single Output Cin Cut V (Figure 2) EXTERNAL CAPACITOR TABLE (TABLE 1) Cin Single Cut Dual (µf) Vut (µf) Vut (V) (V) (V) 5 4.7 5 1 ±5 4.7 12 2.2 9 4.7 ±9 2.2 - - 12 2.2 ±12 1 - - 15 1 ±15.47 Nte: # Fr each utput.it s nt recmmended t cnnect any external capacitr in the applicatin field with less than.5 watt utput. Cut # (µf) The cpyright and authrity fr the interpretatin f the prducts are reserved by MORNSUN A_LT-2W & B_LT-2W B/2-12 Page 4 f 5
4) Output vltage regulatin and ver-vltage prtectin circuit The simplest device fr utput vltage regulatin, ver-vltage and ver-current prtectin is a linear regulatr and an capacitr filtering netwrk with verheat prtectin that is cnnected t the input r utput end in series (Figure 3), the recmmended capacitance f its filter capacitr sees (Table 1), linear regulatr based n the actual vltage and current required. Dual Output 5) Cannt use in parallel and ht swap Single Output (Figure 3) V V Nte: 1. Operatin under minimum lad will nt damage the cnverter; Hwever, they may nt meet all specificatin listed. 2. Max. Capacitive Lad tested at input vltage range and full lad. 3. All date in the datasheet are measured accrding t nminal input vltage, rated utput lad, TA=25, humidity<75%, unless therwise specified. 4. In this datasheet, all the test methds f indicatins are based n ur crprate standards. 5. The perfrmance in the datasheet is just fit fr the part number in the selectin guide, and may be different frm the custmer-designed prduct, yu can get mre details frm MORNSUN FAE. 6. Cntact us fr yur specific requirement. 7. Specificatins subject t change withut prir ntice. MORNSUN Science & Technlgy C.,Ltd. Address: N. 5, Kehui St. 1, Kehui develpment center, Science Ave., Guangzhu Science City, Lugang district, Guangzhu,P.R.China. Tel: 86--38185 Fax:86--381272 Http://www.mrnsun-pwer.cm The cpyright and authrity fr the interpretatin f the prducts are reserved by MORNSUN A_LT-2W & B_LT-2W B/2-12 Page 5 f 5