Applications Point-to-Point Radio -Lead 8.0 x.0 x 2 mm Package Product Features Functional Block Diagram Frequency Range: 9.5 12 GHz Power: +42 dbm Psat Gain: 33 db Integrated Power Detector Bias: V D1 = V D2 = +7 V, I D1 + I D2 = 00 ma, V D3 = +28 V, I D3 = 260 ma Package Dimensions: 8.0 x.0 x 2 mm 1 19 18 17 16 15 14 13 12 11 2 3 4 5 6 7 8 9 General Description The Qorvo TGA2760-SM is a Power Amplifier with integrated power detector. The TGA2760-SM operates from 9.5 12 GHz and is designed using Qorvo s power GaAs phemt and GaN HEMT production processes. The TGA2760-SM typically provides +42 dbm of saturated output power with small signal gain of 33 db. The TG2760-SM is available in a low-cost, surface mount lead 8 x mm laminate package and is ideally suited for Point-to-Point Radio. Lead-free and RoHS compliant Pin Configuration Pin No. Label 1 RF IN 2, V G12 4, 18 V D1 5, 17 V D2 3, 6, 9,, 16, 19 NC 7, 15 V G3 8, 14 V D3 11 RF OUT 12 V REF 13 V DET Ordering Information Part No. ECCN Description TGA2760-SM 3A001.b.2.b.2 9.5 12 GHz 18 W Amp Standard T/R size = 500 pieces on a 7 reel Datasheet: Rev D 06-01-16-1 of 17 - Disclaimer: Subject to change without notice
Absolute Maximum Ratings Parameter Drain Voltage,V D1, V D2 Drain Voltage,V D3 Drain Current, I D1 + I D2 Drain Current, I D3 Power Dissipation, Driver Stages, P DISS Power Dissipation, Final Stage, P DISS RF Input Power, CW, 50 Ω, T = 25 C Rating +9 V +32 V 3850 ma 00 ma 14.8 W 28.8 W +29 dbm GaAs Channel Temperature, T CH 250 C GaN Channel Temperature, T CH 275 C Mounting Temperature ( Seconds) 260 C Storage Temperature to 150 C Operation of this device outside the parameter ranges given above may cause permanent damage. Recommended Operating Conditions Parameter Min Typ Max Units Operating Temp. Range +25 +85 C V D1, V D2 +7 V V D3 +28 V I D1 + I D2 00 ma I D3 260 ma V G12 0.7 V V G3 2.6 V I D1 + I D2 drive (at +39 dbm Pout) 18 ma I D3 drive (at +39 dbm Pout) 9 ma Electrical performance is measured under conditions noted in the electrical specifications table. Specifications are not guaranteed over all recommended operating conditions. Datasheet: Rev D 06-01-16-2 of 17 - Disclaimer: Subject to change without notice
Electrical Specifications Test conditions unless otherwise noted: V D1 = V D2 = +7 V, I D1 + I D2 = 00 ma, V G1 = V G2 = 0.7 V, V D3 = +28 V, I D3 = 260 ma, V G3 = 2.6 V, Temp = +25 C, Z 0 = 50 Ω Parameter Conditions Min Typ Max Units RF Frequency Range 9.5 12.0 GHz Small Signal Gain 33 db Input Return Loss, IRL 8 db Output Return Loss, ORL 8 db Output Power at Pin = +12 dbm +42 dbm Output Third Order Intercept, TOI at +35 dbm / Tone +52 dbm Power Added Efficiency 36 % Gain Temperature Coefficient 0.05 db / C Power Temperature Coefficient 0.01 dbm / C Notes: 1. Datasheet: Rev D 06-01-16-3 of 17 - Disclaimer: Subject to change without notice
Median Lifetime, Tm (Hours) Thermal and Reliability Information (Driver Stages) TGA2760-SM Parameter Conditions Rating Thermal Resistance, θ JC, measured to back of package T BASE = +85 C θ JC_DRIVER = 8.2 C/W Channel Temperature (T CH ), and Median Lifetime (T M ) T BASE = 85 C, V D_DRIVER = +7 V, I D_DRIVER = 00 ma,p DISS_DRIVER = 7.0 W T CH_DRIVER = 142 C T M_DRIVER = 8.8E+8 Hours Channel Temperature (T CH ), and Median Lifetime (T M ) at +39 dbm Pout T BASE = +85 C, V D_DRIVER = +7 V, I D_DRIVER = 18 ma, P DISS_DRIVER = 7.1 W T CH_DRIVER = 143 C T M_DRIVER = 7.8E+8 Hours 1.0E+15 Median Lifetime (Tm) vs. Channel Temperature (Tch) 1.0E+14 1.0E+13 1.0E+12 1.0E+11 1.0E+ 1.0E+09 1.0E+08 1.0E+07 1.0E+06 1.0E+05 FET14 1.0E+04 25 50 75 0 125 150 175 0 Channel Temperature, Tch ( C) Datasheet: Rev D 06-01-16-4 of 17 - Disclaimer: Subject to change without notice
Median Lifetime (Hours) TGA2760-SM Thermal and Reliability Information (Final Stage) Parameter Conditions Rating Thermal Resistance, θ JC, measured to back of package Channel Temperature (T CH ), and Median Lifetime (T M ) Channel Temperature (T CH ), and Median Lifetime (T M ) at +39 dbm Pout T BASE = +85 C T BASE = 85 C, V D_FINAL = +28 V, I D_FINAL = 260 ma P DISS_FINAL = 7.3 W T BASE = +85 C, V D_FINAL = +28 V, I D_FINAL = 9 ma, P DISS_FINAL = 26 W 8 W = 18 W θ JC_FINAL = 5.1 C/W T CH_FINAL = 122 C T M_FINAL = 4.8E+ Hours T CH_FINAL = 177 C T M_FINAL = 1.1E+8 Hours 1E+18 1E+17 1E+16 1E+15 1E+14 1E+13 1E+12 1E+11 1E+ 1E+09 1E+08 1E+07 1E+06 1E+05 1E+04 Median Lifetime vs. Channel Temperature FET13 25 50 75 0 125 150 175 0 225 250 275 Channel Temperature ( C) Datasheet: Rev D 06-01-16-5 of 17 - Disclaimer: Subject to change without notice
Gain (db) Gain (db) Output Power (dbm) Output Power (dbm), Gain (db) Current, Id (ma) Gain (db) Return Loss (db) Gain (db) Return Loss (db) TGA2760-SM Typical Performance Test conditions unless otherwise noted: V D1 = V D2 = +7 V, I D1 + I D2 = 00 ma, V G1 = V G2 = 0.7 V, V D3 = +28 V, I D3 = 260 ma, V G3 = 2.6 V, Temp = +25 C, Z 0 = 50 Ω S-Parameter vs. Frequency 0 S-Parameter vs. Frequency 0 35-5 35 5 25 15 - -15 25 15 15 5 0 Gain IRL - ORL -25 6 7 8 9 11 12 13 14 Frequency (GHz) 5 0 Gain IRL ORL 25 9 12.5 Frequency (GHz) Output Power vs. Frequency 46 44 42 38 Psat 36 P1dB 34 32 28 26 Frequency 45 35 25 15 5 Pout, Gain, Id vs. Pin @.5 GHz Id1 + Id2 Id3 Pout Gain 0 0 - -15 - -5 0 5 15 Input Power (dbm) 4500 00 3500 00 2500 00 1500 00 500 38 36 34 32 28 26 24 22 18 Gain vs. Frequency vs. Bias (Vd1 and Vd2) Vd3 = 28 V, Id3 = 260 ma, Vg3 = -2.6 V Typical 6V 700mA 6V 00mA 7V 700mA 7V 00mA 9 12.5 Frequency (GHz) 38 36 34 32 28 26 24 22 18 Gain vs. Frequency vs. Bias (Vd3) Vd1 = Vd2 = 7 V, Id1 + Id2 = 00 ma, Vg12 = -0.7 V Typical 25V 260mA 28V 260mA 28V 5mA 28V 650mA 9 12.5 Frequency (GHz) Datasheet: Rev D 06-01-16-6 of 17 - Disclaimer: Subject to change without notice
AM-PM (degrees) Vdiff (V) = Vdet - Vref P1dB (dbm) P1dB (dbm) Psat (dbm) Psat (dbm) TGA2760-SM Typical Performance Test conditions unless otherwise noted: V D1 = V D2 = +7 V, I D1 + I D2 = 00 ma, V G1 = V G2 = 0.7 V, V D3 = +28 V, I D3 = 260 ma, V G3 = 2.6 V, Temp = +25 C, Z 0 = 50 Ω 46 44 42 38 36 34 32 28 Psat vs. Frequency vs. Bias (Vd1 and Vd2) Vd3 = 28 V, Id3 = 260 ma, Vg3 = -2.6 V Typical 6V 700mA 6V 00mA 7V 700mA 7V 00mA 26 Frequency 46 44 42 38 36 34 32 28 Psat vs. Frequency vs. Bias (Vd3) Vd1 = Vd2 = 7 V, Id1 + Id2 = 00 ma, Vg12 = -0.7 V Typical 25V 260mA 28V 260mA 28V 5mA 28V 650mA 26 Frequency 38 36 34 32 28 26 24 22 P1dB vs. Frequency vs. Bias (Vd1 and Vd2) Vd3 = 28 V, Id3 = 260 ma, Vg3 = -2.6 V Typical 6V 700mA 6V 00mA 7V 700mA 7V 00mA 18 Frequency 38 36 34 32 28 26 24 22 P1dB vs. Frequency vs. Bias (Vd3) Vd1 = Vd2 = 7 V, Id1 + Id2 = 00 ma, Vg12 = -0.7 V Typical 25V 260mA 28V 260mA 28V 5mA 28V 650mA Frequency 50 AM-PM vs. Pout vs. Frequency Power Detector vs. Pout vs. Frequency 9.5 GHz GHz.7 GHz 11.7 GHz 1 9.5 GHz GHz.7 GHz 11.7 GHz 0.1 0-15 25 35 45 Output Power (dbm) 0.01 15 25 35 45 Output Power (dbm) Datasheet: Rev D 06-01-16-7 of 17 - Disclaimer: Subject to change without notice
Output TOI @ 35 dbm/tone (dbm) Output TOI @ 35 dbm/tone (dbm) IM3 (dbc) IM5 (dbc) Noise Figure (db) Output TOI (dbm) TGA2760-SM Typical Performance Test conditions unless otherwise noted: V D1 = V D2 = +7 V, I D1 + I D2 = 00 ma, V G1 = V G2 = 0.7 V, V D3 = +28 V, I D3 = 260 ma, V G3 = 2.6 V, Temp = +25 C, Z 0 = 50 Ω Noise Figure vs. Frequency 9 8 7 6 5 4 3 2 1 0 Frequency TOI vs. Frequency vs. Pout/Tone 60 55 50 45 35 Pout/Tone = 31 dbm 25 Pout/Tone = 33 dbm Pout/Tone = 35 dbm 15 Frequency (GHz) IM3 vs. Pout/Tone vs. Frequency - -15 - -25 - -35-9.5 GHz -45.0 GHz -50 11.0 GHz -55 11.5 GHz -60 22 24 26 28 32 34 36 38 Output Power (dbm/tone) IM5 vs. Pout/Tone vs. Frequency - -15 9.5 GHz -.0 GHz -25 11.0 GHz - 11.5 GHz -35 - -45-50 -55-60 22 24 26 28 32 34 36 38 Output Power (dbm/tone) 60 55 50 45 35 25 15 TOI vs. Frequency vs. Bias (Vd1 and Vd2) Vd3 = 28 V, Id3 = 260 ma, Vg3 = -2.6 V Typical 6V 700mA 6V 00mA 7V 700mA 7V 00mA Frequency (GHz) 60 55 50 45 35 25 15 TOI vs. Frequency vs. Bias (Vd3) Vd1 = Vd2 = 7 V, Id1 + Id2 = 00 ma, Vg12 = -0.7 V Typical 25V 260mA 28V 260mA 28V 5mA 28V 650mA Frequency (GHz) Datasheet: Rev D 06-01-16-8 of 17 - Disclaimer: Subject to change without notice
Vdiff (V) = Vdet - Vref Psat (dbm) P1dB (dbm) Gain (db) Output TOI @ 34 dbm Pout/Tone (dbm) Typical Performance TGA2760-SM Test conditions unless otherwise noted: V D1 = V D2 = +7 V, I D1 + I D2 = 00 ma, V G1 = V G2 = 0.7 V, V D3 = +28 V, I D3 = 260 ma, V G3 = 2.6 V, Temp = +25 C, Z 0 = 50 Ω 45 35 25 15 5 0 Gain vs. Frequency vs. Temperature - C +25 C +85 C 9 12.5 Frequency (GHz) TOI vs. Frequency vs. Temperature 60 55 50 45 35 - C +25 C 25 +85 C 15 Frequency Psat vs. Frequency vs. Temperature 46 44 42 38 36 34 - C 32 +25 C +85 C 28 26 Frequency P1dB vs. Frequency vs. Temperature 38 36 34 32 28 26 - C 24 +25 C 22 +85 C 18 Frequency Power Detector vs. Pout vs. Temperature 1 - C +25 C +85 C 0.1 0.01 15 25 35 45 Output Power (dbm) Datasheet: Rev D 06-01-16-9 of 17 - Disclaimer: Subject to change without notice
Pin Configuration and Description 19 18 17 16 15 14 13 12 1 21 11 2 3 4 5 6 7 8 9 Top View Pin No. Label Description 1 RF IN RF Input, matched to 50 Ω, AC Coupled. 2, V G12 Gate voltage. Bias network is required; can be biased from either pin, and non-biased pin can be left open; see Application Circuit on page 11 as an example. 3, 6, 9,, 16, 19 NC No internal connection; can be grounded on PCB. 4, 18 V D1 5, 17 V D2 7, 15 V G3 8, 14 V D3 Drain voltage. Bias network is required; see Application Circuit on page 11 as an example. Drain voltage. Bias network is required; see Application Circuit on page 11 as an example. Gate voltage. Bias network is required; can be biased from either pin, and non-biased pin can be left opened; see Application Circuit on page 11 as an example. Drain voltage. Bias network is required; see Application Circuit on page 11 as an example. 11 RF OUT RF Output, matched to 50 ohms, AC Coupled. 12 V REF Reference diode output voltage. 13 V DET Detector diode output voltage. Varies with RF output power. 21 GND Backside Paddle. Multiple vias should be employed to minimize inductance and thermal resistance; see Mounting Configuration on page 14 for suggested footprint. Datasheet: Rev D 06-01-16 - of 17 - Disclaimer: Subject to change without notice
Application Circuit Vg3 Vd3 Vg12 19 18 17 16 15 14 13 12 RF IN 1 TGA2760-SM 11 RF OUT 2 3 4 5 6 7 8 9 Vg12 Vd3 Vg3 V G12 can be biased from either side, and the non-biased side can be left open. V D1, V D2, V D3, V G3 must be biased from both sides. R5, R6 are external resistors, not built on board. Bias-up Procedure V G12 set to 1.5 V V G3 set to 3.5 V V D1, V D2 set to +7 V V D3 sets to +28 V Adjust V G12 more positive until quiescent I D is 00 ma. This will be ~ V G = 0.7 V typical Adjust V G3 more positive until quiescent I D is 260 ma. This will be ~ V G = 2.6 V typical Apply RF signal Bias-down Procedure Turn off RF signal Reduce V G12 to 1.5 V. Ensure I D ~ 0 ma Reduce V G3 to 3.5 V. Ensure I D ~ 0 ma Turn V D1, V D2, V D3 to 0 V Turn V G12, V G3 to 0 V Datasheet: Rev D 06-01-16-11 of 17 - Disclaimer: Subject to change without notice
Application Circuit PC Board Layout Board material is RO03 0.008 thickness with ½ oz copper cladding. For further technical information, refer to the TGA2760-SM Product Information page. Bill of Material Ref Des Value Description Manufacturer Part Number C1 C8 0 pf Cap, 02, +50 V, 5%, COG various C9 C18 1 µf Cap, 0603, +50 V, 5%, X5R various R1 R4 Ω Res, 02, 1/16W, 5%, SMD various U1 Qorvo TGA2760-SM Datasheet: Rev D 06-01-16-12 of 17 - Disclaimer: Subject to change without notice
Mechanical Information Package Marking and Dimensions All dimensions are in millimeters. The TGA2760-SM will be marked with the TGA2760-SM designator and a lot code marked below the part designator. The M is the vendor code, and XXXXXXX represents assembly lot number. This package is lead-free/rohs-compliant with an embedded heat spreader, and the plating material on the leads is NiAu. It is compatible with both lead-free (maximum 260 C reflow temperature) and tin-lead (maximum 245 C reflow temperature) soldering processes. Datasheet: Rev D 06-01-16-13 of 17 - Disclaimer: Subject to change without notice
Mechanical Information PCB Mounting Pattern RFin RFout Notes: 1. The pad pattern shown has been developed and tested for optimized assembly at Qorvo. The PCB land pattern has been developed to accommodate lead and package tolerances. Since surface mount processes vary from company to company, careful process development is recommended. 2. Ground vias are critical for the proper performance of this device. Vias should have a final plated thru diameter of.1524 mm (.006 ). 3. For best thermal performance, vias under the ground paddle should be copper filled. Datasheet: Rev D 06-01-16-14 of 17 - Disclaimer: Subject to change without notice
Tape and Reel Information Standard T/R size = 500 pieces on a 7 reel. Vendor Material Vendor P/N Tek-Pak QFN0500X0500 F-L500 Length (A0) Cavity (mm) Width (B0) Depth (K0) Pitch (P1) Distance Between Centerline (mm) Length Width direction Direction (P2) (F) Carrier Tape (mm) Width (W) Cover Carrier (mm) Width (W) 8.4.4 2.4 12.0 8.. 12.0 24.0 Datasheet: Rev D 06-01-16-15 of 17 - Disclaimer: Subject to change without notice
Product Compliance Information ESD Sensitivity Ratings Caution! ESD-Sensitive Device ESD Rating: Class 1A Value: Passed 250 V Test: Human Body Model (HBM) Standard: JEDEC Standard JESD22-A114 ESD Rating: Class C2a Value: Passed 500 V Test: Charge Device Model (CDM) Standard: JEDEC Standard JS-002-14 MSL Rating MSL Rating: 3 Test: 260 C convection reflow Standard: JEDEC Standard IPC/JEDEC J-STD-0 Solderability Compatible with lead-free soldering processes, 260 C maximum reflow temperature. Package lead plating: NiAu. The use of no-clean solder to avoid washing after soldering is recommended. RoHs Compliance This part is compliant with EU 02/95/EC RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and Electronic Equipment). This product also has the following attributes: Lead Free Halogen Free (Chlorine, Bromine) Antimony Free TBBP-A (C 15 H 12 Br 4 0 2 ) Free PFOS Free SVHC Free Recommended Solder Temperature Profile Datasheet: Rev D 06-01-16-16 of 17 - Disclaimer: Subject to change without notice
Contact Information For the latest specifications, additional product information, worldwide sales and distribution locations: Web: Tel: 1-844-890-8163 Email: customer.support@qorvo.com For technical questions and application information: Email: info-networks@qorvo.com Important Notice The information contained herein is believed to be reliable. Qorvo makes no warranties regarding the information contained herein. Qorvo assumes no responsibility or liability whatsoever for any of the information contained herein. Qorvo assumes no responsibility or liability whatsoever for the use of the information contained herein. The information contained herein is provided "AS IS, WHERE IS" and with all faults, and the entire risk associated with such information is entirely with the user. All information contained herein is subject to change without notice. Customers should obtain and verify the latest relevant information before placing orders for Qorvo products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. Qorvo products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death. Datasheet: Rev D 06-01-16-17 of 17 - Disclaimer: Subject to change without notice
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