ITRS Update (and the European situation) Mart Graef Delft University of Technology
Overview Roadmapping: Moore s Law & More than Moore Europe and the Roadmap Beyond CMOS: Nano-Tec Infrastructures: ENI2 New directions 2
Overview Roadmapping: Moore s Law & More than Moore Europe and the Roadmap Beyond CMOS: Nano-Tec Infrastructures: ENI2 New directions 3
International Technology Roadmap for Semiconductors (ITRS) 1998 - now 2013 ITRS 2012 ITRS Update 2011 ITRS 2010 ITRS Update 2009 ITRS 2008 ITRS Update 2007 ITRS http://www.itrs.net 1997 NTRS 1994 NTRS 1992 NTRS 1991 MicroTech 2000 Report USA Japan Korea Taiwan USA 2006 ITRS Update 2005 ITRS 2004 ITRS Update 2003 ITRS 2002 ITRS Update 2001 ITRS 2000 ITRS Update 1999 ITRS Europe 1998 ITRS Update 4
ITRS Objective Provide guidance to the semiconductor industry by predicting technology trends in the industry, spanning 15 years (near-term 1-6 yrs; long-term 7-15 yrs) 5
ITRS Organization and Implementation Organization International Roadmap Committee (IRC) 16 international technology working groups (ITWGs) ITRS release every 2 years 16 chapters, ~1000 pages, >200 tables >300 contributors, representing >50 companies ww Update of tables every other year 3 Workshops/year Europe (spring / Semicon Europa) USA (summer / Semicon West) Asia (winter / Semicon Japan) 2 Public symposia/year (incl. press conference) ~130 participants 6
ITRS Technology Working Groups 1. System Drivers 2. Design 3. Test & Test Equipment 4. Process Integration, Devices & Structures 5. RF and Analog/Mixed Signal 6. Emerging Research Devices 7. Emerging Research Materials 8. Front End Processes 9. Lithography 10.Interconnect 11.Factory Integration 12.Assembly & Packaging 13.Environment, Safety & Health 14.Yield Enhancement 15.Metrology 16.Modeling & Simulation 7
Impact of the ITRS Provides a benchmark for the semiconductor industry Identifies technology challenges Generates industrial and academic research agenda Is used by policy-makers 8
EC: New European strategy for electronics 9
Roadmapping: Requirements for technology scaling 10
The Red Brick Wall 11
Cumulative Interdependent Challenges More Moore: Increasing complexity Area Speed Power Yield Software and co-design become vital! Late CMOS Gate leakage Variability FINFET FDSOI Multi-MG High k Low k Strained SiGe Manual Design Happy Scaling 5 3.3 1.8 1.2 V S/D leakage 0.5 0.2 V Dynamic power Low cost, low power Critical dimension [nm] 500 250 180 130 90 65 45 32 22 Year 1980 1990 2000 2010 2020 12
Reaching dimension/complexity limits 1 1000 1M 1G 1T Complexity in # of devices 10 mm 1947 1958 100 µm 1 µm 10 nm Quantum computing Spintronics Molecular electronics Nanotubes Graphene 2013 Validated concept 1 Å 2020 Beyond CMOS? Source: STMicroelectronics 13
Parameterization of emerging technologies Source: ITRS/Intel 14
More Moore & More than Moore Source: ITRS (2011) 15
Smart microsystems: Beyond CMOS = More Moore + More than Moore Data Processing & Storage Radio Power Sensor & Actuator More Moore More than Moore Heterogeneous Integration 16
Why a Moore than More Roadmap? ITRS has demonstrated value of roadmapping for CMOS Identify pre-competitive research domains, enabling cooperation between industries, institutes and universities. Sharing of R&D efforts Increase resource efficiency through focus Reduction of development costs and time Synchronization of the equipment & materials community with the semiconductor manufacturing community More than Moore roadmapping offers a similar but more challenging opportunity Need to propose a roadmapping methodology White paper 17
More than Moore White Paper Roadmapping Methodology Published by the ITRS in 2010 http://www.itrs.net/papers.html More-than-Moore workshops Co-organized by ITRS and inemi Potsdam (D), April 2011 Noordwijk (NL), April 2012 Lyon (F), April 2013 18
MtM Technology Assessment in ITRS FOM LEP SHR WAT ECO In ITRS today? Figure of merit Law of expected progress Willing-ness to share Wide applicability Existing community RF ++ ++ + +/++ + Yes Power + +? =? No Imaging + +? =? No Sensors / actuators (MEMS) --?? ++ -- Yes Biochips --? --? -- No 19
MtM Roadmapping Process 20
Moore s Law Extended 21
22
Convergence of Semiconductors with Synthetic Biology I D. Herr, SRC SemiSynBio Workshop, February 2013 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 SemiSynBio Inspired Cell-Like Functionality Energy Generation Conversion Storage Utilization Architectures Research Narrow Options Prototype Continuous Improvement Sensing Physical Chemical Multimode Multiscale Subsurface Research Narrow Options Prototype Continuous Improvement Actuation Analog Digital Hybrid Approaches Hard and Soft/Adaptive Systems Autonomous Emergent Behavior Research Narrow Options Prototype Continuous Improvement Communication Transmission Filtering Novel A/D Interconversions Low Energy Approaches Reception Research Narrow Options Prototype Continuous Improvement Bioelectronics Personalized Medical Diagnostics Prosthetics and Implantable Devices Biotic/Abiotic Interfaces Multiproperty Imaging Noninvasive [Tricorder-like] Research Narrow Options Prototype Continuous Improvement Adaptive Coatings Dynamic Local Mapping Camouflage Obscuration Smart Physical Changes Remotely Directed Adaptations Research Narrow Options Prototype Continuous Improvement 23
ITRS: Towards a permanent process Cooperation with inemi started Introduction More-than- Moore concept MEMS Working Group started Test case for roadmap codesign 24
Overview Roadmapping: Moore s Law & More than Moore Europe and the Roadmap Beyond CMOS: Nano-Tec Infrastructures: ENI2 New directions 25
NANO-TEC Ecosystems Technology & Design for Nanoelectronics FP7 Support Action Objective To identify the next generation of emerging device concepts and technologies for ICT, through a foresight exercise on medium and long-term requirements in nanolectronics research To build a joint technology-design community to coordinate research efforts in nanoelectronics, by harmonising the efforts of existing and new initiatives and projects www.fp7-nanotec.eu 26
NANO-TEC recommendations: Technology transfer challenges (1) Integratability Possibility of integration of a switching device with other components towards a computing system or a more complex functional system Systemability The ability to economically design and manufacture reliable systems from the interaction of devices fabricated in a given technology. The simplest system in logic should be a full functional computing system. Manufacturability Possibility of manufacturing in a reliable and reproducible way, in compliance with industrial practice 27
NANO-TEC recommendations: Technology transfer challenges (2) Type Device/concept Integratability Systemability Manufacturability Charge-based state variable Non charge-based state variable New computing paradigms Graphene Nanowire Molecular electr. NEMS Spintronics Molecular electr. Neuromorphic Quantum Feasibility demonstrated Proof of concept in progress Major research challenge 28
ENI2 An open European Nanoelectronics Infrastructure for Innovation Objective: Create and sustain a durable multi-disciplinary distributed research infrastructure with 3-6-9 year horizons To work towards the definition of a strong set of common long term R&D strategic nanoelectronics programs To establish strategic groupings of research communities with common interests and expertise, and focus resources on target issues 29
ENI2 30
Overview Roadmapping: Moore s Law & More than Moore Europe and the Roadmap Beyond CMOS: Nano-Tec Infrastructures: ENI2 New directions 31
New Directions: Crossroads and bridges Academic Pilot Industrial facilities lines facilities 32
Nanoelectronics Ecosystem 33
Innovation Supply Chain TRL 9 8 7 6 5 4 3 2 1 Institute/ University Basic Res. Pilot line OEM Foundry Technology transfer Time 34
Conclusion The Roadmap continues, but the rules are changing More than Moore is (still) a great opportunity for the European nanoelectronics community Application/Technology roadmapping is essential for guiding the European strategic research agenda An effective academic/industrial ecosystem is the backbone of the European nanoelectronics innovation chain 35
Acknowledgments My colleagues in The ITRS International Roadmap Committee The NANO-TEC consortium The ENI2 consortium 36