Microsystem Technology for Eddy Current Testing Johannes PAUL, Roland HOLZFÖRSTER

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11th European Conference on Non-Destructive Testing (ECNDT 2014), October 6-10, 2014, Prague, Czech Republic More Info at Open Access Database www.ndt.net/?id=16638 Microsystem Technology for Eddy Current Testing Johannes PAUL, Roland HOLZFÖRSTER Sensitec GmbH, 55131 Mainz, Germany; Phone: +49 6131 9062121, Fax +49 6131 9062199; e-mail: johannes.paul@sensitec.com, roland.holzfoerster@sensitec.com Abstract Magnetic flux leakage detection and eddy current testing is studied more and more by means of sensor chips based on thin film technology. Magnetoresistive sensor chips, for example, are used to measure AC or DC magnetic fields emitted by the device under test. In case of surface cracks detection, the magnetic field sensing elements (e.g. GMR-stripes) must be placed very close to the surface under test. Here we show techniques to achieve distances in the order of 100µm between the sensing elements and the cracks. In addition we demonstrate a high density of GMR elements in a linear array. Both aspects together allow to detect small surface cracks with a high spatial resolution. Alternatively two dimensional microcoil arrays can be implemented in the design. These microcoils can have diameters smaller than 300µm and can have a magnetic core. Keywords: microsystem technology, Sensors, Magnetic sensors, microcoils 1. Introduction In many applications it is important to detect, localize and characterize small surface related defects by means of NDT (non destructive testing). In order to analyze small defects it is obvious that the sensing unit is not significantly larger than the defect itself. Otherwise the sensing unit averages over a too large area and mixes the signal from the defect with signal from the intact area. In addition, approaching the surface as close as possible will further improve the detectability limit of small defects. These tasks are critical for sensors made in thin film technology. Incorporation of a silicon die in a NDT probe requires a very well controlled mounting and assembly of the chip in the probe head which guarantees a small distance to the surface as well good protection of the chip and the surface to avoid any damage on the chip or on the device under test. 2. Sensor chips 2.1 Chip design Chip design should follow the simple role that the sensing elements are as close as possible to the surface or edge of the chip to obtain maximum sensitivity. For improving the spatial resolution it is advantageous to have an array of identical sensing elements. In that case the surface will be scanned by many sensing elements in parallel which reduces inspection time. Typically all materials are deposited on top of a silicon wafer. The wafer is just the substrate to hold the thin film structure and has a thickness of 100-700 µm in general. After being processed completely separating of each chip is achieved by dicing the substrate. In figure 1 an example is given for GMR (giant magneto resistive) sensing elements. This silicon based chip was designed during the IMAGIC project [1]. Here 32 GMR elements are arranged in a one dimensional array with a pitch of 125µm. As one can see in figure 2, the dicing edge is not perfect but rather rough. Chipping of the silicon substrate leads to this roughness. Therefore it is recommended to keep a distance between the sensing structures (i.e. GMR elements) and the edge of the chip. Here it is shown, that the GMR elements are just 25µm away from the edge of the chip after dicing.

Figure 1 Micrograph of a GMR chips for NDT. All GMR sensitive area is very close to the top edge (see picture on right side). On the opposite edge the contact pads are arranged. Figure 2 Micrograph of a dicing street in case of a GMR sensor. It can be seen that the distance between the C-shaped GMR sensing element to the edge of the chip is 25µm. Chipping does not affect any sensitive structure of the chip. 2.2 Chip on board technology The chip itself needs to be mounted on a PCB or other substrate which can be connected to a cable. In this step, tolerances in chip placement are required to be reduced. The challenge in chip on board (COB) technology is to place the chip accurately on the edge of the board. Otherwise there is additional distance between the sensing elements and the device under test (DUT) at the end. The chips are mounted on a substrate by gluing. The glue is put on topside of the PCB first and then the chip is placed into the glue. The accuracy of a pick and place tool is very high normally (< 10µm). The problem occurs when the glue is annealed to become cured. In case the glue has not a homogeneous thickness the chip will relax during curing and moves significantly. An alternative solution is using a two in one tape [2] already during dicing. Here the dicing tape has two functions. First it fixes the singulated chips during or after dicing because the chips stick on the tape. In addition the glue for fixing the chip on a substrate is already existing and much more homogeneous compared to a droplet

of glue. In figure 3 there is a comparison between the two technologies. The GMR chip at the edge is placed by means of a two in one dicing tape, the ASIC is placed conventionally. In case of the ASIC it is easy to see the white glue which surrounds the chip. In case of the GMR sensor chip no glue can be observed at all. The quality of chip placement is in the range of 10µm which is very good because the chip is 4mm long. Figure 3 Left side demonstrates the accurate placing of a GMR chip exactly at the edge of a PCB. Note that the sensing GMR stripes are just 25 +- 10 µm away from the edge of the PCB. An ASIC is placed parallel to the GMR chip. Right side: bonding technology allows to transport each single GMR sensing element to the ASIC and from the ASIC to the PCB where it can be further analyzed by different type of electronics. Two type of bonding techniques are combined in figure 3. First, wires are bonded from chip to chip. This is the connection between the MR sensor and an ASIC. In addition bonding wires are connected from the ASIC to PCB. Finally it is possible to read out all signals from a 32 GMR elements with a small pitch at the electronics. Because all bonding connections are in parallel it is possible to replicate the two chip arrangement, i.e. placing a second, third or fourth GMR chip and a second, third or fourth ASIC sidewise to the first in order to scan more surface at the same time. The fragile chips and bonding wires need to be protected against mechanical damage. This is the reason why the full COB area is covered with a protecting layer called glop-top. The globtop material is a specially formulated epoxy resin [3] which is suspended over the COB area and cured in an oven. The challenge is to protect all surfaces of the chip and ASIC but not the edge of the GMR chip and the PCB. In figure 4 the result is presented. By proper sealing of the chip edge during the dispersion of the glob-top, it could be avoided that any epoxy material could flow in front of the chip. At the end, the very low distance between the sensing elements and the DUT can be preserved. At this stage one can decide if a soft protective layer is required to protect the DUT from the chip and vice versa to protect the chip from the device under test. Here a polyimide sheet might be a good choice because they can be very thin (< 50µm).

Figure 4 View from the perspective of the DUT. The MR chip is seen embedded in a protective resin except the surface towards the DUT. The sensitive area of the chip is just 25µm behind the surface. Figure 5 Microcoils in thin film technology. Coils with a pitch of 300µm can be produced in a 1- or 2- dimensional array.

3. Microcoils Another thin film related technique which is relevant for NDT might be the development of microcoils. As can be seen in figure 5, very small copper based coils are electroplated in a two-dimensional array. A plated softmagnetic pole is placed in the center of each coil. The arrangement of the array is defined by the photolithographic mask. For an application in printing industry an array of more than 600 coils is realized []. The size of an individual coil is in the range of 200µm. The electrical resistance of a coil with 10 windings is in the range of a few Ohms. The height of the copper wires is in the range of 10µm. The pitch of the coil windings is in the same range as the height. Aspect ratio (relation between height and pitch of the windings) cannot be much more than 2. These microcoils are not yet used in NDT to our knowledge. Clearly they have the advantage to offer very high spatial resolution to detect small defects. A disadvantage is the silicon wafer substrate. After the processing of the coils the substrate remains rigid and cannot be bounded. 4. Conclusions By means of thin film technology, new sensing technology could be used for NDT applications. In this paper we have shown how magnetoresistive sensors can be integrated in a PCB-based probe to obtain very good surface resolution. By combination of chip design and state of the art assembly techniques we have achieved distances smaller than 100µm between the MR sensing elements and the DUT. Nevertheless the probe can be handled normally and has high spatial resolution. Acknowledgements The research has partly been supported by the FP7 framework, within IMAGIC project, grant agreement no. 288381, call (part) identifier FP7-ICT-2011-7, which is funded by EC. References [1] http://www-civa.cea.fr/en/civa-ndt-simulation-platform/key-projects/imagic-project/ [2] for example Dicing Die Mountig Tape by Lintec: LE 5003 P8AS; http://www.lintec.co.jp/edept/english/adwill/di/ [3] http://www.bondingsource.com/techdata/loctite-fp%204401.pdf; http://www.bondingsource.com/techdata/loctite-fp%204650.pdf