ESDA24P140-1U3M. High power transient voltage suppressor. Datasheet. Features. Application. Description

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Datasheet High power transient voltage suppressor Features Pin # ID 2 Top view Pin 3 bus (bus pin) 3 3 Bottom view 2 Pin, 2* GND (ground pin) *Pin and Pin 2 must be connected together. Low clamping voltage Peak pulse power: 4500 W (8/20µs) Stand off voltage 22 Unidirectional diode Low leakage current: 0.20 µa at 25 C Complies with the following standards: IEC 6000-4-2 level 4 ± 30 k (air discharge) ± 30 k (contact discharge) Application Where transient over voltage protection in ESD sensitive equipment is required, such as: Smartphones, mobile phones, tablets, portable multimedia USB bus protection Power supply protection Battery protection Product status link ESDA24P40-U3M Description The ESDA24P40-U3M is a unidirectional single line TS diode designed to protect the power line against EOS & ESD transients. The device is ideal for applications where high power TS and board space saving is required. DS2595 - Rev - May 208 For further information contact your local STMicroelectronics sales office. www.st.com

Characteristics Characteristics Table. Absolute maximum ratings (T amb = 25 C) Symbol Parameter alue Unit pp Peak pulse voltage IEC 6000-4-2 contact discharge IEC 6000-4-2 air discharge >30 >30 k P pp Peak pulse power (8/20 μs) 4500 W I pp Peak pulse current (8/20 μs) 40 A P pp Peak pulse power (0/000 μs) 330 W I pp Peak pulse current (0/000 μs) 0 A T op Operating junction temperature range -55 to 50 C T stg Storage junction temperature range -55 to 50 C Figure. Electrical characteristics (definitions) Symbol Parameter BR = Breakdown voltage CL = Clamping voltage I RM = Leakage current @ RM = Stand-off voltage I = Peak pulse current PP RD = Dynamic resistance I R = Breakdown current F = Forward voltage I = Forward current F RM I CL BR RM I F I RM F I R Slope = / R d I PP Table 2. Electrical characteristics (values) (T amb = 25 C) Symbol Parameter Min. Typ. Max. Unit RM 22 BR I R = ma 22.7 24 25.2 I RM RM = 22 200 na I PP = 00 A 8/20µs 30 34 CL I PP = 40 A 8/20µs 33.6 38 R D 8/20µs 0.07 Ω CL I PP = 0 A 0/000 µs 29.5 33 R D 0/000 µs 0.5 Ω F I F = 0 ma 0.7 DS2595 - Rev page 2/2

Characteristics (curves). Characteristics (curves) Figure 2. Peak pulse power dissipation versus initial temperature (typical value) Figure 3. Peak pulse power versus exponential pulse duration (typical value) 6000 P PP (W) 8/20µs 0000 P PP (W) Tj initial = 25 C 5000 4000 3000 000 2000 000 T j ( C) 0 25 50 75 00 25 50 75 tp(µs) 00 0 00 000 Figure 4. Peak pulse current versus clamping voltage (max value, 8/20 µs) Figure 5. Peak pulse current versus clamping voltage (max value, 0/000 µs) I pp (A) I pp (A) 00 0 8/20µs Tj initial = 25 C 0 0/000 µs Tj initial = 25 C 0. CL () 23 25 27 29 3 33 0. CL () 23 25 27 29 3 Figure 6. Leakage current versus junction temperature (typical value) 40 20 I r (na) I rm at rm = 22 00 80 60 40 20 T j ( C) 0 20 40 60 80 00 20 40 60 DS2595 - Rev page 3/2

Characteristics (curves) Figure 7. ESD response to IEC 6000-4-2 (+8 k contact discharge) 0/div Figure 8. ESD response to IEC 6000-4-2 (-8 k contact discharge) 20 /div 37.2 23. 2 23.5 3 23.8 4-2.5 2 3 4-2.0 -.8-974 m 2 3 4 Peak clamping voltage Clamping voltage at 30 ns Clamping voltage at 60 ns Clamping voltage at 00 ns 2 3 4 Peak clamping voltage Clamping voltage at 30 ns Clamping voltage at 60 ns Clamping voltage at 00 ns 20 ns/div 20 ns/div DS2595 - Rev page 4/2

Package information 2 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 2. QFN package information Figure 9. QFN package outline D e N x b L 2 D 2 Bottom view A E2 E K 3 L Sideview A2 Sideview A DS2595 - Rev page 5/2

QFN package information Table 3. QFN package mechanical data Dimensions Ref. Millimeters Min. Typ. Max. A 0.5 0.55 0.60 A 0.00 0.02 0.05 A2 0.5 b 0.25 0.30 0.35 D 2.00 E 2.00 e.30 D2.40.50.60 E2 0.90.00.0 K 0.20 L 0.25 L 0.35 0.40 0.45 N 3 Figure 0. Recommended footprint in mm Figure. Marking Pin.3 0.3 0.3.5 24A 0.6 0.35 0.45 DS2595 - Rev page 6/2

QFN package information Figure 2. Tape outline Pin # P0 Ø D0 E W F P P2 A0 Ø D K0 User direction of unreeling Note: Pocket dimensions are not on scale Pocket shape may vary depending on package Table 4. Tape and reel dimensions Dimensions (milimeters) Ref. Millimeters Min. Typ. Max. P 3.90 4.00 4.0 P0 3.90 4.00 4.0 Ø D0.50.55.60 Ø D.00 F 3.40 3.50 3.60 E.65.75.85 K0 0.65 0.75 0.85 P2.95 2.00 2.05 W 7.70 8.00 8.30 A0 2.5 2.25 2.35 DS2595 - Rev page 7/2

Recommendation on PCB assembly 3 Recommendation on PCB assembly 3. Stencil opening design. General recommendation on stencil opening design a. Stencil opening dimensions: L (Length), W (Width), T (Thickness). Figure 3. Stencil opening recommendation L T W b. General design rule Stencil thickness (T) = 75 ~ 25 μm W T.5. Reference design L W 2T L + W 0.66 a. Stencil opening thickness: 00 µm b. Stencil opening for leads: Opening to footprint ratio is 90% c. Stencil opening for expose pad: Opening to footprint ratio is 50% Figure 4. Recommended stencil window position in mm 0.43 0.7 0.5 0.57 0.29.3 0.29.06 DS2595 - Rev page 8/2

Solder paste 3.2 Solder paste. Halide-free flux qualification ROL0 according to ANSI/J-STD-004. 2. No clean solder paste is recommended. 3. Offers a high tack force to resist component movement during high speed. 4. Use solder paste with fine particles: powder particle size 20-45 µm. 3.3 Placement. Manual positioning is not recommended. 2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering 3. Standard tolerance of ±0.05 mm is recommended. 4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. 3.4 PCB design preference. To control the solder paste amount, the closed via is recommended instead of open vias. 2. The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away. 3.5 Reflow profile Figure 5. ST ECOPACK recommended soldering reflow profile for PCB mounting Temperature ( C) 250 2-3 C/s 240-245 C -2 C/s 200 60 sec (90 max) -3 C/s 50-6 C/s 00 50 0.9 C/s Time (s) 0 30 60 90 20 50 80 20 240 270 300 Note: Minimize air convection currents in the reflow oven to avoid component movement. DS2595 - Rev page 9/2

Ordering information 4 Ordering information Figure 6. Ordering information scheme ESDA 24 P40 - U3 M ESD Array Breakdown voltage 24 = 24 typ. I PP 8/20 µs P40 = 40 A Direction U3 = unidirectional line Package M = QFN Table 5. Ordering information Order code Marking Weight Base qty. Delivery mode ESDA24P40-U3M 24A 7 mg 5000 Tape and reel. The marking can be rotated by multiples of 90 to differentiate assembly location. DS2595 - Rev page 0/2

Revision history Table 6. Document revision history Date Revision Changes 22-May-208 First issue. DS2595 - Rev page /2

IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics N and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 208 STMicroelectronics All rights reserved DS2595 - Rev page 2/2