TO-220F BTA208X-1000C0 3Q

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TO-22F 22 May 214 Product data sheet 1. General description Planar passivated high commutation three quadrant triac in a SOT186A "full pack" plastic package. This triac is intended for use in motor control circuits where very high blocking voltage, high static and dynamic dv/dt as well as high dicom/dt can occur. This "series C" triac will commutate the full rated RMS current at the maximum rated junction temperature without the aid of a snubber. 2. Features and benefits 3Q technology for improved noise immunity High commutation capability with maximum false trigger immunity High immunity to false turn-on by dv/dt Isolated mounting base package Optimized for highest noise immunity Planar passivated for voltage ruggedness and reliability Triggering in three quadrants only Very high voltage capability 3. Applications Compressor starting control circuits General purpose motor controls Reversing induction motor controls e.g. vertical axis washing machines 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V DRM I TSM repetitive peak offstate voltage non-repetitive peak onstate current full sine wave; T j(init) = 25 C; t p = 2 ms; Fig. 4; Fig. 5 - - V - - 65 A I T(RMS) RMS on-state current full sine wave; T h 73 C; Fig. 1; Fig. 2; Fig. 3 Static characteristics I GT gate trigger current V D = 12 V; I T =.1 A; T2+ G+; T j = 25 C; Fig. 7 - - 8 A 5 11 35 ma Scan or click this QR code to view the latest information for this product

Symbol Parameter Conditions Min Typ Max Unit V D = 12 V; I T =.1 A; T2+ G-; T j = 25 C; Fig. 7 V D = 12 V; I T =.1 A; T2- G-; T j = 25 C; Fig. 7 5 14 35 ma 5 25 35 ma 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1 T1 main terminal 1 2 T2 main terminal 2 3 G gate mb n.c. mounting base; isolated mb T2 sym51 T1 G 1 2 3 TO-22F (SOT186A) 6. Ordering information Table 3. Type number Ordering information Package Name Description Version TO-22F plastic single-ended package; isolated heatsink mounted; 1 mounting hole; 3-lead TO-22 "full pack" /L1 TO-22F plastic single-ended package; isolated heatsink mounted; 1 mounting hole; 3-lead TO-22 "full pack" SOT186A SOT186A 7. Marking Table 4. Marking codes Type number /L1 Marking code L1 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 214. All rights reserved Product data sheet 22 May 214 2 / 13

8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 6134). Symbol Parameter Conditions Min Max Unit V DRM repetitive peak off-state voltage - V I T(RMS) RMS on-state current full sine wave; T h 73 C; Fig. 1; Fig. 2; I TSM non-repetitive peak on-state current Fig. 3 full sine wave; T j(init) = 25 C; t p = 2 ms; Fig. 4; Fig. 5 full sine wave; T j(init) = 25 C; t p = 16.7 ms - 8 A - 65 A - 71 A I 2 t I2t for fusing t p = ms; SIN - 21 A 2 s di T /dt rate of rise of on-state current I T = 12 A; I G =.2 A; di G /dt =.2 A/µs - A/µs I GM peak gate current - 2 A P GM peak gate power - 5 W P G(AV) average gate power over any 2 ms period -.5 W T stg storage temperature -4 15 C T j junction temperature - 125 C 3aaa969 25 3aaa97 I T(RMS) (A) 8 73 C I T(RMS) (A) 2 6 15 4 2 5-5 5 15 T h ( C) - 2-1 1 surge duration (s) Fig. 1. RMS on-state current as a function of heatsink temperature; maximum values Fig. 2. f = 5 Hz; T h = 73 C RMS on-state current as a function of surge duration; maximum values All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 214. All rights reserved Product data sheet 22 May 214 3 / 13

12 P tot (W) 8 6 conduction angle (degrees) 3 6 9 12 18 form factor a 4 2.8 2.2 1.9 1.57 α α = 18 12 9 6 3 3aaa967 71 T h(max) ( C) 8 89 98 4 7 2 116 125 2 4 6 8 I T(RMS) (A) α = conduction angle a = form factor = I T(RMS) / I T(AV) Fig. 3. Total power dissipation as a function of RMS on-state current; maximum values 8 3aaa968 I TSM (A) 6 4 I T I TSM 2 t Fig. 4. T j(init) = 25 C max 1 2 3 number of cycles f = 5 Hz Non-repetitive peak on-state current as a function of the number of sinusoidal current cycles; maximum values 1/f All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 214. All rights reserved Product data sheet 22 May 214 4 / 13

3 I T 3aab121 I TSM I TSM (A) 2 (1) t p T j(init) = 25 C max t - 2-1 1 2 t p (ms) t p 2 ms (1) di T /dt limit Fig. 5. Non-repetitive peak on-state current as a function of pulse width; maximum values All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 214. All rights reserved Product data sheet 22 May 214 5 / 13

9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit R th(j-h) R th(j-a) thermal resistance from junction to heatsink thermal resistance from junction to ambient full cycle or half cycle; with heatsink compound; Fig. 6 full cycle or half cycle; without heatsink compound; Fig. 6 - - 4.5 K/W - - 6.5 K/W in free air - 55 - K/W 3aaf915 Z th(j-h) (K/W) (1) (2) 1 (3) (4) - 1 P - 2 t p t Fig. 6. - 3-5 - 4-3 - 2-1 1 t p (s) (1) Unidirectional (half cycle) without heatsink compound (2) Unidirectional (half cycle) with heatsink compound (3) Bidirectional (full cycle) without heatsink compound (4) Bidirectional (full cycle) with heatsink compound Transient thermal impedance from junction to heatsink as a function of pulse duration. Isolation characteristics Table 7. Isolation characteristics Symbol Parameter Conditions Min Typ Max Unit V isol(rms) RMS isolation voltage from all terminals to external heatsink; sinusoidal waveform; clean and dust free; 5 Hz f 6 Hz; RH 65 %; T h = 25 C - - 25 V C isol isolation capacitance from main terminal 2 to external heatsink; f = 1 MHz; T h = 25 C - - pf All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 214. All rights reserved Product data sheet 22 May 214 6 / 13

11. Characteristics Table 8. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics I GT gate trigger current V D = 12 V; I T =.1 A; T2+ G+; 5 11 35 ma T j = 25 C; Fig. 7 V D = 12 V; I T =.1 A; T2+ G-; T j = 25 C; Fig. 7 5 14 35 ma V D = 12 V; I T =.1 A; T2- G-; T j = 25 C; Fig. 7 5 25 35 ma I L latching current V D = 12 V; I G =.1 A; T2+ G+; T j = 25 C; Fig. 8-25 5 ma V D = 12 V; I G =.1 A; T2+ G-; T j = 25 C; Fig. 8-48 75 ma V D = 12 V; I G =.1 A; T2- G-; T j = 25 C; Fig. 8-3 5 ma I H holding current V D = 12 V; T j = 25 C; Fig. 9-2 5 ma V T on-state voltage I T = A; T j = 25 C; Fig. - 1.3 1.65 V V GT gate trigger voltage V D = 12 V; I T =.1 A; T j = 25 C; -.7 1 V Fig. 11 V D = 4 V; I T =.1 A; T j = 125 C.25.4 - V I D off-state current V D = V; T j = 125 C -.1.5 ma Dynamic characteristics dv D /dt rate of rise of off-state voltage V DM = 67 V; T j = 125 C; (V DM = 67% of V DRM ); exponential waveform; gate open circuit 15 4 - V/µs di com /dt rate of change of commutating current V D = 4 V; T j = 125 C; I T(RMS) = 8 A; dv com /dt = 2 V/µs; (snubberless condition); gate open circuit; Fig. 12 12 32 - A/ms All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 214. All rights reserved Product data sheet 22 May 214 7 / 13

3 (1) 3aac888 3 1aab I GT I GT(25 C) I L I L(25 C) 2 2 (2) (3) 1 1-5 5 15 T j ( C) -5 5 T j ( C) 15 (1) T2- G- (2) T2+ G- (3) T2+ G+ Fig. 8. Normalized latching current as a function of junction temperature Fig. 7. Normalized gate trigger current as a function of junction temperature 3 1aab99 25 3aaa971 I H I H(25 C) I T (A) 2 2 15 1 5 (1) (2) (3) Fig. 9. -5 5 T j ( C) 15 Normalized holding current as a function of junction temperature 1 2 3 V T (V) V o = 1.264 V; R s =.378 Ω (1) T j = 125 C; typical values (2) T j = 125 C; maximum values (3) T j = 25 C; maximum values Fig.. On-state current as a function of on-state voltage All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 214. All rights reserved Product data sheet 22 May 214 8 / 13

1.6 1aab1 3 3aaa973 V GT V GT(25 C) di com /dt (A/ms) 1.2 2 typ min.8.4-5 5 T j ( C) 15 Fig. 11. Normalized gate trigger voltage as a function of junction temperature 1 2 6 14 T j ( C) Fig. 12. Rate of change of commutating current as a function of junction temperature; typical and minimum values All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 214. All rights reserved Product data sheet 22 May 214 9 / 13

12. Package outline Plastic single-ended package; isolated heatsink mounted; 1 mounting hole; 3-lead TO-22 'full pack' SOT186A E P A 1 A q D 1 T mounting base D j L 2 b 1 L1 K Q L b 2 1 2 3 b w M c e e 1 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT Notes A mm 4.6 4. A 1 2.9 2.5 1. Terminal dimensions within this zone are uncontrolled. 2. Both recesses are # 2.5.8 max. depth b.9.7 (1) b 1 b c D D 1 e L L 2 E e 1 j K L 1 2 P Q q max. 1.1 1.4.7 15.8 6.5.3 2.7.6 14.4 3.3 3.2 2.6 3. 2.54 5.8 3.9 1..4 15.2 6.3 9.7 1.7.4 13.5 2.79 3. 2.3 2.6 T (2) w 2.5.4 OUTLINE VERSION SOT186A REFERENCES IEC JEDEC JEITA 3-lead TO-22F EUROPEAN PROJECTION ISSUE DATE 2-4-9 6-2-14 Fig. 13. Package outline TO-22F (SOT186A) All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 214. All rights reserved Product data sheet 22 May 214 / 13

13. Legal information 13.1 Data sheet status Document status [1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet Product status [3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 13.2 Definitions Preview The document is a preview version only. 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NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer s own risk. Quick reference data The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. 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Limiting values Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 6134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 214. All rights reserved Product data sheet 22 May 214 11 / 13

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14. Contents 1 General description... 1 2 Features and benefits...1 3 Applications... 1 4 Quick reference data... 1 5 Pinning information...2 6 Ordering information...2 7 Marking... 2 8 Limiting values...3 9 Thermal characteristics...6 Isolation characteristics...6 11 Characteristics...7 12 Package outline... 13 Legal information...11 13.1 Data sheet status... 11 13.2 Definitions...11 13.3 Disclaimers...11 13.4 Trademarks... 12 NXP Semiconductors N.V. 214. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 22 May 214 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 214. All rights reserved Product data sheet 22 May 214 13 / 13