chage prior o fial pblicaio. Mascrip ID:TPEL-Reg-215-9-1497.R1.> 1 A Mehod for he Sppressio of Flcaios i he Neral-Poi Poeial of a Three-Level NPC Iverer wih a Capacior-Volage Loop Y Zhag, Member, IEEE, Jig Li, Ximi Li, Yafei Cao, Mark Smer, Seior Member, IEEE, ad Chagliag Xia, Seior Member, IEEE Absrac: This paper ivesigaes he problem of flcaio of he eral-poi poeial (NPP) i a hree-level NPC iverer wih a capacior-volage loop. The phase plse widh dy cycle disrbace PWM mehod is proposed o sppress he NPP flcaio efficiely. Based o he basic carrier-based Phase Disposiio (PD) PWM mehod, he average plse eral-poi crre model is esablished. The he freqecy, amplide ad eqivale iiial phase of he NPP flcaio are aalyzed based o he crre model. Accordig o he aleraig error of he DC-lik capacior volages, a capacior-volage loop wih a qasi PR (proporioal resoa) coroller is preseed. The corol variable, which varies wih he modlaio idex, phase crre, load power facor, ec, ca be obaied from he qasi PR coroller. Fially, a experimeal hree-level NPC iverer is described ad he validiy ad feasibiliy of he proposed mehod are verified by experimeal resls. Keywords: Three-level NPC iverer, eral-poi poeial, capacior-volage loop, flcaio-sppressio. I. INTRODUCTION I order o sep dow dv/d, improve he harmoic performace of he op volage ad crre, ad also redce he volage sress of power swiches of iverers sed i medim-volage ad high power applicaios, he hree-level eral-poi clamped (NPC) iverer was proposed [1]. However a pariclar problem wih he NPC compared o radiioal wo-level iverers, is he flcaio of he capacior midpoi volage or eral-poi poeial (NPP) de o ifleces from he modlaio idex ad he load power facor Mascrip received Sepember 2, 215. Acceped for pblicaio Febrary 18, 216. This work was sppored i par by he Naioal Naral Sciece Fodaio of Chia der Gras 5157713, ad 512714, ad i par by he Research Program of Applicaio Fodaio ad Advaced Techology of Tiaji Chia der Gra 15JCQNJC39. Y Zhag, Ximi Li, ad Yafei Cao are wih he School of Elecrical Egieerig ad Aomaio, Tiaji Uiversiy, Tiaji 372, Chia (fax: +86-22-2742325; e-mail: zhagy@j.ed.c, liximi@j.ed.c, ad caoyafei@j.ed.c). Jig Li is wih he Deparme of Elecrical ad Elecroic Egieerig, Uiversiy of Noigham, Nigbo, Chia (email: jig.li@oigham.ed.c). Mark Smer is wih he Deparme of Elecrical ad Elecroic Egieerig, Uiversiy of Noigham, UK (email: mark.smer@oigham.ac.k). Chagliag Xia is wih he School of Elecrical Egieerig ad Aomaio, Tiaji Uiversiy, ad also wih he Tiaji Key Laboraory of Advaced Techology of Elecrical Egieerig ad Eergy, Tiaji Polyechic Uiversiy, Chia (e-mail: moor@j.ed.c). [2]. Capacior volage imbalace may case failre of he power swiches ad he series coeced DC-lik capaciors. I addiio low-order harmoics will be creaed i he op volage ad crre, de o low-freqecy ripple of he NPP [3]. Therefore, a grea deal of research o he NPP flcaio problem of hree-level NPC iverers has bee carried o [4]. I medim-volage idcio moor drive sysems, he hree-level NPC iverer ca elimiae NPP flcaio by sig wo isolaed volage sorces isead of capaciors i series [5, 6]. I addiio, he NPP flcaio cold also be removed hrogh sig a fro-ed coverer sch as a hree-level boos coverer or a back o back opology [7, 8]. These addiioal coverers ca be sed o ijec or exrac crre io or from he eral poi if ecessary [9]. However, wih he addiioal hardware circis, he volme ad cos of he sysem are icreased while he efficiecy ad he reliabiliy of he sysem are redced. Therefore, improvig he modlaio performace is a beer way o resrai he NPP flcaio as his removes he eed for exra coverers [1-13]. There are wo mai modlaio sraegies for he hree-level NPC iverer, amely space vecor plse widh modlaio (SVPWM) ad carrier-based PWM [14, 15]. The eares hree vecors (NTV) modlaio is oe of he commo SVPWM mehods [16]. I coforms o he priciple i which he referece vecor is syhesized by he eares hree vecors ad ca preve overlappig of he level layers i he lie o lie volages (aalyzed i [17]), as well as redcig he oal harmoic disorio (THD). However, he essece of he NTV modlaio mehod is ha a hird-order harmoic is ijeced io he hree-phase sisoidal modlaio waves, ad is flcaio-sppressio for NPP is limied (his is aalyzed i deail i Secio III. A). Therefore, he eares hree viral vecors (NTV 2 ) mehod was proposed o ehace he capabiliy for flcaio-sppressio [18, 19]. Compared o he NTV mehod, he NTV 2 mehod goes agais he priciple of he syhesized referece vecor, ad prodces overlappig of level layers ad as mch as 25% more swichig acios i every fdameal period. Narally, he hybridizaio of he NTV ad he NTV 2 mehods is a radeoff bewee he flcaio-sppressio ad he fdameal swichig mber. The proporioal idex p m, sch as p m=.5, was sed o deermie he exe of he alerae acio i a fdameal period [2], b he overlappig of level layers sill exiss i his proporioal hybrid SVPWM sraegy i lie o lie volages.
chage prior o fial pblicaio. Mascrip ID:TPEL-Reg-215-9-1497.R1.> 2 The hree-level NPC iverer is siable for elecric power plas, micipal waer spply sysems, ec. I is maily sed i medim-volage ad high power variable volage variable freqecy (VVVF) idcio moor drive sysems [21, 22]. Therefore, accordig o he desiged volage-freqecy crve, he reqired speed adjsme of he fa or pmp resls i he idcio moors variable volage ad power facor, as well as is phase crres [23]. However, he combiaios of he variable volage, power facor ad phase crre de o he chaged speed of he idcio moor may affec he eral-poi crre (amely he eral-poi poeial) of he NPC iverer. A basic carrier-based PD PWM mehod wih a capacior-volage loop is proposed i his paper, i order o solve he problem of he NPP flcaio, ad avoid he disadvaages (more swichig acios ad overlappig levels of he lie o lie volages) of he NTV 2, he hybridizaio of he NTV ad he NTV 2 mehods meioed above. This proposed mehod ca also redce he impac of he pracical imbalace capaciace of he series coeced DC-lik capaciors. Moreover, he VVVF corol is adoped for he iverer o spply a hree-phase RL load (for he coveiece of exacly obaiig he combiaios of he variable volage, power facor ad phase crre) i his paper. I hs begis wih he heoreical aalysis of he NPP flcaio freqecy, amplide, ad eqivale iiial phase, based o he basic carrier-based PD PWM mehod. The, he NPP flcaio mehod wih ijeced 3 rd harmoic PWM is irodced wih is limied abiliy o sppress he NPP flcaio, de o he cosa iiial phase of he ijeced 3 rd harmoic compoe. The capacior-volage loop wih he qasi PR coroller ha is preseed here ca creae a variable zero seqece compoe, i.e. a variable eqivale iiial phase, accordig o he load power facor. Frhermore, he proposed phase plse widh dy cycle disrbace PWM mehod chages he modlaio waves i he presece of NPP, reslig i a efficie sppressio of NPP flcaio, as well as less swichig acios, o-overlappig levels of he lie o lie volages, ad olerace o he imbalace capaciace of he series coeced DC-lik capaciors. II. BASIC ANALYSIS OF NPP FLUCTUATION A. Freqecy of NPP Flcaio The opology of he hree-level NPC iverer is show i Fig. 1. The capaciace of he DC-lik capaciors C cap1, C cap2 are eqal (C 1=C 2), ad he DC-lik volage U dc is divided io U cap1=u cap2=u dc/2. Poi o is he eral poi. The basic carrier-based PD PWM mehod is adoped o corol he power swiches Q x1~q x4, where x sads for Phases a, b, ad c. Udc Ccap1 icap1 Ccap2 o icap2 Da1 Da2 Qa1 Qa2 Qa3 Qa4 Db1 Db2 Qb1 Qb2 Qb3 Qb4 Dc1 Dc2 Qc1 Qc2 a b c i ia ib ic Qc3 Qc4 Za Zb Zc The eral-poi poeial U o ca be regarded as he volage across C cap2 as follows U U (1) o Give ha medim or small vecors case correspodig NP crre drig he acio ime, so C cap1 is charged or discharged, ad C cap2 is discharged or charged, der he codiio of U cap1+ U. The volage ripple of C cap2 is deermied by i ad U cap2 dc he acio ime d ( d T, T is he fdameal period), by vire of he correspodig vecor. From Fig. 1, i ca be see ha he volage ripple 2 of C cap2 is he differece bewee U cap2 ad U dc/2, amely he NPP flcaio o is wrie as 1 ecp o 2 Ucap2 Udc / 2 icap2d C (2) where i cap2 is he isaaeos crre flowig io or o of C cap2, drig he vecor acio ime d; ecp is defied as he effecive chargig or dischargig ime whe U cap2 goes from U dc/2 o he peak vale. Accordig o Fig. 1, whe medim or small vecors ac, he crre eqaio cocerig he eral poi o ca be obaied as follows cap2 cap1 cap2 2 i i i (3) The chargig or dischargig sae of C cap2 is show i Fig. 2. This resls from he NP crre i whe sig he basic carrier-based PD PWM mehod over a fdameal period. I fac, i is he plsed NP crre, as show i Fig. 2(e). Is plse amplide correspods o he isaaeos phase crre. I addiio, he hree-phase sisoidal modlaio waves are divided io six regios I~VI, as depiced i Fig. 2(a). The phase plse widh dy cycle is defied as he raio of he posiive or egaive phase volage plse widh o he carrier period, as deoed i Fig. 2(b~d). The phase plse widh dy cycle d x ca also be defied as he raio of he modlaio wave isaaeos vale (-1~1) o he correspodig carrier amplide (1 or -1), i.e. i ca be expressed as d x (4) ref_x where d x=~1. Accordig o Fig. 2(e), i is oed ha he plse NP crre i varies wih boh he dy cycles ad he phase crres. As a resl, he average crre flowig io he eral poi ca be described as i ( d i d i d i ) (5) a a b b c c where i is he average plse NP crre; d a, d b ad d c are phase plse widh dy cycles; i a, i b, ad i c are hree-phase isaaeos crres. The hree-phase sisoidal modlaio waves are defied as msi ref_b msi( 2π/3) (6) ref_c msi( 4π/3) where m is he modlaio idex, ad m 1; is he fdameal aglar freqecy. Whe he carrier freqecy is mch greaer ha he fdameal freqecy ad he hree-level NPC iverer spplies a hree-phase symmerical RL load, he phase crres ca be cosidered as sisoidal Fig. 1. Topology of hree-level NPC iverer.
chage prior o fial pblicaio. Mascrip ID:TPEL-Reg-215-9-1497.R1.> 3 ia I si( ) ib I si( 2π/3 ) (7) ic I si( 4π/3 ) where I is he phase crre amplide, ad is he load power facor agle. Therefore, i erms of (4), each phase plse widh dy cycle i Regio I ( [,π 3) ) as show i Fig. 2(a), ca be wrie as follows ao bo dai msi dbi ref_b msi( 2π/3) dci ref_c msi( 4π/3) (8) ref_b ref_c I π 3 II III 2π 3 π IV 4π 3 V 5π 3 VI (a) 2π d a Phase plse widh dy cycles d b d c (b) (c) I.5mod [4π/3 arccos(.5cos )], 2π (11) where mod is he remaider fcio. Similarly, he oher five expressios II ~ VI ca also be obaied i he oher five regios. Coseqely, here are six zero crossig pois of i i a fdameal period accordig o (1) i.e. (,), (,), ( III,), ( IV,), (,) ad ( V VI i I II,) ad he freqecy of is hree imes he fdameal oe. The DC-lik capacior volages also flcae a hree imes he fdameal freqecy. The simlaio resls of he eral-poi crre ad he flcaig sae of he capacior volage U cap2 are show i Fig. 3, from a Malab/Simlik simlaio wih he simlaio codiio of m=1, ad cos.886. co i Plse widh eral-poi crre (d) (e) U cap2 U dc /2 i I π 2π (f) Fig. 2 Chargig or dischargig sae of Ccap2 by NP crre i der basic carrier-based PD PWM mehod drig a fdameal period. Accordig o (5), (7) ad (8), he average plse NP crre i Regio I ca be obaied as i I msi( ) I si( ) [ msi( 2π/3)] I si( 2π/3 ) msi( 4π/3) I si( 4π/3 ).5 mi[cos 2 cos(2 4π/3 )] Likewise, he average plse NP crre i he oher five regios ca also be dedced, ad he crre model ca be esablished i a fdameal period [,2π) as follows.5 mi[ cos 2 cos(2 4π/3 )], [, π/3).5 mi[cos 2 cos(2 )], [π/3, 2π/3).5 mi[ cos 2 cos(2 2π/3 )], [2π/3, π) i (1).5 mi[cos 2 cos(2 4π/3 )], [π,4π/3).5 mi[ cos 2 cos(2 )], [4π/3, 5π/3).5 mi[cos 2 cos(2 2π/3 )], [5π/3, 2π) From (1), each of he expressios shows he freqecy of i is wice he fdameal freqecy drig [,2π). I i fac, he acal is syhesized by he correspodig par of every expressio i erms of he exac rage of show i (1). As a resl, here exiss he iqe ime I whe i drig [, π 3). Ths I ca be wrie as i (9) Fig. 3 Simlaio resls of eral-poi crre ad flcaig sae of capacior volage from Malab/Simlik (simlaio parameers: m=1, fdameal freqecy f=5hz, swichig freqecy fc=4.67khz, C1=C2=47 μf, Udc=1V, load R=6, L=1mH, ad cos.886 ). (a) Sisoidal modlaio wave. (b) Plse NP crre. (c) Average plse NP crre. (d) Flcaig volage of Ccap2. The Phase-a sisoidal modlaio wave is show i Fig. 3(a), ad he plse NP crre i is depicred i Fig. 3(b). I erms of (1), he average plse NP crre is show i Fig. 3(c), ad is amplide is deermied by m, I, ad. Is freqecy is hree imes he fdameal as aalyzed above. Moreover, he chargig ad dischargig characerisics for DC-lik capaciors ca be explaied more clearly by i : I Regio I, i (ble crve) is from egaive o posiive wih he zero crossig poi (, ), where I 11.95 is calclaed I by (11) wih cos.886 ; whe i, C cap1 is beig discharged, ad C cap2 is beig charged; whe i, C cap1 is discharged dow o he miimm volage, ad C cap2 is charged
Ucap2(V) <This aricle has bee acceped for pblicaio i a fre isse of IEEE Trasacios o Power Elecroics, b has o bee flly edied. Coe may chage prior o fial pblicaio. Mascrip ID:TPEL-Reg-215-9-1497.R1.> 4 p o he maximm; whe i, C cap1 is beig charged, ad C cap2 is beig discharged. Whe i (gree crve) is i Regio II, aoher zero crossig poi occrs (, ) a II 71.95. A his ime, C cap1 is charged p o he maximm volage, ad C cap2 is discharged dow o he miimm as show i Fig. 3(d). The flcaio freqecy of U cap2 is hree imes he fdameal as show above. B. Amplide of NPP Flcaio Accordig o (2), (1) ad he coclsios for he NPP flcaio freqecy aalyzed above, he by examiig U dc/2, he eral-poi poeial U o is a is maximm or miimm volage drig T/12. Therefore, he amplide of he NPP flcaio is direcly deermied by i cap1, i cap2, C 1, C 2, ecp i T/12, m, I, ad. I is clear ha he NPP flcaio is iversely proporioal o C 1 ad C 2. I shold be oed ha he chargig or dischargig saes of C cap1 ad C cap2 are opposie from each oher, wih he codiio ha U cap1+ U cap2 Udc. Whe C 1, C 2,, m, ad remai chaged, i cap1 ad i cap2 are proporioal o i accordig o (3). i cap2 is proporioal o I, as well as he amplide of he NPP flcaio by vire of (2); whe he fdameal aglar freqecy is decreased from 1 o 2, he period of i icreases, leadig o a loger disace bewee adjace zero crossig pois. Therefore he effecive ime ecp, which is he eqivale ime for chargig or dischargig capaciors from U dc/2 o he maximm or miimm volage, icreases proporioally from ecp1 o ecp1 1/ 2. ecp1 is he eqivale chargig or dischargig ime whe he fdameal aglar freqecy is 1. I addiio, he amplide of phase crres remais chaged. Coseqely he amplide of he NPP flcaio is 1 / 2 imes ha of he origial oe, as show i Fig. 4, i.e. i is iversely proporioal o he fdameal freqecy. 7 6 5 ecp1 origial prese 4 ecp1 1 / 2 from 1 2π 5(rad/s) (1ms/div) 3 Fig. 4 Comparaive amplides of NPP flcaio bewee codiios of 1 2π 5 (rad/s), L=1mH ad 2 2π 25 (rad/s), L=2mH (R=6 ). I order o clarify he impacs of he modlaio idex ad load power facor o he NPP flcaio, a aalysis of he hree-level NPC iverer spplyig a hree-phase symmerical RL load is made here. I is assmed ha he load power facor is cosa cos.866 ( R 5.89, L=1.8mH, fdameal freqecy f=5hz), while m is se o wo codiios amely.533 ad 1. The oher simlaio parameers are he same wih hose sed for Fig. 3. The compariso of flcaio amplides of he capacior volages wih differe modlaio II from 2 2π 25(rad/s) idexes is show i Fig. 5. The amplides of i i Fig. 5 (a, b) are.6.5i ad 1.13.5I, respecively; ad he flcaio amplide U2 of U cap2 is 1.4V ad 5V. As show i (1), wih a cosa, he amplide of i is deermied by m ad I. The flcaio amplides of he capacior volages are early proporioal o he amplide of i. For a ideical RL load ad fdameal freqecy, I is proporioal o m. Therefore is proporioal o mi, i.e. he flcaio amplide U2 of U cap2 is proporioal o m 2. (a) m=.533 (b) m=1 Fig. 5 Compariso of flcaio amplides of capacior volages wih differe modlaio idexes (R=5.89, L=1.8mH, f=5hz, ad cos.866 ). Regardig he impac of he load power facor, i is assmed ha m=1, he phase impedace Zphase 6.8, ad f=5hz. Wih he same phase impedace, differe load power facors ca be obaied by adjsig he phase resisors ad idcors, e.g..996 ( 5 ),.866 ( 3 ),.5 ( 6 ) ad.87 ( 85 ). The oher simlaio parameers remai he same as hose i Fig. 3. The compariso of he flcaio amplides of he capacior volages der differe load power facors is show i Fig. 6. i
chage prior o fial pblicaio. Mascrip ID:TPEL-Reg-215-9-1497.R1.> 5 (a) R=6.77, L=1.89mH, 5 (b) R=5.89, L=1.8mH, 3 (d) R=.59, L=21.57mH, 85 Fig. 6 Compariso of flcaio amplides of capacior volages wih differe load power facors (m=1, Zphase 6.8, ad f=5hz). I erms of (11) ad Fig. 3, here is a peak of i phase lags fcio I ( ) whe he I is π 6. Combiig his wih (1), he amplide of i ca be obaied as follows I.5mod [4π 3 arccos(.5cos )], 2π (12) I ( ).5I cos 2 cos[2( I π 6) 4π 3 ] where [, π/2]. Accordig o (12), he relaioship bewee I ad is show i Fig. 7. I shold be oed ha he liear relaioship bewee I ad is he cb lie segme, ad he oliear relaioship akes place o he ba crve. Moreover, he oliear segme ba shows ha he higher he load power facor is, he lower he iflece o i from, as show i Fig. 6. As a resl, he NPP flcaio amplide is proporioal o I f( ) as show i Fig. Uo 7, accordig o he chargig or dischargig characerisic of C cap1 ad C cap2 as saed above. (c) R=3.4, L=18.75mH, 6 I Fig. 7 Relaioship bewee ad (m=1, ad Zphase=Cosa). C. Eqivale Iiial Phase of NPP Flcaio The NPP flcaio o aleraes a riple fdameal freqecy ad is eqivale iiial phase ca be cosidered as 3( ), referrig o he phase of he sisoidal modlaio wave msi. The phase of o is
chage prior o fial pblicaio. Mascrip ID:TPEL-Reg-215-9-1497.R1.> 6 deermied by he load power facor agle i erms of Fig. 3 ad (11), he he iiial phase agle ca be wrie as π/6-i (13) π/6.5mod [4π 3 arccos(.5cos )], 2π The relaioship bewee ad is show i Fig. 8. I is oed ha decreases from π 6 o zero, accordig o he icrease of [, π/2]. As a resl, six zero crossig pois of o all case a righ shif from pois c 1~c 6 as show i Fig. 6(c) o he correspodig oes d 1~d 6 i Fig. 6(d). I reveals he sbsaial chage of he iiial phase de o he impac of he load power facor. cos.59, he amplide of i is virally chaged as show i Fig. 9(b). Therefore, i is coclded ha he ijeced 3 rd harmoic compoe, whose iiial phase is cosa (i.e. does o chage wih he modlaio idex, load crre ad power facor), cao sppress he amplide of he syhesized average plse NP crre i efficiely der VVVF corol. (a) m=1, f=5hz, R=6, L=1mH, cos.886 Fig. 8 Relaioship bewee ad. III. FLUCTUATION-SUPPRESSION METHOD OF NPP A. NPP Flcaio wih Ijeced 3rd Harmoic PWM I is kow ha he ijeced 3 rd harmoic ( msi 3 6 ) PWM mehod o oly ca improve he ilizaio of he DC-lik volage of he hree-phase iverer, b does o chage he characerisics of lie o lie volages [24]. Accordig o (5), (7), (8), ad (1), he ijeced 3 rd harmoic ca also case a z correspodig average plse NP crre i show i (14) mi[ cos(4 2π 3 ) cos(2 2π 3 )] 6, [, π 3) mi[cos(4 ) cos(2 )] 6, [π 3,2π 3) z mi[ cos(4 4π 3 ) cos(2 4π 3 )] 6, [2π 3,π) (14) i mi[cos(4 2π 3 ) cos(2 2π 3 )] 6, [π,4π 3) mi[ cos(4 ) cos(2)] 6, [4π 3,5π 3) mi[cos(4 4π 3 ) cos(2 4π 3 )] 6, [5π 3,2π) As a resl, he acal syhesized average plse NP crre z i i i ca be obaied. The ijeced modlaio wave of Phase-a is msi ( msi 3 ) 6, ad he ijeced ref_b, ref_c lag 12 ad 24 respecively. Accordig o (1) ad (14), he average plse NP crres wih ijeced 3 rd harmoic PWM mehod der he VVVF corol mode are show i Fig. 9. Whe m=1, f=5hz, ad cos.886 z, he ijeced average plse NP crre i ca offse he amplide of he average plse NP crre i by a sigifica amo. The amplide of he syhesized average plse NP crre i is redced frher as show i Fig. 9(a). z Neverheless, he ijeced average plse NP crre i coerac cao i eogh whe m=.533, f=25hz, ad (b) m=.533, f=25hz, R=4.54, L=4mH, cos.59 Fig. 9 Average plse NP crres wih ijeced 3 rd harmoic PWM mehod der VVVF corol mode. B. Phase Plse Widh Dy Cycle Disrbace PWM Mehod I erms of (1) ad (14), facors m, I, ec, ca be cosidered as disrbace sorces i he capacior-volage loop (i Secio III. C). These facors are direcly associaed wih he RL loads, ad heir combied effec wold iflece he amplide of he syhesized average plse NP crre. Based o he referred basic carrier-based PD PWM mehod wih saddle modlaio waves, he phase plse widh dy cycle disrbace PWM mehod (i Phase-a ) is demosraed i Fig. 1. Whe m=.533, I=3.4A, cos.59 ad f=25hz, he secod zero seqece compoe pr= 3 ca be obaied hrogh he qasi PR coroller, accordig o he capacior volage error 12. The, 3 ca be ijeced io he referred saddle modlaio wave. Therefore, he origial phase plse widh dy cycle d a is modified o be d a accordig o he fial modlaio wave, as show i Fig. 1(a). Becase he disrbace iformaio is rasferred o modlaio waves by 3 i real ime, samples ad calclaios for phase crres ad load power facors ca be omied compleely. If he VVVF operaio codiio is below m=1, I=7.4A, cos.886 ad f=5hz, he op pr of he qasi PR coroller (i Secio III. C) may sffer from over modlaio (i cerai pars) accordig o he capacior volage error 12, which is differe from he case i Fig. 1(a). I order o avoid
chage prior o fial pblicaio. Mascrip ID:TPEL-Reg-215-9-1497.R1.> 7 load crre disorio, i is ecessary o limi he amplide of pr i erms of pr ref_x 1 b, ad c. I is also oed ha he ref_b ref_c [25], where x sads for Phases a, max(,, ) ad ref_b ref_c mi(,, ) sad for he maximm ad miimm isaaeos saddle waves i every fdameal period, so pr ca be limied as follows 1 mi(,, ) 1 max(,, ) (15) ref_b ref_c pr ref_b ref_c Accordig o (15), he secod zero seqece compoe 3 ca be obaied from pr as show i Fig. 1(b). The he origial phase plse widh dy cycle d is also modified o be d de o he fial modlaio wave a. Frhermore, a is clamped a 1 o preve over modlaio ad his is beeficial o redce he swichig mber i each fdameal period, lowerig he swichig loss of he iverer. From Fig. 1, i ca be coclded ha he disrbace PWM mehod opimizes he chargig ad dischargig balaced saes bewee C cap1 ad C cap2 i erms of he asymmeric modlaio wave obaied. 12 pr = 3 3 d a 12 d a 3 T/2 (a) m=.533, ad f=25hz pr 3 T T/2 T (b) m=1, ad f=5h Fig. 1 Phase plse widh dy cycle disrbace PWM mehod i capacior-volage loop (i Phase-a ). C. Capacior-Volage Loop Corol wih Qasi PR Coroller If a differe ijeced harmoic cold case he proper average plse NP crre o make he fial acal syhesized average plse NP crre closer o zero, he NPP flcaio wold be sppressed close o zero. I fac, he o volage differece 12 U cap1 - U cap2 direcly reflecs he essece of o. I erms of he basic aalysis of he NPP flcaio i Secio II (A~C), 12 is he aleraig compoe wih he riple fdameal freqecy, especially as i coais iformaio o he load crre amplide, power facor ec. Is amplide, freqecy ad eqivale iiial phase chage wih loadig. Therefore, 12 cold be a secod ijeced zero seqece compoe, which ca sppress he fial syhesized average plse NP crre efficiely. To achieve his, a capacior-volage loop corol mehod wih a qasi PR coroller is proposed for he sppressio of he flcaio of he NPP as show i Fig. 11. I erms of U cap1+u cap2 Udc, he capacior volages flcae i opposie direcios, ad herefore U cap2 wold follow U cap1 ifiiely accordig o he feedback mechaism. U cap1 12 pr 3 +_ G 1(s) Limi U cap2 PR Coroller ref_b ref_c + + + + + + ref_b ref_c Phase Plse Widh Dy Cycle Disrbace PWM Mehod (i Secio III. B) d a d b d c Three-level NPC Iverer Fig. 11 Capacior-volage loop corol mehod wih qasi PR coroller for flcaio-sppressio of NPP. The acal secod zero seqece compoe 3 ca be obaied afer 12 is impored io he coroller. The rasfer fcio is G 1(s): G () s (16) pr 12 1 where 12 is also he ip error o his coroller, ad his aleraig ip error ca be cosraied effecively by he oliear qasi PR coroller [26]. Is rasfer fcio is wrie as G 2 c 1( s ) G PR ( s ) k k s p (17) r s 2 2 2 s c where k p is he proporioal coefficie; k r is he resoa coefficie; is he resoa aglar freqecy; c is he coff aglar freqecy, ad c. The coroller parameers have bee derived from he model parameers [26] as k p=.5, k r=2, c 2π (.2 f ), ad 2π (3 f ), where f is he fdameal freqecy. IV. EXPERIMENTAL VERIFICATION AND ANALYSIS The proposed flcaio-sppressio mehod of he NPP for he hree-level NPC iverer is verified sig he experime plaform show i Fig. 12. The digial coroller is composed of DSP (TMS32F28335) ad FPGA (Cycloe EP1C6Q24C8N);
chage prior o fial pblicaio. Mascrip ID:TPEL-Reg-215-9-1497.R1.> 8 he power swiches are IGBTs (FGA4N12D) sed o form he mai circi of he iverer. The DC-lik volage is spplied by wo DC volage sorces i series for U dc=1v. A hree-phase adjsable resisor ad idcor (RL) were chose as he load for he iverer. Volages across DC-lik capaciors are measred by volage sesors. Phase-a modlaio wave ca be displayed from a DA coverer (.175/V). Fially, he iverer wih he hree-phase adjsable RL load operaes der VVVF corol mode, ad experimeal parameers are lised i TABLE I. PC Oscilloscopes DSP+FPGA Coroller Logic Prober NPC Three- Level Iverer Load Swicher Three-Phase RL Load Differeial Probers Sesors DC-Lik Capaciors DC-Lik Volage Sorces Fig. 12 Experime plaform for he hree-level NPC iverer. TABLE I Experimeal parameers Parameer Vale DC-Lik volage Udc 1V DC-Lik capaciace C1=C2 47 μf Resisor ad idcor of RL load R=~15, L=5~4mH Swichig freqecy fc 4.67kHz Variable modlaio idex variable freqecy of VVVF corol mode m=1/f=5hz, m=.733/f=4hz, m=.533/f=25hz Variable load power facor der VVVF corol.886 (m=1),.59 (m=.533) The experimeal resls sig he basic ad proposed corol mehods are show i Fig. 13. The amplides of he capacior volages U cap1 ad U cap2 for he basic corol are approximaely 1% of U dc/2 as show i Fig. 13(a). Uder he same codiios, he amplides of U cap1 ad U cap2 decrease sigificaly wih he proposed corol as show i Fig. 13(b). Moreover, he proposed mehod redces he swichig mber i a fdameal period by limiig he maximm vale of he fial modlaio wave as show i Fig. 13(b), ad here is o overlappig of level layers i he lie o lie volage wih boh mehods, comparig wih he NTV 2, he hybridizaio of he NTV ad he NTV 2 mehods. ab (8V/div) (1V/div) (a) Sisoidal modlaio wave (boom), lie o lie volage (middle) ad capacior volages (pper) sig basic carrier-based PD PWM mehod ab (8V/div) (1V/div) limi (b) Fial modlaio wave (boom), lie o lie volage (middle) ad capacior volages (pper) sig proposed PWM mehod Fig. 13 Experimeal resls sig basic ad proposed mehods (m=1, f=5hz, cos.886, R 6, L=1mH ad C1=C2= 47μF ). Whe he variable modlaio idex, fdameal freqecy ad load power facor decrease followig a chage i operaig sepoi, boh m ad I decrease. However, he fdameal period icreases, ad he flcaio of U cap1 ad U cap2 is sill larger wih he basic carrier-based PD PWM mehod, approximaely 5% of U dc/2 as show i Fig. 14(a). Uder he same codiios, comparig wih i Fig. 14(a, b), he fial modlaio wave corolled by he proposed mehod is modified wih he redced modlaio idex, fdameal freqecy ad load power facor. As a resl, he flcaio of U cap1 ad U cap2 is frher redced as show i Fig. 14(b). ab (8V/div) (5V/div) (a) Sisoidal modlaio wave (boom), lie o lie volage (middle) ad capacior volages (pper) sig basic carrier-based PD PWM mehod ab (8V/div) (5V/div) (b) Fial modlaio wave (boom), lie o lie volage (middle) ad capacior volages (pper) sig proposed PWM mehod Fig. 14 Experimeal resls sig basic ad proposed mehods (m=.533, f=25hz, cos.59, R 4.5, L=4mH ad C1=C2= 47μF ). I order o verify he fdameal period effec o he flcaio, he fdameal freqecy is chaged from 5Hz o a half (25Hz), ad he idcor is also chaged from 1mH o 2mH: m=1 ad he oher parameers are kep he same as hose sed for Fig. 13. The phase crre amplide ad he load power facor remai chaged. As a resl, wih he basic carrier-based PD PWM mehod, U cap1 ad U cap2 flcae by abo 2% of U dc/2 show i Fig. 15(a), i.e. wice hose i Fig.
chage prior o fial pblicaio. Mascrip ID:TPEL-Reg-215-9-1497.R1.> 9 13 (a). I is cosise wih he aalyic resl depiced i Fig. 4. However, he flcaio of U cap1 ad U cap2 is sppressed efficiely as show i Fig. 15(b), o abo 2% of U dc/2 sig he proposed PWM mehod. Therefore, he NPP flcaio is almos elimiaed by he proposed PWM mehod. I is also oed ha alhogh he capaciace of he DC-lik capaciors is redced by half, ad he oher parameers are he same as hose sed i Fig. 13, he flcaio of U cap1 ad U cap2 is sill sppressed well sig he proposed PWM mehod as show i Fig. 16, o abo oe fifh of ha show i Fig. 13(b). Ths, i is coclded ha he proposed PWM mehod is beeficial for redcig he capaciace of he DC-lik capaciors. ab (8V/div) (1V/div) (a) Sisoidal modlaio wave (boom), lie o lie volage (middle) ad capacior volages (pper) sig basic carrier-based PD PWM mehod ab (8V/div) (1V/div) (b) Fial modlaio wave (boom), lie o lie volage (middle) ad capacior volages (pper) sig proposed PWM mehod Fig. 15 Experimeal resls sig basic ad proposed PWM mehods whe fdameal freqecy is redced by half (m=1, f=25hz, cos.886, R 6, L=2mH ad C1=C2= 47μF ). ab (8V/div) (1V/div) Fig. 16 Experimeal resls sig proposed PWM mehod whe capaciace of DC-lik capaciors is redced by half (m=1, f=5hz, cos.886, R 6, L=1mH ad C1=C2= 235μF ). Becase coveioal charge pmps may sffer from crre mismach, a 1% mismach i oe phase of he RL load (R b=r c= 6, L b=l c=1mh, ad R a= 6.6, L a=11mh) has also bee cosidered i his paper. Experimeal resls der his codiio are show sig he proposed PWM mehod i Fig. 17. Comparig i a wih i b, (alhogh he amplide of i a decreases becase of 1% mismach i Phase-a RL load), he fial acal syhesized average plse NP crre is sill sppressed well hrogh he capacior-volage loop. U cap1 ad U cap2 have very lile differece o hose der he symmerical hree-phase RL load as show i Fig. 13(b). i a (7A/div) i b (7A/div) Fig. 17 Experimeal resls of mismach 1% i Phase-a RL load sig proposed PWM mehod (m=1, f=5hz, Rb=Rc= 6, Lb=Lc=1mH, Ra= 6.6, La=11mH, ad C1=C2= 47μF ) Aoher mismach ha may happe i he hree-level NPC iverer is he capaciace imbalace bewee he DC-lik capaciors, ad i may resl i he failre of he power swiches de o he serios balaced volage sress, as well as he disorio of he lie o lie volages. I order o demosrae he abiliy of flcaio-sppressio of he proposed PWM mehod, he eqivale C 2 is chaged from 47μF (paralleled by wo capaciors wih capaciace 235μF ) o 235μF (removig oe of he wo capaciors). By adjsig he fial modlaio wave a each swichig period, he capacior volages U cap1 ad U cap2 flcae oly a lile more as show i Fig. 18, ad he lie o lie volage ab is o ifleced sigificaly. Therefore, he proposed mehod ca olerae he imbalace capaciace (a leas 5%) of he series coeced DC-lik capaciors, de o he capacior-volage loop. C 47μF, C 47μF 1 2 ab (8V/div) C 47μF, C 235μF 1 2 Fig. 18 Experimeal resls of capaciace imbalace bewee DC-lik capaciors sig proposed PWM mehod (m=1, f=5hz, cos.886, R 6, L=1mH, C1= 47μF, ad eqivale C2 is chaged from 47μF o 235μF ). Whe a symmeric hree-phase load sep chage happes from R 9 o 4.5, he experime resls are show i Fig. 19. Wih he proposed mehod, i a ad he flcaio of U cap1 ad U cap2 icrease, as show i Fig. 19(a, b) respecively. However, he fial modlaio wave is modified hrogh he capacior-volage loop wih he qasi PR coroller, ad is amplide also icreases properly as show i Fig. 19(a) ad herefore he flcaio of U cap1 ad U cap2 ca also be corolled well as show i Fig. 19(b). Uder he same codiios, Fig. 19(c) shows he load sep chage experime resls wih he basic carrier-based PD PWM mehod. I is see ha he flcaio of U cap1 ad U cap2 is sill mch larger ha he oe i Fig. 19(b). Afer he sep chage i load resisace, he phase crre icreases ad he load power facor redces. Comparig Fig. 19(b) wih Fig. 19(c), he
chage prior o fial pblicaio. Mascrip ID:TPEL-Reg-215-9-1497.R1.> 1 flcaio sig he proposed mehod is virally imme o he disrbace facors, b he basic mehod is very oscillaory. ao (4V/div) Disrbace corse (5V/div) Load sep i a (3.5A/div) R 9 R 4.5 (a) Phase crre (boom), fial modlaio wave (middle), ad phase volage (pper) i Phase-a sig proposed PWM mehod ab (8V/div) (5V/div) R 9 R 4.5 (b) Fial modlaio wave i Phase-a (boom), lie o lie volage (middle) ad capacior volages (pper) sig proposed PWM mehod ab (8V/div) (5V/div) R 9 R 4.5 (c) Fial modlaio wave i Phase-a (boom), lie o lie volage (middle) ad capacior volages (pper) sig basic PWM mehod Fig. 19 Experimeal resls of symmeric hree-phase load sep chage from R 9 o 4.5 (m=.733, f=4hz, L=2mH ad C1=C2= 47μF ). V. CONCLUSION This paper irodces a ew mehod for he sppressio of flcaios i he NPP of a hree-level NPC iverer sig he capacior-volage loop. De o he cosa iiial phase of he ijeced zero seqece, he saddle wave modlaio mehod has limied capabiliy o sppress he flcaio of he NPP. The essece of he NPP flcaio ca be revealed by he average plse NP crre: he flcaio freqecy is hree imes he fdameal; he flcaio amplide is maily deermied by he modlaio idex, he phase crre ad load power facor; he eqivale iiial phase of he NPP flcaio is relaed o he load power facor. Redcig he amplide of he average plse NP crre is a efficie way o sppress he NPP flcaio. Uder VVVF corol mode, he corolled variable, which varies wih he disrbace facors, (i.e. modlaio idex, phase crre, load power facor, ec) ca be prodced properly by a qasi PR coroller i he capacior-volage loop. The fial hree-phase modlaio waves are obaied by vire of he corolled variable. The redcio i amplide of he average plse NP crre is carried o hrogh he proposed phase plse widh dy cycle disrbace PWM. Experimeal resls demosrae ha der he VVVF corol mode, he proposed mehod o oly sppresses he NPP flcaio efficiely, b also avoids he overlappig of he level layers i he lie o lie volages, redces he swichig acios (i high modlaio idices), ad oleraes he imbalace capaciace (a leas 5%) of he series coeced DC-lik capaciors. I is siable for fa ad pmp applicaios wih he idcio moor. REFERENCES [1] A. Nabae, I. Takahashi, ad H. Akagi, A ew eral-poi-clamped PWM iverer, IEEE Tras. Id. Appl., vol. IA-17, o. 5, pp. 518 523, Sep./Oc. 1981. [2] D. W. Kag, C. S. Ma, T. J. Kim ad D. S. Hy, Simple corol sraegy for balacig he DC-lik volage of eral-poi-clamped iverer a low modlaio idex, IEE Proceedigs-Elecric Power Applicaios, vol. 151, o. 5, pp. 569 575, Sep. 24. [3] U. Choi, J. Lee, ad K. Lee, New modlaio sraegy o balace he eral-poi volage for hree-level eral-clamped iverer sysems, IEEE Tras. Eergy Covers., vol. 29, o. 1, pp. 91 1, Mar. 214. [4] J. She, S. Schröder, B. Dro, ad R. Roeser, A eral-poi balacig coroller for a hree-level iverer wih fll power-facor rage ad low disorio, IEEE Tras. Id. Appl., vol. 49, o. 1, pp. 138 148, Ja./Feb. 213. [5] R. Sommer, A. Meres, C. Broe, ad G. Trah, Medim volage drive sysem wih NPC hree-level iverer sig IGBTs, i Proc. IEEE PWM Medim Volage Drives Semi., May 11, 2, pp. 1 5. [6] P. C. Loh, F. Gao, ad F. Blaabjerg, e al., Plse widh-modlaed Z-sorce eral-poi-clamped iverer, IEEE Tras. Id. Appl., vol. 43, o. 5, pp. 1295 138, Sep./Oc. 27. [7] J. Po, R. Pidado, D. Boroyevich, ad P. Rodrigez, Limis of he eral-poi balace i back-o-back-coeced hree-level coverers, IEEE Tras. Power Elecro., vol. 19, o. 3, pp. 722 731, May 24. [8] C. L. Xia, X. G, T. N. Shi, ad Y. Ya, Neral-poi poeial balacig of hree-level iverers i direc-drive wid eergy coversio sysem, IEEE Tras. Eergy Covers., vol. 26, o. 1, pp. 18 29, Mar. 211. [9] M. K. Mishra, A. Joshi, ad A. Ghosh, Corol schemes for eqalizaio of capacior volages i eral clamped sh compesaor, IEEE Tras. Power Del., vol. 18, o. 2, pp. 538 544, Apr. 23. [1] Z. Zhag, O. C. Thomse, ad M. A. E. Aderse, Discoios PWM modlaio sraegy wih circi-level decoplig cocep of hree-level eral-poi-clamped (NPC) iverer, IEEE Tras. Id. Elecro., vol. 6, o. 5, pp. 1897 196, May 213. [11] A. K. Gpa, ad A. M. Khambadkoe, A simple space vecor PWM scheme o operae a hree-level NPC iverer a high modlaio idex icldig over modlaio regio, wih eral poi balacig, IEEE Tras. Id. Appl., vol. 43, o. 3, pp. 751 76, May/J. 27. [12] S. Das, ad G. Narayaa, Aalyical closed-form expressios for harmoic disorio correspodig o ovel swichig seqeces for eral-poi-clamped iverers, IEEE Tras. Id. Elecro., vol. 61, o. 9, pp. 4485 4497, May 214. [13] Y. C. Zhag, Z. M. Zhao, ad J. G. Zh, A hybrid PWM applied o high-power hree-level iverer-fed idcio-moor drives, IEEE Tras. Id. Elecro., vol. 58, o. 8, pp. 349 342, May 211. [14] O. Dordevic, M. Joes, ad E. Levi, A compariso of carrier-based ad space vecor PWM echiqes for hree-level five-phase volage sorce iverers, IEEE Tras. Id. Iform., vol. 9, o. 2, pp. 69 619, May 213.
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