Stereo, Differential Input Cap-Free Line Driver Features General Description Operating Voltage: 3V~3.6V Differential Input Ground Reference Output - No Output Capacitor Required (for DC Blocking) - Save the PCB Space - Reduce the BOM Costs - Improve the Low Frequency Response Low Noise and THD+N - SNR > 08dB - Noise < 8mV rms - THD+N < 0.02% at 20Hz~20kHz Output Voltage Swing Can Reach 2.Vrms/Ch into 2.5kW at V DD =3.3V High PSRR: 80dB at 27Hz Fast Start-up Time: 500ms Integrate the De-Pop ry Thermal and Short- Protection Surface-Mount Packaging - SOP-4 - TSSOP-4 Lead Free and Green Devices Available (RoHS Compliant) The APA27 is a stereo, differential input, single supply, and cap-free line driver, which is available in SOP-4 and TSSOP-4 packages. The APA27 is ground-reference output, and doesn t need the output capacitors for DC blocking. The advantages of eliminating the output capacitor are saving the cost, eliminating component height, and improving the low frequency response. The external gain setting is recommended using from ±V/V to ±0V/V. High PSRR provides increased immunity to noise and RF rectification. APA27 has shutdown and under-voltage detector function for Depop solution. The APA27 is capable of driving 2.V rms at 3.3V into 2.5kΩ load, and provides short-circuit and thermal protection. Simplified Application Applications Stereo Input Signal APA27 Stereo Line-Out Signal Set-Top Boxes CD/DVD Players LCD TVs HTIBs (Home Theater in Box) ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders.
Pin Configuration RINP RINN 2 ROUT 3 GND 4 SDN 5 APA27 4 LINP 3 LINN 2 LOUT UVP 0 PGND VSS 6 9 VDD CPN 7 8 CPP RINP RINN 2 ROUT 3 GND 4 SDN 5 APA27 4 LINP 3 LINN 2 LOUT UVP 0 PGND VSS 6 9 VDD CPN 7 8 CPP TSSOP-4 (Top View) SOP-4 (Top View) Ordering and Marking Information APA27 APA27 O : APA27 K : Note: ANPEC lead-free products contain molding compounds/die attach materials and 00% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines Green to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 500ppm by weight). Absolute Maximum Ratings (Note ) Symbol Parameter Rating Unit V PGND_ GND PGND to GND Voltage -0.3 to 0.3 V DD Supply Voltage (VDD to GND and PGND) -0.3 to 4 V SDN Input Voltage (SDN to GND) V GND-0.3 to V DD+0.3 V SS VSS to GND and PGND Voltage -6 to 0.3 V OUT ROUT and LOUT to GND Voltage V SS-0.3 to V DD+0.3 V CPP CPP to PGND Voltage V PGND-0.3 to V DD+0.3 V CPN CPN to PGND Voltage V SS-0.3 to V PGND+0.3 T J Maximum Junction Temperature 50 T STG Storage Temperature Range -65 to +50 T SDR Maximum Soldering Temperature Range, 0 Seconds 260 P D Dissipation Internally Limited W Note: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. APA27 XXXXX APA27 XXXXX Assembly Material Handling Code Temperature Range Package Code Package Code O : TSSOP-4 K : SOP-4 Operating Ambient Temperature Range I : -40 to 85 o C Handling Code TR : Tape & Reel Assembly Material G : Halogen and Lead Free Device XXXXX - Date Code XXXXX - Date Code V o C 2
Thermal Characteristics Symbol Parameter Typical Value Unit θ JA (Note 2) Thermal Resistance - Junction to Ambient TSSOP-4 SOP-4 20 20 O C/W Note 2: Please refer to Thermal Pad Consideration. 2 layered 5 in2 printed circuit boards with 2oz trace and copper through several thermal vias. The thermal pad is soldered on the PCB. Recommended Operating Conditions Symbol Parameter Min. Range Max. Unit V DD Supply Voltage 3 3.6 V IH High Level Threshold Voltage SDN.0 - V V IL Low Level Threshold Voltage SDN - 0.35 T A Operating Ambient Temperature Range -40 85 T J Operating Junction Temperature Range -40 25 o C o C R L Load Resistance 6 00k Ω Electrical Characteristics V DD =3.3V, V GND =V PGND =0V, V SDN =V DD, C CPF =C CPO =, C i =, R L =2.5kΩ, T A =25 o C, R i =0kΩ, R f =20kΩ (unless otherwise noted) Symbol Parameter Test Conditions APA27 Min. Typ. Max. Unit I DD V DD Supply Current - 0 5 ma I SD V DD Current V SDN=0V - 5 µa I l Input Current SDN - 0. - µa CHARGE PUMP f OSC Switching Frequency 400 500 600 khz DRIVERS R eq Equivalent Resistance - 2 25 Ω A VO Open Loop Voltage Gain 80 00 - db GW Unity Gain Bandwidth 8 0 - MHz V SR Slew Rate - 4.5 - V/µs V OS Output Offset Voltage V DD=3.0V to 3.6V, R L = 2.5kΩ -5-5 mv V N Output Noise R i=0kω, R f=0kω - 8 5 µv rms T start-up Start-up Time - 500 - µs PSRR Supply Rejection Ratio V DD=3.0V to 3.6V, V rr=200mv rms f in= 27Hz f in= khz f in= 20kHz C L Maximum Capacitive Load - 220 - pf V ESD ESD Protection OUTR, OUTL - 8 - kv - -80-80 -50-60 -60-45 db 3
Electrical Characteristics (Cont.) V DD =3.3V, V GND =V PGND =0V, V SDN =V DD, C CPF =C CPO =, C i =, R L =2.5kΩ, T A =25 o C, R i =0kΩ, R f =20kΩ (unless otherwise noted) Symbol Parameter Test Conditions APA27 Min. Typ. Max. Unit V O Output Voltage (Stereo, In Phase) THD+N=%, f in=khz R L=2.5kΩ R L=00kΩ 2.0-2. 2.3 - V Po Output (Stereo, In Phase) THD+N=%, f in=khz R L=32Ω - 20 - mw THD+N Total Harmonic Distortion Plus Noise V O=2V rms, R L=2.5kΩ f in=20hz f in=khz f in=20khz 0.0 0.0005 0.0 0.02 0.00 0.02 0.03 0.002 0.03 % Po=20mW, RL=32Ω f in=khz 0.0 0.04 0.05 Crosstalk S/N T SD UVP FUNCTION Channel Separation Signal to Noise Ratio Thermal Protection Temperature V O=2V rms, R L=2.5kΩ f in=20hz f in=khz f in=20khz V O=2Vrms, R L=2.5kΩ, R i=0kω, R f=0kω, With A-weighting Filter 90 90 80 00 00 90 0 0 00 db 02 08 4 db - 50 - o C V UVP I HYS External Under Voltage Detection External Under Voltage Detection Hysteresis Current -.25 - V - 5.0 - µa 4
Typical Operating Characteristics THD+N vs. Output THD+N vs. Output Voltage THD+N (%) 0 0. R L=32Ω C in=2.2µf f in=khz In phase out phase THD+N (%) 0 0. In phase V DD =3.3V R L=600Ω C in=2.2µf f in=khz A v =2V/V 0.0 0.0 0 0 20 30 40 50 60 Output (mw) 0.00 0 0.5.5 2 2.5 Output Voltage (V) THD+N (%) 0 0. 0.0 THD+N vs. Output Voltage In phase R L=0kΩ C in =2.2µF f in =khz THD+N (%) 0 0. 0.0 THD+N vs. Output Voltage In phase R L=00kΩ C in=2.2µf f in =khz 0.00 0.00 0 0.5.5 2 2.5 Output Voltage (V) 0 0.5.5 2 2.5 Output Voltage (V) 0. In phase R L =32Ω C in=2.2µf THD+N vs. Frequency 0. In phase R L=600Ω C in=2.2µf THD+N vs. Frequency THD+N (%) 0.0 Po=2mW Po=20mW THD+N (%) 0.0 Vo=2Vrms Po=0mW Vo=Vrms 0.00 20 00 k 0k 20k 0.00 0.0005 20 00 k 0k 20k 5
Typical Operating Characteristics (Cont.) 0. In phase R L=0kΩ C in=2.2µf A v =2V/V THD+N vs. Frequency 0. In phase R L=00kΩ C in=2.2µf THD+N vs. Frequency THD+N (%) 0.0 THD+N (%) 0.0 Vo=Vrms Vo=2Vrms 0.00 0.0005 20 00 k 0k 20k Vo=2Vrms Vo=Vrms 0.00 0.0005 20 00 k 0k 20k +0 Frequency Response +0 +0 Frequency Response +0 Gain(dB) +8 +6 +4 Gain Phase -50-00 -50-200 +2 V DD =3.3V -250 R L=600Ω +0 V o=2v rms -300 C in=2.2µf -350-2 0 00 k 0k 200k Phase(Deg) Gain(dB) +8 +6 +4 Gain Phase -50-00 -50-200 +2-250 R L=0kΩ +0 V o=2v rms -300 C in=2.2µf -350-2 0 00 k 0k 200k Phase(Deg) Gain(dB) +0 +8 +6 +4 Frequency Response Gain Phase -00-50 -200 +2-250 R L=00kΩ +0 V o=2v rms C in=2.2µf -300-350 -2 0 00 k 0k 200k +0-50 Phase(Deg) Crosstalk(dB) -60-70 -80-90 -00-0 R L=600Ω V o=2v rms C in = Crosstalk vs. Frequency Left to Right Right to Left -20 20 00 k 0k 20k 6
Typical Operating Characteristics (Cont.) Crosstalk(dB) -60-70 -80-90 -00 R L=2.5kΩ V o=2v rms C in = Crosstalk vs. Frequency Right to Left Crosstalk(dB) -60-70 -80-90 -00 R L=00kΩ V o=2v rms C in = Crosstalk vs. Frequency Left to Right Right to Left -0 Left to Right -0-20 20 00 k 0k 20k -20 20 00 k 0k 20k 20µ Output Noise Voltage vs. Frequency 20µ Output Noise Voltage vs. Frequency Output Noise Voltage(Vrms) 0µ 8µ 6µ 4µ Left channel Right channel V DD =3.3V 2µ R L=600Ω C in= A-Weighting µ 20 00 k 0k 20k Output Noise Voltage(Vrms) 0µ 8µ 6µ 4µ Left channel Right channel V DD =3.3V 2µ R L=00kΩ C in= A-Weighting µ 20 00 k 0k 20k Supply Rejection Ratio(dB) -40-50 -60-70 -80-90 R L=600Ω C in= V rr=0.2v pp PSRR vs. Frequency Right channel Left channel -00 20 00 k 0k 20k Supply Rejection Ratio(dB) -40-50 -60-70 -80-90 R L=2.5kΩ C in= V rr=0.2v pp PSRR vs. Frequency Right channel Left channel -00 20 00 k 0k 20k 7
Typical Operating Characteristics (Cont.) 8 7 Supply Current vs. Supply Voltage No Load Supply Current(mA) 6 5 4 3 2 0 0 0.5.5 2 2.5 3 3.5 Supply Voltage(V) 8
Pin Description PIN I/O/P NO. NAME RINP I Right channel non-inverting input. 2 RINN I Right channel inverting input. 3 ROUT O Right channel output. 4 GND P Signal ground. FUNCTION 5 SDN I mod control input signal, pull low for shutdown headphone driver. This pin should be connect a 00Ω Protection Resistor. 6 VSS P Headphone driver negative power supply. 7 CPN I/O Charge pump flying capacitor negative connection. 8 CPP I/O Charge pump flying capacitor positive connection. 9 VDD P Supply voltage input. 0 PGND P ground. UVP I Under voltage protection input. Floating or Pull H to disable this function. 2 LOUT O Left channel output. 3 LINN I Left channel inverting input. 4 LINP I Left channel non-inverting input. Block Diagram RINN RINP LINP LINN ROUT LOUT Thermal and Over Current Protection Under Voltage Detection UVP VDD SDN and Depop Charge Pump CPP CPN GND PGND VSS 9
Typical Application Line Driver Amplifier. Inverting R FB R-CH Input C IN R IN R FB RINN RINP ROUT R-CH Output System L-CH Input C IN R IN Control SDN R SD 00Ω LINP LINN Thermal and Over Current Protection Under Voltage Detection and Depop Charge Pump LOUT UVP VDD CPP CPN C CPF L-CH Output 50kΩ 3kΩ kω LDO 0µF GND PGND VSS C CPO 2. Non-Inverting R FB R FB R-CH Input L-CH Input C X C IN C IN C X R IN R IN Control R X R X SDN R SD 00Ω RINN RINP LINP LINN Thermal and Over Current Protection Under Voltage Detection and Depop Charge Pump ROUT LOUT UVP VDD CPP CPN C CPF R-CH Output L-CH Output 50kΩ 3kΩ kω LDO System 0µF GND PGND VSS C CPO 0
Typical Application (Cont.) Line Driver Amplifier (Cont.) 3. Differential R FB R-CH Input C IN R IN R FB RINN RINP ROUT R-CH Output L-CH Input C IN C IN C IN R IN R IN R IN Control R FB R FB SDN R SD 00Ω LINP LINN Thermal and Over Current Protection Under Voltage Detection and Depop Charge Pump LOUT UVP VDD CPP CPN C CPF L-CH Output 50kΩ 3kΩ kω LDO System 0µF Second-Order Active Low-Pass Filter GND PGND VSS C CPO. Differential R-CH Input L-CH Input C3 C3 C3 C3 C2 C2 Control C SDN C C C R SD 00Ω RINN RINP C LINP LINN C Thermal and Over Current Protection Under Voltage Detection and Depop Charge Pump ROUT C out 220pF C out 220pF LOUT UVP VDD CPP CPN C CPF R-CH Output L-CH Output 50kΩ 3kΩ kω LDO System 0µF GND PGND VSS C CPO
Typical Application (Cont.) Second-Order Active Low-Pass Filter 2. Inverting C R-CH Input C3 C2 C RINN RINP ROUT C out 220pF R-CH Output L-CH Input C3 C2 Control C SDN C R SD 00Ω LINP LINN Thermal and Over Current Protection Under Voltage Detection and Depop Charge Pump C out 220pF LOUT UVP VDD CPP CPN C CPF L-CH Output 50kΩ 3kΩ kω LDO System 0µF GND PGND VSS C CPO 2
Function Description Line Driver Operation V OUT Conventional Line Driver V OUT V DD V DD /2 GND V DD GND Function In order to reduce power consumption while not in use, the APA27 contains shutdown controllers to externally turn off the amplifier bias circuitry. This shutdown feature turns the amplifier off when logic low is placed on the SDN pins for the APA27. The trigger point between a logic high is.0v and logic low level is 0.35V. It is recommended to switch between ground and the supply voltage V DD to provide maximum device performance. By switching the SDN pins to a low level, the amplifier enters a low-consumption current circumstance, charge pump is disabled, and I DD for the APA27 is in shutdown mode. In normal operating, the APA27 s SDN pins should be pulled to a high level to keep the IC out of the shutdown mode. The SDN pins should be tied to a definite voltage to avoid unwanted circumstance changes. Under-Voltage Protection V SS Cap-free Line Driver Figure. Cap-free Operation The APA27 s line drivers use a charge pump to invert the positive power supply (V DD ) to negative power supply (V SS ), see figure. The headphone drivers operate at this bipolar power supply (V DD and V SS ) and the outputs reference refers to the ground. This feature eliminates the output capacitor that is using in conventional single-ended headphone drive amplifier. Compare with the single power supply amplifier, the power supply range has almost doubled. Thermal Protection The thermal protection circuit limits the junction temperature of the APA27. When the junction temperature exceeds T J =+50 O C, a thermal sensor turns off the driver, allowing the devices to cool. The thermal sensor allows the driver to start-up after the junction temperature down about 25 O C. The thermal protection is designed with a 25 O C hysteresis to lower the average T J during continuous thermal overload conditions, increasing lifetime of the ICs. External under voltage detection can be used to shutdown the APA27 before an input device can generate a pop. The shutdown threshold at the UVP pin is.25v. The user selects a resistor divider to obtain the shutdown threshold and hysteresis for the specific application. The thresholds can be determined as below: VUVP = (.25-6µAx) x (+)/ Hysteresis = 5µA x x (+)/ With the condition: >>// For example, to obtain V UVP =3.8V and V hysteresis, = 3kΩ, =kω and =50kΩ. 3kΩ kω Vsystem 50kΩ 6µA UVP Pin.25V Figure 2. Under-Voltage Protection 3
Application Information Using The APA27 As A Second-Order Filter Input Capacitor, C i Several audio DACs used today require an external lowpass filter to remove out-of-band noise. This is possible with the APA27, as it can be used like a standard Operational Amplifier. Several filter topologies can be implemented, both single-ended and differential. In Figure 3, a multi-feedback (MFB) with differential input and single-ended input is shown. An ac-coupling capacitor to remove dc content from the source is shown; it serves to block any dc content from the source and lowers the dc-gain to, helping reducing the output dc-offset to minimum. equation: fc(highpass ) Figure 3. Second-Order Active Low-Pass Filter Table : Filter Specifications. Gain (V/V) High Pass (Hz) Low Pass (khz) C (pf) C2 (pf) C3 (mf) (kw) (kw) (kw) -.6 40 00 680 0 0 0 24 -.5.3 40 68 680 5 8.2 2 30-2.6 60 33 50 6.8 5 30 47-2.6 30 47 470 6.8 5 30 43-3.33.2 30 33 470 0 3 43 43-0.5 30 22 000 22 4.7 47 27 For Inverting Input, The overall gain is: A V = The high pass filter s cutoff frequency is: f c(highpass) = 2πC3 () (2) C i R i In the typical application, an input capacitor, C i, is required to allow the amplifier to bias the input signal to the proper DC level for optimum operation. In this case, C i and the minimum input impedance R i from a high-pass filter with the corner frequency are determined in the following R f Figure 4. Typical Application = 2πR C The value of C i must be considered carefully because it directly affects the low frequency performance of the circuit. R i is the external input resistance that typical value is 0kΩ and the specification calls for a flat bass response down to 20Hz. Equation is reconfigured as below: Ci = 2πR f i c(highpass) When the input resistance variation is considered, the C i is 0.8µF, so a value in the range of to 2.2µF would be chosen. A further consideration for this capacitor is the leakage path from the input source through the input network (R i + R f, C i ) to the load. i i This leakage current creates a DC offset voltage at the input to the amplifier that reduces useful headroom, especially in high gain applications. For this reason, a low leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the negative side of the capacitor should face the amplifiers input in most applications because the DC level of the amplifiers input is held at GND. Please note that it is important to confirm the capacitor polarity in the application. (4) (5) The low pass filter s cutoff frequency is: f c(lowpass) = 2π CC2 (3) Input Resistor, R i The gain of the APA27 is be set by the external input resistor (R i ) and external feedback resistor (R f ). Please see the figure 4. 4
Application Information (Cont.) Input Resistor, R i (Cont.) Gain (A V ) = Rf R i The external gain setting is recommended using from -V/V to -0V/V, and the R i is in the range from kω to 47kΩ. It s recommended to use % tolerance resistor or better. Keep the input trace as short as possible to limit the noise injection. The gain is recommended to set -V/V, and R i is 0kΩ, and R f is 0kΩ. (6) Charge Pump Output Capacitor, C CPO The output capacitor s value affects the power ripple directly at CV SS (V SS ). Increasing the value of output capacitor reduces the power ripple. The ESR of output capacitor affects the load transient of CV SS (V SS ). Lower ESR and greater than ceramic capacitor is a recommendation. Layout Recommendation.5mm Feedback Resistor, R f Refer the figure 4, the external gain is setting by R i and R f ; and the gain setting is recommended using from -V/V to -0V/V. The R f is in the range from 4.7kΩ to 00kΩ. It s recommended to use % tolerance resistor or better. 0.7mm.27mm Supply Decoupling, C s The APA27 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD+N) is as low as possible. supply decoupling also prevents the oscillations being caused by long lead length between the amplifier and the speaker. The optimum decoupling is achieved by using two different types of capacitors that target on different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0., is placed as close as possible to the device VDD and PVDD lead for the best performance. For filtering lower frequency noise signals, a large aluminum electrolytic capacitor of 0µF or greater placed near the audio power amplifier is recommended. 0.35mm 5.0mm SOP-4 Land Pattern Recommendation 4.7mm.7mm.7mm Charge Pump Flying Capacitor, C CPF The flying capacitor affects the load transient of the charge pump. If the capacitor s value is too small, then that will degrade the charge pump s current driver capability and the performance of line drive amplifier. Increasing the flying capacitor s value will improve the load transient of charge pump. It is recommended using the low ESR ceramic capacitors (X7R type is recommended) above. 5 0.65mm TSSOP-4 Land Pattern Recommendation
Package Information TSSOP-4 D SEE VIEW A E A2 E e b c A 0.25 A L S Y M TSSOP-4 MILLIMETERS A B O L MIN. MAX. INCHES.20 MIN. MAX. 0.047 A A2 0.05 0.80 0.5.05 b 0.9 0.30 c 0.09 0.20 0.002 0.03 0.006 0.04 0.007 0.02 0.004 0.008 D E 4.90 5.0 6.20 6.60 0.93 0.20 0.244 0.260 E e L 0 4.30 4.50 0.69 0.77 0.65 BSC 0.026 BSC 0.45 0.75 0.08 0.030 0 8 0 8 Note :. Follow from JEDEC MO-53 AB-. 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension "E" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 0 mil per side. 6
Package Information SOP-4 D SEE VIEW A E E h X 45 e b c A A2 A VIEW A L 0.25 GAUGE PLANE SEATING PLANE S Y M SOP-4 B O L MIN. MAX. MIN. A.75 A 0.0 0.25 0.004 MAX. 0.069 0.00 A2.25 0.049 b 0.3 0.5 0.02 0.020 c 0.7 0.25 0.007 0.00 D 8.55 8.75 0.337 0.344 E 5.80 6.20 0.228 0.244 E 3.80 4.00 0.50 0.57 e.27 BSC 0.050 BSC h 0.25 0.50 0.00 0.020 L 0.40.27 0.06 0.050 0 0 8 0 8 MILLIMETERS INCHES Note:. Follow JEDEC MS-02 AB. 2. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension E does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 0 mil per side. 7
Carrier Tape & Reel Dimensions OD0 P0 P2 P A W F E B A0 OD B A T B0 K0 SECTION A-A SECTION B-B d H A T Application A H T C d D W E F TSSOP-4 330.0 2.00 50 MIN. 6.4+2.00-0.00 3.0+0.50-0.20.5 MIN. 20.2 MIN. 2.0 0.30.75 0.0 5.50 0.0 P0 P P2 D0 D T A0 B0 K0 4.00 0.0 8.00 0.0 2.00 0.0.5+0.0-0.00.5 MIN. 0.6+0.00-0.40 6.40 0.20 5.20 0.20.60 0.20 Application A H T C d D W E F SOP-4 330.0 2.00 50 MIN. Devices Per Unit 6.4+2.00-0.00 3.0+0.50-0.20.5 MIN. 20.2 MIN. 6.0 0.30.75 0.0 7.50 0.0 P0 P P2 D0 D T A0 B0 K0 4.0 0.0 8.0 0.0 2.0 0.0.5+0.0-0.00.5 MIN. 0.6+0.00-0.40 6.40 0.20 9.00 0.20 2.0 0.20 (mm) Package Type Unit Quantity TSSOP-4 Tape & Reel 2500 SOP-4 Tape & Reel 2500 8
Taping Direction Information TSSOP-4 USER DIRECTION OF FEED SOP-4 USER DIRECTION OF FEED 9
Classification Profile Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly Preheat & Soak Temperature min (T smin) Temperature max (T smax) Time (T smin to T smax) (t s) 00 C 50 C 60-20 seconds 50 C 200 C 60-20 seconds Average ramp-up rate (T smax to T P) Liquidous temperature (T L) Time at liquidous (t L) Peak package body Temperature (T p)* Time (t P)** within 5 C of the specified classification temperature (T c) 3 C/second max. 3 C/second max. 83 C 60-50 seconds 27 C 60-50 seconds See Classification Temp in table See Classification Temp in table 2 20** seconds 30** seconds Average ramp-down rate (T p to T smax) 6 C/second max. 6 C/second max. Time 25 C to peak temperature 6 minutes max. 8 minutes max. * Tolerance for peak profile Temperature (T p) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (t p) is defined as a supplier minimum and a user maximum. 20
Classification Reflow Profiles (Cont.) Table. SnPb Eutectic Process Classification Temperatures (Tc) Package Thickness Volume mm 3 <350 Volume mm 3 350 <2.5 mm 235 C 220 C 2.5 mm 220 C 220 C Table 2. Pb-free Process Classification Temperatures (Tc) Package Thickness Volume mm 3 <350 Volume mm 3 350-2000 Volume mm 3 >2000 <.6 mm 260 C 260 C 260 C.6 mm 2.5 mm 260 C 250 C 245 C 2.5 mm 250 C 245 C 245 C Reliability Test Program Test item Method Description SOLDERABILITY JESD-22, B02 5 Sec, 245 C HOLT JESD-22, A08 000 Hrs, Bias @ T j=25 C PCT JESD-22, A02 68 Hrs, 00%RH, 2atm, 2 C TCT JESD-22, A04 500 Cycles, -65 C~50 C HBM MIL-STD-883-305.7 VHBM 2KV MM JESD-22, A5 VMM 200V Latch-Up JESD 78 0ms, tr 00mA Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing st Road, SBIP, Hsin-Chu, Taiwan Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No., Lane 28, Sec 2 Jhongsing Rd., Sindian City, Taipei County 2346, Taiwan Tel : 886-2-290-3838 Fax : 886-2-297-3838 2