SigmaDelta ADC
Quick View Analog input time Oversampling & pulse density modulation sampling rate >> fn Nyquist rate One bit digital output Higher input > more 's Lower input > more 's Oversampling ratio r /fn r 8, 6, 3,...,56
Quantiation Error in ADC Digital output 0 0 00 Analog input Δ Δ 3Δ quantiation error e / / q eq deq not a function of sampling rate Quantiation error noise 0 0 00 3 3 digital representation of 0 0 00 sampling points
Quantiation Error in Oversampling '4 0 0 00 3 3 As sampling rate increases,. no change in power. more possibility of ero error points ero error points In case of infinite oversampling, We have all transition points crossing code boundaries all ero error points. Sufficient information to recover original analog input > recall Nyquist theorem
Spectrum of Sampled Quantiation Noise quantied level target Suppose a pitcher throws a ball into target in every Ts. Assuming probability is uniformly distributed in target one. target one lowest freq. component DC Ts Ts 3Ts 4Ts 5Ts 6Ts 7Ts Nf : noise spectrum target one highest freq. component / Ts Ts 3Ts 4Ts 5Ts 6Ts 7Ts / / Nyquist sampler : fmax / Quantiation noise power, Δ²/, is uniformly distributed from DC to /
Noise Reduction by Oversampling Fact Quantiation noise powerδ²/ is independent of sampling rate. Δ²/ is uniformly distributed from DC to /. Total noise is fixed. Nf ' '/ / / '/ As sampling rate increases from to ', noise floor decreases by the factor of /' Comparison of Inband Noise Power NyquistRate Sampling vs. Oversampling ' fn/fb '/ filtered out fn/ fn/ filtered out '/ Noise power in oversampling fn / fn / df ' fn ' r r : oversampling ratio ratio of sampling rate to Nyquist rate
Effect on SNR Recall peak SNR db 6.0m.76 in db m : resolution PeakSNR : ratio between the maximum input power and quantiation noise power Every x oversampling decreases noise power by half > 3dB increase in SNR > 4x oversampling effectively increases resolution of bit. original peak SNR db 0 log r 6.0m.76 in db For 3bit SNR increase, 644³ oversampling needed > inefficient!!
Oversampled Signal Spectrum PSD Nyquist sampling PSD fb fn/ fn f Oversamling ratior4 fb 4fN f Specification released for analog antialiasing filter at input stage r ~ ⁿ < r < 6 : mild oversampling 6 < r < 56 heavy oversampling
xt x p t Predictive Oversampling Delta Modulator comparator integrator D Q bit quantier yn bit DAC Vref Vref equivalent model xn x p t quantier xn : comparator also performs sample and hold yn No input change xpt tracks xt Demodulator finds xpt Integration converts level to multilevel on xpt
Delta Modulator xn x p t Modulator Demodulator yn yn same integrator x p t LPF xt X E quantier Y Y X Y E Y X E STF X NTF E Signal transfer function : Noise transfer function : STF NTF Mathematical linear model If Y inputted to demodulator, recoverd signal X E Delta modulation equally treats signal and noise.
Stability Issue Overload : Large input signal changes faster than modulator can track. Overload causes phase lag. Modulator may be unstable in case of overloading.
xt x p t xt Stability Issue x p t Filter yn π A criterion for stability π θ NTF e j π dθ < ~.5 xt x p t xt x p t 80 phase lag > positive feedback!! > can be unstable Once modulator enters unstable condition, it stays unstable even if input is ero. Extensive simulation is required for overloading case. If filter is st order, maximum phase shift is 90. > Unconditionally stable
Development of Σ Modulator from Modulator Delta modulator Start from Delta modulator X Modulator E Y Demodulator LPF X E Integrator in demodulator moved to input stage of modulator X Y LPF X The term 'sigma' is added due to an additional integrator at the input stage. SigmaDelta modulator Two Integrators in modulator merged X Modulator E Y LPF Demodulator X
LowFrequency Error Elimination Concept Error injected before integrator Error injected after integrator error In A Out In A error B Out At steady state : Case In, error 0. > A 0, Out. Case In, error 0. > A 0, Out. Case 3 In, error k > A 0, Out k Out tracks error Σ At steady state : Case In, error 0. > A 0, B 0.9, Out Case In, error 0. > A 0, B 0.8, Out Case 3 In, error k > A 0, B k, Out Error is not seen at Out Integrator output can be anything to make it's input be ero. > Out becomes In regardless of the error injection. Since this system is a linear system, output component of frequency fo is generated only by the fo components of the inputs. If the input band of interest is small, a low pass filtering of the output results in erroreliminated recovery of the input signal.
storder Σ Modulator Modulator Demodulator X E Y LPF X Demodulation can be done by only LPF. Since modulator has feedback loop, it still has stability problem. Y { X Y } E Y X E STF X NTF E STF NTF : simple delay : highpass Noise Shaping Modulation dose not affect signal xt Noise component is highpass filtered. Highpass shaped noise can be suppressed by LPF in demodulator.
Spectrum of Output PSD signal noiseoversampling with noise shaping noisenyquist noiseoversampling 0 fn/ inband noise after oversampling with noise shaping /
Waveforms of Signals in Modulator Modulator Demodulator xt at bt yt LPF xt xt at 0 quantier threshold bt yt acquisition period more s for high xt more s for low xt
Modulator Output for Various Cases DC input AC input Unstable long series of and
Measurements of Modulator Performance signal noise shaping curve In log scale plot slope signal frequency band Apply various amplitudes of input signal Sequence of SNR measurement Apply a pure sinusoid for input Get a large number of output samples ~65536 Apply FFT to data Signal power : square of the signal component Noise power : sum of squares of all noise components in signal frequency band SNR ratio of the two powers
db & dbm db : 0logratio of two power quantities dbm : 0logpower/mW > refers absolute value ex mw0dbm, 0mW0dBm, 00mW0dBm, W30dBm [ ]dbm [ ]dbm [ ]db [ ]dbm [ ]db [ ]dbm Conversion of voltage quantity to dbm Power V² with R assumed to be 50 ex Input sinusoid of 63.mVpp xt 3.6mV*sinwt power xt ²,rms/50Ω {3.6mV²/}/50Ω 0.0mW 0log0.0mW/mW 0dBm ex Input sinusoid of Vpp <Vin,max ±V power V²//50Ω 0mW 0log0mW/mW 0dBm
SNR Representation with Relative Voltage Input SNR db overload Peak SNR 0 Dynamic range DR 0 VindB Xaxis : Normalied power with R 0 on Xaxis : maximum input voltage Arbitrary input Va on Xaxis : 0logVa/Vin DR power of max sinusoidal input power of sinusoidal input at SNR Since slope, DR can be calculated by extrapolated peak SNR
Noise Shaping of Higher Order Modulator Y STF X NTF E STF simple delay,, NTF : st order : nd order 3 n : 3rd order : nth order, 3,,... or high pass filter or low pass filter which covers signal band PSD Nyquist 4thorder 3rdorder ndorder Stability decreases as order goes higher oversampling with storder noise shaping fn/ only oversampling /
InBand Noise Power as a Function of Order NTF j πfts n NTF f e { NTF s sinπfts n jπfts jπfts jπfts n e e e } n n : order e j πfts jπfts n { e jsin πfts} Total noise power in signal band fb fn / NTF s df fts sin π fb fn / fn / fn / πfts n n df n n fn / n n n π n π fn f df n n n n fn / n π Qr n n r df fn assuming >> fn/
st order nd order SNR Improvement vs. Order n π Noise Power Qr n n r fn noise power π 36 r 4 π 60 5 r 3 SNR increase as r doubled x8 9dB x3 5dB effective increase in resolution.5bit.5bit 3rd order 6 π 84 7 r x8 db 3.5bit r
Choice of Order and Oversampling Ratio maximum rms power of sinusoidal input SNR when maximum input is applied n π n r n 3 n r n π n : level quantiation assumed r 3 n /n π SNR n Ex Implementation of 6bit resolution using nd order ΣΔ modulator From peak SNR db 6.0m.76 in db With m6, required peaksnr 98dB r n π 98dB 3 5 79433 /5 48 > choose r64
Design of nd Order ΣΔModulator X b b b3 E I c I c Y a a STF and NTF can be designed independently. I, I : integrator delaying or nondelaying integrator is appropriately chosen for each Ii If both nondelaying and delaying integrators are used, nondelaying integrator should be used at the first stage. ai, bi, ci : scaling factor
Example Realie ndorder ΣΔ modulator with NTF I X c b a c b a b3 E I X X Y a Y X b X X c Y a X b X E X b X c Y 3 E a c a c a c c X a c a c a c c b c b b b c b c c b Y 3 3 3 STF NTF For simplicity, internal scaling factor cc case STF then aabbb3 case STF then aab, bb30
STF and NTF cannot be designed independently. Simpler Implementation X c a I c a I E Y H.W. Using above model, try to design c,c,a,a and find STF for following cases case case case 3 case 4 NTF I I NTF I I NTF I I Case 5 : case with this model NTF I I X c I c I Y E.... a a
NTF Pole/Zero Optimiation As freq increases 3 3 3 All eros at All poles at 0 Maximum gain usually occurs at As poles go farther from, stability improves. NTFdB Lower NTF gain in signal band Smaller outofband NTF gain for better stability freq
STF As freq increases 3 c a b b All poles at 0 Typically STF has the same poles in NTF. STFdB 0dB STF has Low pass characteristic Further filtering performed by post processing Signal band freq
General Structures R. Schreier, G. Temes, "Understanding DeltaSigma Data Converters" CRFF
MultistAge noise SHapingMASH Structure E X E E3 Y Y Y3 Y 3 3 E E Y E E Y E X Y 3 Y Y Y Y 3 3 3 E X Each stage : st order > unconditionally stable Input of stage : X Input of stage : quantiation noise of stage Input of stage 3 : quantiation noise of stage > whitenoiselike quantiation error even with harmonic distortion noise of last stage remains
Practical Issues of MASH X E Y E Y {,} {,} {,} {,0,} Y {7,5,3,,,3,5,7} E3 Y3 {,0,} {4,,0,,4} The integrator of each stage performs analoglevel operation. Integrating leakage due to the imperfections of circuit and mismatches among integrators causes failure in exact cancellation of noise at the output stage. Increased output bit raises implementation complexity. 8level needed at output expression for three stage > 3bit modulator
Dynamic Range Scaling b ci x co a Integrator output should be limited to guarantee linear operation. To scale down with the ratio of k b/k ci/k x' k*co a/k Dynamic range of x' reduced by k with overall output not changed
Design with Simulink ABCD Matrix ABCD matrix : can describe any linear system. X X X3 X4 Redefine ABCDbased description U V Q Y k v k u B k Ax k x k v k u D k Cx k y To confine state vector, dynamic range scaling should be done with ABCD description.
Σ ADC Vin Σ modulator bit Decimation n Filter Channel Filter n Digital output fn Key features Oversampling Noise shaping Decimation Filter Channel Filter High resolution upto 4bits Excellent Linearity Quantiation noise reduction Relaxes analog antialiasing filter requirements Low power Input signal should be bandlimited for sufficient oversampling. No sample & hold > Embedded in modulator Wide applications Instrumentation, Voice band and Audio, Digital video, Medical Devices Wireless communication using band pass Σ modulator
Decimation & Interpolation Ex, r4 original Decimation Reduction of sampling rate by r digital LPF reduction of sampling rate by r after LP filtering /r /r /r /r /r original Interpolation Increase sampling rate by r before LP filtering increase sampling rate by r digital LPF /r /r /r result /r /r
Decimation & Interpolation Example r Original analog signal Decimation Sampled signal Low pass filtered result Reduce data rate by Interpolation Add one 0 between two data increasing data rate by Low pass filtered result
Decimation Filter Simplest implementation Comb filtersinc filter H r N r i r i 0 r N : number of cascading r : decimation ratio N Antialiasing filter All coefficients are unity > easily implemented Hardware efficient Set order of filter r to make ero at the multiples of /r Largerate down conversion ratio Used in the first stage of decimator filter Large passband drop > Set passband edge of comb filter to be at least times larger than passband edge.
Frequency Response of Comb Filter 0 / sin / sin / / / / / / N N f j f j f j r f j r f j r f j f fr r e e e e e e r f H π π π π π π π π Hf ero at f integer multiples of /r Ex 6tab comb filter for rate down conversion by 6 Normalied frequency to /r center frequencies of images when down conversion
Conceptual Bitto7 Bit Conversion Before Decimation averaging of 6 consecutive bits 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 bit word....... 7 8 9 9 9...... 9 0 9....... 8 bit word............................. bit word............................. 6 bit word............................. To prevent overflow in case of all 's, bit is additionally used.
Implementation of Comb Filter Separation of denominator and numerator Denominator : high sampling rate Numerator : low sampling rate H r N r i r i 0 r averaging r bits N Division by r can be skipped by multibit expression Ex Suppose 6bit averaging 0000000 average value 9/6 extension to 4bit 00 <same as simple addition Ex Implementation of 64 3 with /64 decimation /64 switching /64 /64 /64 In Out 64 Word length required to avoid overflow N log r i 3log 64 9bits i : word length of input
H H e j πf sinc f sinc f with normalied to Half Decimation sinc f sin πf πf In / switching Out After decimation by half noise noise signal filtered noise / /4 /4 / /4 /4 noise added to signal when down sampled cos/ x cos/ > DC term image sampling overlapped with signal
Cascading of Half Decimation Power Efficient / switching / /4 switching /4 /8 switching /8 /6 switching In Deci filter Deci filter Deci filter3 Deci filter4 Out Deci filter Deci filter Deci filter3 Deci filter4 / / /4 /4 /8 /8 /6 /6 More complicated filter > more taps in FIR
Finite Impulse Response FIR Filter Simple compared to IIR filter No feedback Linear phase characteristic FIR filter is used for filtering out outofband noise. Conversion ratio is small : usually r4 or less Decimation also performed by r Higher order required Since multiplication coefficients are not unity, much more complicated than comb filter.
FIR Filter In a a a3 a ai : multiplication coefficient Out transition edge 0.45to0.55 /r Normalied frequency to /r