Chapter 1: Introduction

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Transcription:

Second ediion ober W. Erickson Dragan Maksimovic Universiy of Colorado, Boulder.. Inroducion o power processing.. Some applicaions of power elecronics.3. Elemens of power elecronics Summary of he course. Inroducion o Processing inpu Swiching converer oupu Conrol inpu Dc-dc conversion: Change and conrol volage magniude Ac-dc recificaion: Possibly conrol dc volage, ac curren Dc-ac inversion: Produce sinusoid of conrollable magniude and frequency Ac-ac cycloconversion: Change and conrol volage magniude and frequency 3

Conrol is invariably required inpu Swiching converer oupu feedforward Conrol inpu Conroller feedback reference 4 High efficiency is essenial η = P ou P in η P loss = P in P ou = P ou η.8 High efficiency leads o low power loss wihin converer Small size and reliable operaion is hen feasible Efficiency is a good measure of converer performance.6.4..5.5 P loss / P ou 5 A high-efficiency converer P in Converer P ou A goal of curren converer echnology is o consruc converers of small size and weigh, which process subsanial power a high efficiency 6

Devices available o he circui designer 7 Devices available o he circui designer Signal processing: avoid magneics 8 Devices available o he circui designer DT s T inearmode Swiched-mode s esisors Capaciors Magneics Semiconducor devices DT s T inearmode Swiched-mode s esisors Capaciors Magneics Semiconducor devices DT s T inearmode Swiched-mode s esisors Capaciors Magneics Semiconducor devices processing: avoid lossy elemens 9

loss in an ideal swich Swich closed: v() = Swich open: i() = In eiher even: p() = v() i() = Ideal swich consumes zero power v() i() A simple dc-dc converer example I A Dc-dc converer 5Ω 5 Inpu source: Oupu load: 5, A, 5W How can his converer be realized? Dissipaive realizaion esisive volage divider 5 P loss = 5W 5Ω P in = W I A 5 P ou = 5W

Dissipaive realizaion Series pass regulaor: ransisor operaes in acive region 5 I A linear amplifier ref and base driver 5Ω P loss 5W P in W 5 P ou = 5W 3 Use of a SPDT swich I A v s () v() 5 v s () s = D DT s ( D) T s swich posiion: 4 The swich changes he dc volage level v s () s = D D = swich duy cycle D DT s ( D) T s swich posiion: T s = swiching period f s = swiching frequency = / T s DC componen of v s () = average value: s = T s T s v s () d = D 5

Addiion of low pass filer Addiion of (ideally lossless) -C low-pass filer, for removal of swiching harmonics: g v s () C P in 5 W Choose filer cuoff frequency f much smaller han swiching frequency f s This circui is known as he buck converer 6 P loss small i() v() P ou = 5 W Addiion of conrol sysem for regulaion of oupu volage inpu Swiching converer oad i v g v H(s) Sensor gain Transisor gae driver δ δ() dt s T s Error signal Pulse-widh modulaor v c G c (s) v e Hv Compensaor eference inpu v ref 7 The boos converer C 5 4 3..4.6.8 8 D

A single-phase inverer v s () v() load v s () H-bridge Modulae swich duy cycles o obain sinusoidal low-frequency componen 9. Several applicaions of power elecronics levels encounered in high-efficiency converers less han W in baery-operaed porable equipmen ens, hundreds, or housands of was in power supplies for compuers or office equipmen kw o MW in variable-speed moor drives MW in recifiers and inverers for uiliy dc ransmission lines A lapop compuer power supply sysem Inverer Display backlighing v ac () i ac () Charger PWM ecifier Buck converer Microprocessor managemen ac line inpu 8565 rms ihium baery Boos converer Disk drive

sysem of an earh-orbiing spacecraf Dissipaive shun regulaor Solar array v bus Baery charge/discharge conrollers Dc-dc converer Dc-dc converer Baeries Payload Payload An elecric vehicle power and drive sysem ac machine ac machine Inverer Inverer conrol bus 3øac line 5/6 Hz Baery charger baery v b DC-DC converer µp sysem conroller ow-volage dc bus ehicle elecronics Inverer Inverer ariable-frequency ariable-volage ac ac machine ac machine 3.3 Elemens of power elecronics elecronics incorporaes conceps from he fields of analog circuis elecronic devices conrol sysems power sysems magneics elecric machines numerical simulaion 4

Par I. Converers in equilibrium Inducor waveforms Averaged equivalen circui v () DT s D'T s D on D' D D' D D' : swich posiion: g I i () I i () i (DT s ) DT s T s i Prediced efficiency % 9% 8% 7%... 6%.5 η 5% / =. Disconinuous conducion mode Transformer isolaion 4% 3% % % %...3.4.5.6.7.8.9 5 D Swich realizaion: semiconducor devices The IGBT collecor Swiching loss ransisor waveforms gae i A () Q r v A () i emier Gae Emier diode waveforms i i B () v B () n p n n p n area Q r n - minoriy carrier injecion r p Collecor p A () = v A i A area ~Q r area ~i r 6 Par I. Converers in equilibrium. Principles of seady sae converer analysis 3. Seady-sae equivalen circui modeling, losses, and efficiency 4. Swich realizaion 5. The disconinuous conducion mode 6. Converer circuis 7

dt s T s Par II. Converer dynamics and conrol Closed-loop converer sysem inpu Swiching converer oad Averaging he waveforms gae drive v g () v() feedback connecion ransisor gae driver δ() δ() compensaor pulse-widh v c G c (s) modulaor v c () volage reference v ref v acual waveform v() including ripple averaged waveform <v()> Ts wih ripple negleced Conroller Small-signal averaged equivalen circui v g() Id() g d() : D D' : Id() C v() 8 Par II. Converer dynamics and conrol 7. Ac modeling 8. Converer ransfer funcions 9. Conroller design. Inpu filer design. Ac and dc equivalen circui modeling of he disconinuous conducion mode. Curren-programmed conrol 9 Par III. Magneics ransformer design n : n i () i M () i () M i k () he proximiy effec layer 3 layer 3i i i i Φ Φ layer i d : n k k curren densiy J ransformer size vs. swiching frequency Po core size 46 36 66 3 8 8 3 66..8.6.4. B max (T) 5kHz 5kHz khz khz 5kHz 4kHz 5kHz khz Swiching frequency 3

v conrol Par III. Magneics 3. Basic magneics heory 4. Inducor design 5. Transformer design 3 Par I. Modern recifiers, and power sysem harmonics Polluion of power sysem by recifier curren harmonics A low-harmonic recifier sysem boos converer i g () i() i ac () D v ac () v g () Q C v() v conrol () v g () i g () muliplier X s PWM v a () v ref () v err () G c (s) = k x v g () v conrol () compensaor Harmonic ampliude, percen of fundamenal % % 9% THD = 36% 8% 73% Disorion facor = 59% 6% 5% 4% 3% % 9% 5% 5% 3% 9% % 3 5 7 9 3 5 7 9 Harmonic number Model of he ideal recifier v ac () i ac () ac inpu e (v conrol ) conroller Ideal recifier (F) p() = v ac / e i() v() dc oupu 3 Par I. Modern recifiers, and power sysem harmonics 6. and harmonics in nonsinusoidal sysems 7. ine-commuaed recifiers 8. Pulse-widh modulaed recifiers 33

F = f s / f 5 4 3 Par. esonan converers The series resonan converer Q D Q 3 D 3 C : n Q D Q 4 D 4 Zero volage swiching Q =. v ds ().9 Dc characerisics M = / Q =..8.35.7.5.35.6.75.5.5.4.75.5.3.5. 3.5 3.5 5. 5 Q = Q =..4.6.8..4.6.8 conducing devices: Q X D Q 4 D 3 urn off Q, Q 4 commuaion inerval 34 Par. esonan converers 9. esonan conversion. Sof swiching 35 Appendices A. MS values of commonly-observed converer waveforms B. Simulaion of converers C. Middlebrook s exra elemen heorem D. Magneics design ables 3 5 µh i OAD G vg db db db 4 db 6 db Open loop, d() = consan Closed loop f = 5 Ω = 3 Ω 8 db 5 Hz 5 Hz 5 Hz 5 khz 5 khz 8 8 M = 4 v x CCM-DCM X swich = 5 µη f s = kηz v z E pwm value = {IMIT(.5 v x,.,.9)} 7 v y 6 C 5 µf 3 C 3 kω M34.nodese v(3)=5 v(5)=5 v(6)=4.44 v(8)=.536 85 kω.7 nf v ref 5 4 5 kω 4 47 kω C. nf v 36