74LVT244B 3.3V Octal buffer/line driver (3-State)

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INTEGRATED CIRCUITS Propduct specification 1998 Nov IC23 Data Handbook

FEATURES Octal bus interface 3-State buffers Speed upgrade of 74LVTH244A Output capability: +64mA/-32mA TTL input and output switching levels Input and output interface capability to systems at 5V supply Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs Power-up 3-State Live insertion/extraction permitted No bus current loading when output is tied to 5V bus Latch-up protection exceeds 500mA per JEDEC Std 17 ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model DESCRIPTION The LVT244B is a high-performance BiCMOS product designed for V CC operation at 3.3V. This device is an octal buffer that is ideal for driving bus lines. The device features two Output Enables (OE1, OE2), each controlling four of the 3-State outputs. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS T amb = 25 C; GND = 0V TYPICAL UNIT t PLH t PHL Propagation delay nax to nyx C L = 50pF; V CC = 3.3V 1.9 2.0 ns C IN Input capacitance V I = 0V or 3.0V 4 pf C OUT Output capacitance Outputs disabled; V O = 0V or 3.0V 8 pf I CCZ Total supply current Outputs disabled; V CC = 3.6V 0.13 ma ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 20-Pin Plastic SOL 40 C to +85 C D D SOT163-1 20-Pin Plastic SSOP Type II 40 C to +85 C DB DB SOT339-1 20-Pin Plastic TSSOP Type I 40 C to +85 C PW 7LVT244BPW DH SOT360-1 1998 Nov 12 2 853-2133 20358

PIN CONFIGURATION FUNCTION TABLE INPUTS OUTPUTS noe1 nax nyx L L L 1OE 1A0 2Y3 1A1 2Y2 1A2 1 2 3 4 5 6 20 19 18 17 16 15 V CC 2OE 1Y0 2A3 1Y1 2A2 H L X Z L H H H X Z = High voltage level = Low voltage level = Don t care = High impedance off state 2Y1 7 14 1Y2 1A3 8 13 2A1 2Y0 9 12 1Y3 GND 10 11 2A0 SV00010 PIN DESCRIPTION PIN NUMBER SYMBOL NAME AND FUNCTION 2, 4, 6, 8 1A0 1A3 Data inputs 11. 13, 15, 17 2A0 2A3 Data inputs 18, 16, 14, 12 1Y0 1Y3 Data outputs 9, 7, 5, 3 2Y0 2Y3 Data outputs 1, 19 1OE, 2OE Output enables 10 GND Ground (0V) 20 V CC Positive supply voltage LOGIC SYMBOL 2 1A0 1Y0 18 4 1A1 1Y1 16 6 1A2 1Y2 14 8 1A3 1Y3 12 1 1OE 11 2A0 2Y0 9 13 2A1 2Y1 7 15 2A2 2Y2 5 17 2A3 2Y3 3 19 2OE SV00011 1998 Nov 12 3

LOGIC SYMBOL (IEEE/IEC) 1 EN 2 18 4 16 6 14 8 12 19 EN 11 9 13 7 15 5 17 3 SV00012 ABSOLUTE MAXIMUM RATINGS 1, 2 SYMBOL PARAMETER CONDITIONS RATING UNIT V CC DC supply voltage 0.5 to +4.6 V V I DC input voltage 3 0.5 to +7.0 V V OUT DC output voltage 3 Output in Off or High state 0.5 to +7.0 V I OUT DC output current Output in Low state 128 Output in High state 64 ma I IK DC input diode current V I < 0 50 ma I OK DC output diode current V O < 0 50 ma T stg Storage temperature range 65 to 150 C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMITS MIN MAX UNIT V CC DC supply voltage 2.7 3.6 V V I Input voltage 0 5.5 V V IH High-level input voltage 2.0 V V IL Low-level input voltage 0.8 V I OH High-level output current 32 ma Low-level output current 32 I OL Low-level output current; current duty cycle 50%, f 1kHz 64 ma t/ v Input transition rise or fall rate; outputs enabled 10 ns/v T amb Operating free-air temperature range 40 +85 C 1998 Nov 12 4

DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40 C to +85 C UNIT MIN TYP 1 MAX V IK Input clamp voltage V CC = 2.7V; I IK = 18mA 0.9 1.2 V V CC = 2.7 to 3.6V; I OH = 100µA V CC -0.2 V CC -0.1 V OH High-level output voltage V CC = 2.7V; I OH = 8mA 2.4 2.5 V V CC = 3.0V; I OH = 32mA 2.0 2.2 V CC = 2.7V; I OL = 100µA 0.1 0.2 V CC = 2.7V; I OL = 24mA 0.3 0.5 V OL Low-level output voltage V CC = 3.0V; I OL = 16mA 0.25 0.4 V I I Input leakage current V CC = 3.0V; I OL = 32mA 0.3 0.5 V CC = 3.0V; I OL = 64mA 0.4 0.55 V CC = 0 or 3.6V; V I = 5.5V 0.1 10 V CC = 3.6V; V I = V CC or GND Control pins ±0.1 ±1 V CC = 3.6V; V I = V CC 0.1 1 Data Pins 4 V CC = 3.6V; V I = 0 1-5 I OFF Output off current V CC = 0V; V I or V O = 0 to 4.5V 1 ±100 µa I HOLD Bus Hold current A inputs 6 V CC = 3V; V I = 2.0V 75 140 µa I EX I PU/PD V CC = 3V; V I = 0.8V 75 130 V CC = 0V to 3.6V; V CC = 3.6V ±500 Current into an output in the High state when V O > V CC V O = 5.5V; V CC = 3.0V 60 125 µa Power up/down 3-State V CC 1.2V; V O = 0.5V to V CC ; V I = GND or V CC ; output current 3 OE/OE = Don t care µa ±1 ±100 µa I OZH 3-State output high current V CC = 3.6V; V O = 3V; V I = V IL or V IH 1 5 µa I OZL 3-State output low current V CC = 3.6V; V O = 0.5V; V I = V IL or V IH 1 5 µa I CCH V CC = 3.6V; Outputs High, V I = GND or V CC, I O = 0 0.13 0.19 I CCL Quiescent supply current V CC = 3.6V; Outputs Low, V I = GND or V CC, I O = 0 2 5 ma I CCZ V CC = 3.6V; Outputs Disabled; V I = GND or V CC, I O = 0 5 0.13 0.19 I CC Additional supply current per input pin 2 V CC = 3V to 3.6V; One input at V CC -0.6V, Other inputs at V CC or GND 0.1 0.2 ma NOTES: 1. All typical values are at T amb = 25 C. 2. This is the increase in supply current for each input at the specified voltage level other than V CC or GND 3. This parameter is valid for any V CC between 0V and 1.2V with a transition time of up to 10msec. From V CC = 1.2V to V CC = 3.3V ± 0.3V a transition time of 100µsec is permitted. This parameter is valid for T amb = 25 C only. 4. Unused pins at V CC or GND. 5. I CCZ is measured with outputs pulled to V CC or GND. 6. This is the bus hold overdrive current required to force the input to the opposite logic state. AC CHARACTERISTICS GND = 0V; t R = t F = 2.5ns; C L = 50pF; R L = 500Ω; T amb = 40 C to +85 C. LIMITS SYMBOL PARAMETER WAVEFORM V CC = 3.3V ±0.3V V CC = 2.7V UNIT MIN TYP 1 MAX MAX t PLH t PHL Propagation delay nax to nyx 1 1.1 1.3 1.9 2.0 3.5 3.3 3.8 3.6 ns t PZH t PZL Output enable time to High and Low level 2 1.1 1.4 2.8 2.3 4.5 4.4 5.3 4.9 ns t PHZ t PLZ Output disable time from High and Low level 2 1.9 1.8 2.9 2.5 4.4 4.4 4.5 4.4 ns 1998 Nov 12 5

NOTE: 1. All typical values are at V CC = 3.3V and T amb = 25 C. AC WAVEFORMS = 1.5V, V IN = GND to 2.7V 2.7V nax INPUT 3.0V or V CC whichever is less 0V OE INPUT 1.5V t PZL 1.5V t PLZ 0V 3.0V t PLH t PHL V OH Yn OUTPUT 1.5V V OL + 0.3V nyx OUTPUT t PZH t PHZ V OL V OL Yn OUTPUT 1.5V V OH V OH 0.3V SA00016 Waveform 1. Input (nax) to Output (nyx) Propagation Delays Waveform 2. 3-State Output Enable and Disable Times 0V SV00103 TEST CIRCUIT AND WAVEFORMS V CC 6.0V Open t W 90% 90% AMP (V) PULSE GENERATOR V IN R T D.U.T. V OUT C L R L R L GND NEGATIVE PULSE 10% 10% t THL (t F ) 0V t TLH (t R ) t TLH (t R ) t THL (t F ) Test Circuit for 3-State Outputs POSITIVE PULSE 90% 90% AMP (V) SWITCH POSITION TEST SWITCH Open t PLH /t PHL 10% t 10% W = 1.5V Input Pulse Definition 0V t PLZ /t PZL 6V t PHZ /t PZH GND DEFINITIONS R L = Load resistor; see AC CHARACTERISTICS for value. C L = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. R T = Termination resistance should be equal to Z OUT of pulse generators. FAMILY 74LVT INPUT PULSE REQUIREMENTS Amplitude Rep. Rate t W t R t F 2.7V 10MHz 500ns 2.5ns 2.5ns SV00092 1998 Nov 12 6

SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 1998 Nov 7

SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1 1998 Nov 8

TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 1998 Nov 9

Data sheet status Data sheet status Product status Definition [1] Objective specification Preliminary specification Product specification Development Qualification Production This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088 3409 Telephone 800-234-7381 Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Date of release: 05-96 Document order number: 9397-750-04814 yyyy mmm dd 10