Features. Table 1: Device summary Order code Marking Package Packing STL160N4F7 160N4F7 PowerFLAT TM 5x6 Tape and reel

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Transcription:

N-channel 40 V, 2.1 mω typ., 120 A STripFET F7 Power MOSFET in a PowerFLAT 5x6 package Datasheet - production data Features Order code V DS R DS(on) max I D STL160N4F7 40 V 2.5 mω 120 A Among the lowest R DS(on) on the market Excellent FoM (figure of merit) Low C rss /C iss ratio for EMI immunity High avalanche ruggedness Applications Switching applications Figure 1: Internal schematic diagram Description This N-channel Power MOSFET utilizes STripFET F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. Table 1: Device summary Order code Marking Package Packing STL160N4F7 160N4F7 PowerFLAT TM 5x6 Tape and reel February 2016 DocID027805 Rev 2 1/14 This is information on a product in full production. www.st.com

Contents STL160N4F7 Contents 1 Electrical ratings... 3 2 Electrical characteristics... 4 3 Electrical curves... 6 4 Test circuits... 8 5 Package information... 9 5.1 PowerFLAT 5x6 type C package information... 9 5.2 PowerFLAT 5x6 packing information... 11 6 Revision history... 13 2/14 DocID027805 Rev 2

Electrical ratings 1 Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit V DS Drain-source voltage 40 V V GS Gate-source voltage ± 20 V (1)(2) I D (2) I D (2)(3) I DM (2) P TOT (4) I D (4) I D (3)(4) I DM (4) P TOT Drain current (continuous) at T C = 25 C 120 A Drain current (continuous) at T C = 100 C 108 A Drain current (pulsed) 480 A Total dissipation at T C = 25 C 111 W Drain current (continuous) at T pcb = 25 C 32 A Drain current (continuous) at T pcb = 100 C 22 A Drain current (pulsed) 128 A Total dissipation at T pcb = 25 C 4.8 W I AV Avalanche current 16 A E AS Single pulse avalanche energy (T j = 25 C, I D = 16A, V DD = 25V) 260 mj T stg T j Storage temperature range Operating junction temperature range -55 to 175 C Notes: (1) Drain current is limited by package (2) This value is rated according to Rthj-c (3) Pulse width limited by safe operating area (4) This value is rated according to Rthj-pcb Table 3: Thermal data Symbol Parameter Value Unit R thj-pcb (1) Thermal resistance junction-pcb max. 31.3 C/W R thj-case Thermal resistance junction-case max. 1.35 C/W Notes: (1) When mounted on FR-4 board of 1 inch², 2oz Cu, t < 10 sec DocID027805 Rev 2 3/14

Electrical characteristics STL160N4F7 2 Electrical characteristics (T C = 25 C unless otherwise specified) Table 4: On /off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS Drain-source breakdown voltage V GS = 0 V, I D = 250 μa 40 V V I DSS I GSS Zero gate voltage drain current Gate-body leakage current V GS = 0 V V DS = 40 V 1 µa V GS = 20 V, V DS = 0 V 100 na V GS(th) Gate threshold voltage V DS = V GS, I D = 250 μa 2 4 V R DS(on) Static drain-source on-resistance V GS = 10 V, I D = 16 A 2.1 2.5 mω Table 5: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance - 2300 - pf C oss Output capacitance V DS = 25 V, f = 1 MHz, - 786 - pf Reverse transfer V GS = 0 V C rss - 43 - pf capacitance Q g Total gate charge V DD = 20 V, I D = 32 A, - 29 - nc Q gs Gate-source charge V GS = 10 V - 13 - nc Q gd Gate-drain charge (see Figure 14: "Test circuit for gate charge behavior") - 5.6 - nc Table 6: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit Turn-on delay time V DD = 20 V, I D = 16 A, - 14 - ns t r Rise time R G = 4.7 Ω, V GS = 10 V - 6.6 - ns (see Figure 13: "Test circuit for resistive Turn-off load switching times"and Figure 18: delay time "Switching time waveform") - 19 - ns t f Fall time - 5.7 - ns t d(on) t d(off) 4/14 DocID027805 Rev 2

Electrical characteristics Table 7: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit (1) V SD t rr Q rr I RRM Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current I SD = 32 A, V GS = 0 V - 1.2 V I D = 32 A, di/dt = 100 A/µs V DD = 32 V (see Figure 15: "Test circuit for inductive load switching and diode recovery times") - 55 ns - 67 nc - 2.4 A Notes: (1) Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID027805 Rev 2 5/14

Electrical curves STL160N4F7 3 Electrical curves Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance 6/14 DocID027805 Rev 2

Figure 8: Capacitance variations Electrical curves Figure 9: Normalized gate threshold voltage vs temperature Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature Figure 12: Source-drain diode forward characteristics DocID027805 Rev 2 7/14

Test circuits STL160N4F7 4 Test circuits Figure 13: Test circuit for resistive load switching times Figure 14: Test circuit for gate charge behavior Figure 15: Test circuit for inductive load switching and diode recovery times Figure 16: Unclamped inductive load test circuit Figure 17: Unclamped inductive waveform Figure 18: Switching time waveform 8/14 DocID027805 Rev 2

Package information 5 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 5.1 PowerFLAT 5x6 type C package information Figure 19: PowerFLAT 5x6 type C package outline Bottom view Side view Top view 8231817_typeC_A0ER_Rev13 DocID027805 Rev 2 9/14

Package information STL160N4F7 Table 8: PowerFLAT 5x6 type C package mechanical data mm Dim. Min. Typ. Max. A 0.80 1.00 A1 0.02 0.05 A2 0.25 b 0.30 0.50 C 5.80 6.00 6.20 D 5.00 5.20 5.40 D2 4.15 4.45 D3 4.05 4.20 4.35 D4 4.80 5.00 5.20 D5 0.25 0.40 0.55 D6 0.15 0.30 0.45 e 1.27 E 5.95 6.15 6.35 E2 3.50 3.70 E3 2.35 2.55 E4 0.40 0.60 E5 0.08 0.28 E6 0.20 0.325 0.450 E7 0.75 0.90 1.05 K 1.05 1.35 L 0.715 1.015 L1 0.05 0.15 0.25 θ 0 12 10/14 DocID027805 Rev 2

Package information Figure 20: PowerFLAT 5x6 recommended footprint (dimensions are in mm) 8231817_FOOTPRINT_simp_Rev_13 5.2 PowerFLAT 5x6 packing information Figure 21: PowerFLAT 5x6 tape (dimensions are in mm) DocID027805 Rev 2 11/14

Package information Figure 22: PowerFLAT 5x6 package orientation in carrier tape STL160N4F7 Figure 23: PowerFLAT 5x6 reel 12/14 DocID027805 Rev 2

Revision history 6 Revision history Table 9: Document revision history Date Revision Changes 14-May-2015 1 First release. 23-Feb-2016 2 Updated title. Updated Table 2: "Absolute maximum ratings",table 4: "On /off states", Table 5: "Dynamic",Table 6: "Switching times" and Table 7: "Sourcedrain diode" Minor text changes. DocID027805 Rev 2 13/14

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