Intemational II(~R I Rectifier

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Transcription:

ntemational (R Rectifier HEXFEr Power MOSFET Dynamic dvdt Rating Repetitive Avalanche Rated Fast Switching Ease of Paralleling Simple Drive Requirements PD 9.56B RFBC4 V OSS = 6V ROS(on) = 1.2.Q 1 = 6.2A Description Third Generation HEXFETs from nternational Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low on resistance and cost effectiveness. The TO 22 package is universally preferred for all commerciahndustrial applications at power dissipation levels to approximately 5 watts. The low thermal resistance and low package cost of the TO 22 contribute 1 its wide acceptance throughout the industry. Absolute Maximum Ratings Parameter lo@ Tc= 25'C Continuous Drain Current, VGS @ 1 V lo@ Tc = 1 C Continuous Drain Current, vgs @ 1 V 1M Pulsed Drain Current <D PD@ Tc = 25 C Power Dissipation Linear Derating Factor TO 22AB Max. Units 6.2 3.9 A 25 125 W 1. W;oC VGS Gate to Source Voltage ±2 V EAS Single Pulse Avalanche Energy 57 mj AR Avalanche Current <D 6.2 A EAR Repetitive Avalanche Energy <D 13 mj dvldt Peak Diode Recovery dvldt 3. Vlns TJ Operating Junction and -55 to +15 TSTG Storage Temperature Range C Soldering Temperature, tor 1 seconds 3 (1.6mm tram case) Mounting Torque, 6-32 or M3 screw 1 bl.in (1.1 N.m) Thermal Resistance Parameter Min. Typ. Max. Units ReJC Junction-to-Case - - 1. Recs Case-to-Sink, Flat, Greased Surface -.5 - CW RaJA Junction-to-Ambient - - 62 443

RFBC4 Electrical Characteristics @ T J = 25 C (unless otherwise specified) V(BR)OSS Parameter Drain-ta-Sauree Breakdown Voltage i".v(br)ossli".tj Breakdown Voltage Temp. Coeffieient ROS(on) VGS(th) gis loss less Og Ogs Ogd td(on) tr td(off) tl Lo Ls Ciss Coss Crss Statie Drain-ta-Sou ree On-Resistanee Gate Threshold Voltage Forward Transeonduetanee Drain-to-Souree Leakage Current Gate-to-Souree Farward Leakage Gate-ta-Souree Reverse Leakage Total Gate Charge Gate-ta-Souree Charge Gate-ta-Drain ("Miller") Charge Turn-On Delay Time RiseTime Turn-Off Delay Time Fall Time nternal Drain nduetanee nternal Souree nduetanee nput Capaeitanee Output Capaeitanee Reverse Transfer Capaeitanee Min. Typ. Max. Units Test Canditians 6 - - V VGs=OV, 1= 25j.tA -.7 - voc Referenee to 25 C, 1; 1mA - - 1.2 n VGs=1V,lo=3.7A @ 2. - 4. V Vos=VGS, 1; 25j.tA 4.7 - - S Vos;1V,lo;3.7A @ - - 1 Vos;6V, VGS;OV j.ta - - 5 Vos=48V, VGS;OV, TJ;125 C - - 1 VGs;2V na - - -1 Ves=-2V - - 6 1;6.2A - 8.3 nc Vos;36V - - 3 VGs=1V See Fig. 6 and 13@ - 13 - Voo;3V - 18-1;6.2A ns - 55 - RG;9.1n - 2 - Ro;47n See Figure 1@ Between lead, - 4.5-6 mm (.25in.) nh from paekage 4-7.5 - and center of die eontaet s - 13 - Ves;OV - 16 - pf Vos=25V - 3 - j;1.mhz See Figure 5 Source-Drain Ratings and Characteristics s SM VSD trr ton Parameter Continuous Souree Current (Body Diode) Pulsed Souree Current (Body Diode) (j) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units Test Conditions 6.2 MOSFET symbal O showing the A integral reverse G 25 p-n junetlon diode. s 45 94 ns TJ;25 C, F;6.2A 3.8 7.9 j.tc didt;1aj.ts @ ntrinsic turn-on time is neglegible (turn-on is dominated by Ls+Lo) Notes: (j) Repetitive rating; pulse width limited by max. junetion temperature (See Figure 11) @ VDo;5V, starting TJ;25 C, L;27mH Re;25n, AS;6.2A (See Figure 12) so:o;6.2a, didt:o;8alj.ts, VOO:o;V(BR)OSS, TJ:O;15 C @ Pulse width,; 3 j.ts; duty eycle :;2%. 444

RFBC4,oe m 1-8.1 7.1' 6.1' 5.51'!LOV 1-4 ' 1 m ". 8.1' 1." 5.ev 5.11 ElOTTOM 4.51 ' V 45 V F 2us PULSE WDTH TC 25 C Vos, Drain-to-Source Voltage (volts) Fig 1. Typical Output Characteristics, TC=25 C 1(' 4.5V 2us PULSE WDTH TC 15 C Vos, Drain-to-Source Voltage (volts) Fig 2. Typical Output Characteristics, TC=15 C 1 2 E 1 4 V 1 15 C f!25 C. 1 6.2A YOS 1Y 2us PULSE WDTH 1 VGS, Gate-to-Source Voltage (volts) Fig 3. Typical Transfer Characteristics z o (jj o er.5...-- V. VGS = lov. -6-4 -2 TJ, Junction Temperature (OC) Fig 4. Normalized On-Resistance Vs. Temperature 445

RFBC4 3 o C1SS 25 Ci:' 2" S, <=.-lll 1;l!a- Ü 15 1 5 '. i'. """ VGS - OV. f - lmhz = C gs + C gd. Cds SHORTED Crss C gd Coss "" Cds + C gd... ' J Ciss... ""- t-- ""- " Cass ' 11 (... CT...,"- - 1 1 VDS, Drain-to-Source Voltage (volts) 16 W > 12 e ::J (!) * 2 1 6. 2A cn (9 > OS 3OV V OS 24V_ "" Y OS 12V_..&; v (', FOR TEST CRCUT SEE FGURE 13 1 2 3 4 5 QG, Total Gate Charge (nc) 6 Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage - ;:?' 1 ' f- 15O j 5C VGS OV.4.6.8 1. 1.2 VSD, Source-to-Drain Voltage (volts) _ 1 2 E E 1 ::J Ü <=. o Ö - 1 '= 2,- OPERATON N THS AREA LMTEO BY ROS (ON T c-25 C TJ'15 C SNGLE PULSE 1-2.12 5 1 2 5:1 2 5 122 5 132 5 14 11111 itti s 1U5 1 1m5 VDS, Drain-to-Source Voltage (volts) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 446

RFBC4 RD VDS )--,---A.'V-<-..., 7. D.U.T. a 6. E 5....... $ -c: 4. '-.. "- "'- Ü " 3. c:. o 2..9 ' Fig 1a. Switching Time Test Circuit VOS 9%---f---------'----.'- 1.. 25 5 75 1 125 Tc. Case Temperature (C) 15 1 O%--t---t--.-----r-i--1;- VGS r d(ofl) Fig 9. Maximum Drain Current Vs. Fig 1b. Switching Time Waveforms Case Temperature 1 t:::!. <J) c: 8..1..c: t- Fig 11. -.5.2.1.5 o.o;;;; o.o: 1. 2 1 5...-::: - SNGLE PULSE TT rt) NOTES: 1. DUTY FACTOR, D-tlt2 1 3.1 2. PEAK Tj"'POM x Zth]C + Tc t1. Rectangular Pulse Duration (seconds) pojls C2_1 Maximum Effective Transient Thermallmpedance, Junction-to-Case 1 447

RFBC4 Vary tp to obtain required las L VOS >---.----'.1 + VOO Fig 12a. Unclamped nductive Test Circuit VOS tp----+t r- V(BR)OSS voo! -- '------ Fig 12b. Unclamped nductive Waveforms :::;-.s 14 12 >. 1 e> C> c: UJ 8 C> Cl "S [L 6 <1> g> 4 i:i5 j 2 1 TOP 2.8A 3.9A BOTTOM 6.2A 1 o 1 ' ' '. ' r--... ' "'- '... " Yoo - 5V "- "-...... - -...; ::::::::;; (1..., 25 5 75 1 125 15 Starting TJ, Junction Temperature( C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current i.!3':i!r r---., Same Type as O.U.T. 112V + yos Charge Fig 13a. Basic Gate Charge Waveform G 1 Currenl SampHng Resistors Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dvdt Test Circuit - See page 155 Appendix B: Package Outline Mechanical Drawing - See page 159 Appendix C: Part Marking nformation - See page 1516 Appendix E: Optional Leadforms - See page 1525 ntemational!xc)r! Rectifier 448