FEATURES Requires very few external components High output power Fixed gain Good ripple rejection Mute/standby switch Load dump protection GENERAL DESCRIPTION The is an integrated class-b dual output amplifier in a plastic single in-line medium power package with fin; 9 leads (SIL9MPF) and a plastic heat-dissipating dual in-line package (HDIP18). The device is primarily developed for car radio and multi-media applications. AC and DC short-circuit safe to and Thermally protected Reverse polarity safe Capability to handle high energy on outputs ( = 0 V) No switch-on/switch-off plop Electrostatic discharge protection Compatible with TDA1519 (except gain). QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT supply operating.0 14.4 18.0 V non-operating 0.0 V load dump protected 45.0 V I ORM repetitive peak output current.5 A I q(tot) total quiescent current 40 80 ma I sb standby current 0.1 100 µa I sw switch-on current 40 µa Z I input impedance 50 P o output power R L = 4 Ω; THD = 0.5% 5 W R L = 4 Ω; THD = 10% W SVRR supply ripple rejection f i = 100 Hz to 100 khz 48 db α cs channel separation 40 db G v closed loop gain 19 0 1 db V no(rms) noise output (RMS value) 50 µv T c crystal temperature 150 C ORDERING INFORMATION PACKAGE TYPE NUMBER NAME DESCRIPTION VERSION SIL9MPF plastic single in-line medium power package with fin; 9 leads SOT110-1 P HDIP18 plastic heat-dissipating dual in-line; 18 leads SOT98-1 December 1994
BLOCK DIAGRAM handbook, full pagewidth non-inverting input 1 1 0 mute switch C m VA 4 output 1 18 power stage stand-by switch VA stand-by 8 mute/stand-by switch input 15 supply ripple rejection output x 1 15 mute mute switch 18 non-inverting input 9 0 input VA signal mute switch C m 7 5 power stage power (substrate) output MLC51 SGND PGND Fig.1 Block diagram. December 1994
PINNING SYMBOL PIN DESCRIPTION INV1 1 non-inverting input 1 SGND signal SVRR supply ripple rejection output OUT1 4 output 1 PGND 5 power OUT output 7 supply M/SS 8 mute/standby switch input INV 9 non-inverting input ndbook, halfpage INV1 1 ndbook, halfpage INV1 1 18 SGND SGND 17 SVRR SVRR 1 OUT1 4 OUT1 4 15 PGND 5 PGND 5 P 14 OUT OUT 1 7 7 1 M/SS 8 M/SS 8 11 INV 9 INV 9 10 MLC5 MLC5 Pins 10 to 18 connected to GND or floating. Fig. Pin configuration for SOT110-1. Fig. Pin configuration for SOT98-1. FUNCTIONAL DESCRIPTION The contains two identical amplifiers with differential input stages. The gain of each amplifier is fixed at 0 db. A special feature of the device is the mute/standby switch which has the following features: Low standby current (<100 µa) Low mute/standby switching current (low cost supply switch) Mute condition. December 1994 4
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 14). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT supply operating 18 V non-operating 0 V load dump protection during 50 ms; t r.5 ms 45 V (sc) AC and DC short-circuit safe 18 V (r) reverse polarity V ERG O energy handling capability at outputs = 0 V 00 mj I OSM non-repetitive peak output current 4 A I ORM repetitive peak output current.5 A P tot total power dissipation see Fig.4 15 W T stg storage temperature 55 +150 C T amb operating ambient temperature 5 C T c crystal temperature 150 C THERMAL RESISTANCE SYMBOL TYPE NUMBER PARAMETER VALUE UNIT R th j-c thermal resistance from junction to case 8 K/W R th j-p P thermal resistance from junction to pins 15 K/W R th j-a ; P thermal resistance from junction to ambient 50 K/W 18 handbook, halfpage MLC54 P (W) 1 (1) () 0 5 0 50 100 150 o T amb ( C) (1) R th j-c = 8 K/W. () R th j-p = 15 K/W. Fig.4 Power derating curve. December 1994 5
DC CHARACTERISTICS = 14.4 V; T amb = 5 C; measured in Fig.; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply supply note 1.0 14.4 18.0 V I q(tot) total quiescent current 40 80 ma V O DC output note.95 V Mute/standby switch V 8 switch-on level see Fig.5 8.5 V Mute condition V O output signal in mute position V I(max) = 1 V; f i = 0 Hz to 15 khz mv Standby condition I sb DC current in standby condition 100 µa V sw switch-on current 1 40 µa Notes 1. The circuit is DC adjusted at = to 18 V and AC operating at = 8.5 to 18 V.. At 18 V < < 0 V the DC output 1. December 1994
AC CHARACTERISTICS = 14.4 V; R L = 4 Ω; f = 1 khz; T amb = 5 C; measured in Fig.; unless otherwise specified. Notes SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT P o output power THD = 0.5%; note 1 4 5 W 1. Output power is measured directly at the output pins of the IC.. Frequency response externally fixed.. Ripple rejection measured at the output with a source impedance of 0 Ω, maximum ripple amplitude of V (p-p) and a frequency between 100 Hz and 10 khz. 4. Noise measured in a bandwidth of 0 Hz to 0 khz. 5. Noise output independent of R s (V I = 0 V). THD = 10%; note 1 5.5.0 W THD total harmonic distortion P o = 1 W 0.1 % f lr low frequency roll-off at db; note 45 Hz f hr high frequency roll-off at 1 db 0 khz G v closed loop gain 19 0 1 db SVRR supply ripple rejection note on 48 db mute 48 db standby 80 db Z i input impedance 50 0 75 V no noise output on R s = 0 Ω; note 4 50 µv on R s = 10 Ω; note 4 70 100 µv mute note 5 50 µv α cs channel separation R s = 10 Ω 40 db G v channel unbalance 0.1 1 db December 1994 7
handbook, halfpage 18 MLC55 V11 (V) ON (I = 40 ma) P 8.5.4. 0 mute (I = 40 ma) P standby (I P 100 µa) Fig.5 Standby, mute and ON conditions. APPLICATION INFORMATION handbook, full pagewidth 100 µf standby switch 8 7 100 nf V P 00 µf input internal 1/ input 1 0 nf 0 0 db 0 db 0 1 9 0 nf input signal 5 power 4 1000 µf 1000 µf MLC5 Fig. Application circuit diagram. December 1994 8