PD-973B RADIATION HARDENED LOGIC LEVEL POWER MOSFET SURFACE MOUNT (SMD-.5) Product Summary Part Number Radiation Level RDS(on) ID IRHLNJ7734 K Rads (Si).35Ω 22A* IRHLNJ7334 3K Rads (Si).35Ω 22A* 2N766U3 IRHLNJ7734 6V, N-CHANNEL TECHNOLOGY International Rectifier s R7 TM Logic Level Power MOSFETs provide simple solution to interfacing CMOS and TTL control circuits to power devices in space and other radiation environments.the threshold voltage remains within acceptable operating limits over the full operating temperature and post radiation.this is achieved while maintaining single event gate rupture and single event burnout immunity. The device is ideal when used to interface directly with most logic gates, linear IC s, micro-controllers, and other device types that operate from a 3.3-5V source. It may also be used to increase the output current of a PWM, voltage comparator or an operational amplifier where the logic level drive signal is available. SMD-.5 Features: n 5V CMOS and TTL Compatible n Fast Switching n Single Event Effect (SEE) Hardened n Low Total Gate Charge n Simple Drive Requirements n Ease of Paralleling n Hermetically Sealed n Ceramic Package n Surface Mount n Light Weight Absolute Maximum Ratings Parameter ID @VGS = 4.5V,TC = 25 C Continuous Drain Current 22* ID @VGS = 4.5V,TC = C Continuous Drain Current 2 IDM Pulsed Drain Current À 88 Units PD @ TC = 25 C Max. Power Dissipation 57 W Linear Derating Factor.45 W/ C VGS Gate-to-Source Voltage ± V EAS Single Pulse Avalanche Energy Á 63 mj IAR Avalanche Current À 22 A EAR Repetitive Avalanche Energy À 5.7 mj dv/dt Peak Diode Recovery dv/dt  8.8 V/ns TJ Operating Junction -55 to 5 TSTG Storage Temperature Range Pckg. Mounting Surface Temp. 3 (for 5s) C Weight. (Typical) g * Current is limited by package For footnotes refer to the last page www.irf.com A 2/2/
IRHLNJ7734, 2N766U3 Electrical Characteristics @ Tj = 25 C (Unless Otherwise Specified) Parameter Min Typ Max Units Test Conditions BVDSS Drain-to-Source Breakdown Voltage 6 V VGS = V, ID = 25µA BVDSS/ TJ Temperature Coefficient of Breakdown.68 V/ C Reference to 25 C, ID =.ma Voltage RDS(on) Static Drain-to-Source On-State.35 Ω VGS = 4.5V, ID = 2A Ã Resistance VGS(th) Gate Threshold Voltage. 2. V VDS = VGS, ID = 25µA VGS(th)/ TJ Gate Threshold Voltage Coefficient -4.9 mv/ C gfs Forward Transconductance 5 S VDS = V, IDS = 2A Ã IDSS Zero Gate Voltage Drain Current. VDS= 48V,VGS=V µa VDS = 48V, VGS = V, TJ = 25 C IGSS Gate-to-Source Leakage Forward na VGS = V IGSS Gate-to-Source Leakage Reverse - VGS = -V Qg Total Gate Charge 34 VGS = 4.5V, ID = 22A Qgs Gate-to-Source Charge 8. nc VDS = 3V Qgd Gate-to-Drain ( Miller ) Charge 6 td(on) Turn-On Delay Time 26 VDD = 3V, ID = 22A, tr Rise Time VGS = 5.V, RG = 7.5Ω ns td(off) Turn-Off Delay Time 54 tf Fall Time 3 LS + LD Total Inductance 4. nh Measured from the center of drain pad to center of source pad Ciss Input Capacitance 25 VGS = V, VDS = 25V Coss Output Capacitance 488 pf f =.MHz Crss Reverse Transfer Capacitance 4.5 Rg Gate Resistance.45 Ω f =.MHz, open drain Source-Drain Diode Ratings and Characteristics Parameter Min Typ Max Units Test Conditions IS Continuous Source Current (Body Diode) 22* ISM Pulse Source Current (Body Diode) À 88 A VSD Diode Forward Voltage.2 V Tj = 25 C, IS = 22A, VGS = V Ã trr Reverse Recovery Time 6 ns Tj = 25 C, IF = 22A, di/dt A/µs QRR Reverse Recovery Charge 74 nc VDD 25V Ã ton Forward Turn-On Time Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD. * Current is limited by package Thermal Resistance Parameter Min Typ Max Units Test Conditions RthJC Junction-to-Case 2.2 C/W Note: Corresponding Spice and Saber models are available on International Rectifier Web site. For footnotes refer to the last page 2 www.irf.com
Radiation Characteristics IRHLNJ7734, 2N766U3 International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability. The hardness assurance program at International Rectifier is comprised of two radiation environments. Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both pre- and post-irradiation performance are tested and specified using the same drive circuitry and test conditions in order to provide a direct comparison. Table. Electrical Characteristics @ Tj = 25 C, Post Total Dose Irradiation ÄÅ Parameter Upto 3K Rads (Si) Units Test Conditions Min Max BV DSS Drain-to-Source Breakdown Voltage 6 V V GS = V, I D = 25µA VGS(th) Gate Threshold Voltage. 2. VGS = V DS, I D = 25µA I GSS Gate-to-Source Leakage Forward na V GS = V I GSS Gate-to-Source Leakage Reverse - V GS = -V I DSS Zero Gate Voltage Drain Current. µa V DS = 48V, V GS =V R DS(on) Static Drain-to-Source On-State Resistance (TO-3).45 Ω VGS = 4.5V, I D = 2A R DS(on) Static Drain-to-Source On-state Resistance (SMD-.5).35 Ω VGS = 4.5V, I D = 2A V SD Diode Forward Voltage.2 V VGS = V, I D = 22A. Part numbers IRHLNJ7734, IRHLNJ7334 International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2. Table 2. Typical Single Event Effect Safe Operating Area LET Energy Range VDS (V) (MeV/(mg/cm 2 )) (MeV) (µm) @VGS= @VGS= @VGS= @VGS= @VGS= @VGS= V -2V -4V -5V -6V -7V 38 ± 5% 3 ± 7.5% 38 ± 7.5% 6 6 6 6 6-62 ± 5% 355 ± 7.5% 33 ± 7.5% 6 6 6 6 - - 85 ± 5% 38 ± 7.5% 29 ± 7.5% 6 6 6 - - - Bias VDS (V) -7-6 -5-4 -3-2 - 2 3 4 5 6 7 Bias VGS (V) LET=38 ± 5% LET=62 ± 5% LET=85 ± 5% For footnotes refer to the last page Fig a. Typical Single Event Effect, Safe Operating Area www.irf.com 3
I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) I D, Drain-to-Source Current (A) IRHLNJ7734, 2N766U3 VGS TOP V 5.V 4.5V 4.V 3.5V 3.V 2.5V BOTTOM 2.3V VGS TOP V 5.V 4.5V 4.V 3.5V 3.V 2.5V BOTTOM 2.3V 2.3V 2.3V 6µs PULSE WIDTH, Tj = 25 C. V DS, Drain-to-Source Voltage (V) 6µs PULSE WIDTH Tj = 5 C. V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics T J = 5 C 2. I D = 22A.5 T J = 25 C..5. V DS = 25V 6µs PULSE 5 WIDTH 2 2.5 3 3.5 4 4.5 5 V GS, Gate-to-Source Voltage (V) V GS = 4.5V. -6-4 -2 2 4 6 8 2 4 6 T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature 4 www.irf.com
V (BR)DSS, Drain-to-Source Breakdown Voltage (V) V GS(th) Gate threshold Voltage (V) R DS(on), Drain-to -Source On Resistance (mω) IRHLNJ7734, 2N766U3 R DS (on), Drain-to -Source On Resistance ( mω) 9 I D = 22A 9 8 7 6 5 4 3 T J = 5 C 8 7 6 5 4 T J = 5 C T J = 25 C 2 3 T J = 25 C 2 4 6 8 2 2 Vgs = 4.5V 2 3 4 5 6 7 8 V GS, Gate -to -Source Voltage (V) I D, Drain Current (A) Fig 5. Typical On-Resistance Vs Gate Voltage Fig 6. Typical On-Resistance Vs Drain Current 9 2.5 I D =.ma 2. 8.5 7..5 I D = 5µA I D = 25µA I D =.ma I D = 5mA 6-6 -4-2 2 4 6 8 2 4 6 T J, Temperature ( C ). -6-4 -2 2 4 6 8 2 4 6 T J, Temperature ( C ) Fig 7. Typical Drain-to-Source Breakdown Voltage Vs Temperature Fig 8. Typical Threshold Voltage Vs Temperature www.irf.com 5
C, Capacitance (pf) I SD, Reverse Drain Current (A) I D, Drain Current (A) V GS, Gate-to-Source Voltage (V) IRHLNJ7734, 2N766U3 4 36 32 V GS = V, f = MHz C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd 2 I D = 22A V DS = 48V V DS = 3V V DS = 2V 28 24 2 6 2 C iss C oss 8 6 4 8 4 C rss 2 FOR TEST CIRCUIT SEE FIGURE 7 5 5 2 25 3 35 4 45 5 55 6 V DS, Drain-to-Source Voltage (V) Q G, Total Gate Charge (nc) Fig 9. Typical Capacitance Vs. Drain-to-Source Voltage Fig. Typical Gate Charge Vs. Gate-to-Source Voltage T J = 5 C 35 3 LIMITED BY PACKAGE 25 T J = 25 C 2 5. V GS = V..2.4.6.8.2.4.6 V SD, Source-to-Drain Voltage (V) 5 25 5 75 25 5 T C, Case Temperature ( C) Fig. Typical Source-to-Drain Diode Forward Voltage Fig 2. Maximum Drain Current Vs. Case Temperature 6 www.irf.com
I D, Drain-to-Source Current (A) E AS, Single Pulse Avalanche Energy (mj) IRHLNJ7734, 2N766U3 OPERATION IN THIS AREA LIMITED BY R DS (on) µs 2 8 I D TOP 9.8A 3.9A BOTTOM 22A ms 6 ms 4. Tc = 25 C Tj = 5 C Single Pulse DC V DS, Drain-to-Source Voltage (V) 2 25 5 75 25 5 Starting T J, Junction Temperature ( C) Fig 3. Maximum Safe Operating Area Fig 4. Maximum Avalanche Energy Vs. Drain Current D =.5 Thermal Response ( Z thjc ).2. t.5 t 2..2. SINGLE PULSE ( THERMAL RESPONSE ) Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc + Tc. E-5.... t, Rectangular Pulse Duration (sec) P DM Fig 5. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 7
IRHLNJ7734, 2N766U3 V (BR)DSS 5V tp VDS L DRIVER R G 2V V GS tp. D.U.T I AS.Ω + - V DD A I AS Fig 6a. Unclamped Inductive Test Circuit Fig 6b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 4.5V Q G 2V.2µF 5KΩ.3µF Q GS Q GD D.U.T. + V - DS V G V GS 3mA Charge Fig 7a. Basic Gate Charge Waveform I G I D Current Sampling Resistors Fig 7b. Gate Charge Test Circuit V GS V DS R D V DS 9% R G D.U.T. + - V DD V GS Pulse Width µs Duty Factor. % % V GS t d(on) t r t d(off) t f Fig 8a. Switching Time Test Circuit Fig 8b. Switching Time Waveforms 8 www.irf.com
IRHLNJ7734, 2N766U3 Footnotes: À Repetitive Rating; Pulse width limited by maximum junction temperature. Á VDD = 25V, starting TJ = 25 C, L=.26mH Peak IL = 22A, VGS = V Â ISD 22A, di/dt 328A/µs, VDD 6V, TJ 5 C Ã Pulse width 3 µs; Duty Cycle 2% Ä Total Dose Irradiation with VGS Bias. volt VGS applied and VDS = during irradiation per MIL-STD-75, method 9, condition A. Å Total Dose Irradiation with VDS Bias. 48 volt VDS applied and VGS = during irradiation per MlL-STD-75, method 9, condition A. Case Outline and Dimensions SMD-.5 PAD ASSIGNMENTS = DRAIN 2 = GATE 3 = SOURCE IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 9245, USA Tel: (3) 252-75 IR LEOMINSTER : 25 Crawford St., Leominster, Massachusetts 453, USA Tel: (978) 534-5776 TAC Fax: (3) 252-793 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 2/2 www.irf.com 9