THE classical solution of ac dc rectification using a fullwave

630 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 44, NO. 5, OCTOBER 1997 The Discontinuous Conduction Mode Sepic and Ćuk Power Factor Preregulators: Analysis and Design Domingos Sávio Lyrio Simonetti, Member, IEEE, Javier Sebastián, Member, IEEE, and Javier Uceda, Senior Member, IEEE Abstract Sepic and Ćuk converters working as power factor preregulators (PFP) in discontinuous conduction mode (DCM) present the following desirable characteristics for a PFP: 1) the converter works as a voltage follower (no current loop is needed); 2) theoretical power factor is unity; and 3) the input current ripple is defined at the design stage. Besides, input-output galvanic isolation is easily obtained. This paper analyzes the operation of both converters as DCM PFP. Design equations are derived, as well as a small-signal model to aid the control loop design. Both simulation and experimental results are presented that are in agreement with the theoretical analysis and complement the work. Index Terms AC DC power conversion, filtering, power supplies. NOMENCLATURE Freewheeling current. and currents. Conduction parameter; critical conduction parameter. Output-to-peak-input ratio; transformer turn ratio. ON time of the output diode ( ); ON time of the switch ( ). OFF time of both switch and output diode. Switching period. Input voltage and current; rectified input voltage and current. Ouput voltage and current. I. INTRODUCTION THE classical solution of ac dc rectification using a fullwave diode bridge followed by a bulk capacitor is being discontinued, due mainly to its harmonic current content, which is rich in low-order components and normally does Manuscript received June 27, 1996; revised April 14, 1997. This paper is an expanded version of papers presented at the 1992 IEEE Industrial Electronics Conference, San Diego, CA, November 11 13, 1992, and the 24th Annual IEEE Power Electronics Specialists Conference, Seattle, WA, June 20 24, 1993. D. S. L. Simonetti is with the Department of Electrical Engineering, Universidade Federal do Espírito Santo, Vitória, E.S., 29060-970 Brazil. J. Sebastián is with the Department of Electrical and Electronics Engineering, ETSIIeII de Gijón, Universidad de Oviedo, Campus de Viesques, 33204 Gijón, Spain. J. Uceda is with the Division of Electronics Engineering, ETSII de Madrid, Universidad Politécnica de Madrid, 28006 Madrid, Spain. Publisher Item Identifier S 0278-0046(97)06532-5. Fig. 1. Fig. 2. A Sepic PFP and a Ćuk PFP. Sepic and Ćuk PFP referred to the primary side. not comply with regulations concerning harmonics, such as IEC 61000-3-2 and others. A modern solution consists of a dc dc converter interfacing the diode bridge and the bulk capacitor. By correct control of the dc dc converter, the input current is shaped equal to the input voltage and basically presents a fundamental component plus easily filtered highorder harmonics. This configuration is typically named a power factor preregulator (PFP). Among the several known solutions to implementing a single-phase PFP (e.g., [1] [5]), the Sepic [6] and Ćuk [7] converters (Fig. 1) operating at discontinuous conduction mode (DCM) play an important role in many applications. First, they operate as a voltage follower, meaning that their input current naturally follows the input voltage profile, and a current 0278 0046/97$10.00 1997 IEEE

SIMONETTI et al.: SEPIC AND ĆUK POWER FACTOR PREREGULATORS 631 Fig. 3. (c) (d) A Sepic DCM PFP. First stage of operation. Second stage. (c) Third stage. (d) Inductor currents. loop is not necessary. Second, input output isolation is easily implemented. Finally, the input current ripple is defined at the design stage by the correct choice of magnetic component values. The converters work with zero-current turn-on in the switch and zero-current turn-off in the output diode, but with high rms current and voltage stresses, which limits their application range. Also, it is necessary to consider inherent problems caused by an isolation transformer (e.g., leakage inductance) if one is used. In the following sections, the operating stages are presented for both converters as DCM PFP s, along with the design equations and a small-signal model. Some design examples, simulations, and experimental results complete the analysis. In this paper, DCM means that each switching period presents a time interval in which neither the switch nor the output diode is conducting (freewheeling stage). For the Sepic converter, the capacitor voltage is equal to the input voltage, as, for the Ćuk converter, it is the sum of input and (referred) output voltage. A. First Stage of Operation This stage is shown in Fig. 3. The inductor currents are defined as and can be seen in Fig. 3(d). This stage is defined by the ON time of the switch ( ). (3) II. ANALYSIS OF OPERATION A Sepic PFP with input output isolation is shown in Fig. 1, and a similar Ćuk PFP is shown in Fig. 1. In the analysis, the output stage is referred to the primary side of the transformer, and the resulting Sepic and Ćuk topologies are shown in Fig. 2 and, respectively. Because of space, in the following figures, only the Sepic operation is considered, but a similar development can be made for the Ćuk converter. Equations for both converters are identical, provided that, for the Sepic converter, B. Second Stage of Operation The second stage is shown in Fig. 3, and are given by This stage finishes when and lasts and (4) (1) and for the Ćuk converter, (2) (5)

632 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 44, NO. 5, OCTOBER 1997 Fig. 5. Input current ripple. Fig. 4. Diode current. From (12), it can be seen that Sepic and Ćuk converters as DCM PFP are perfect PFP in theory ( is perfectly sinusoidal). C. Third Stage of Operation This is a freewheeling stage, shown in Fig. 3(c). This stage lasts until the start of a new switching period. The switch and output diode OFF time is given by D. Average Output Current For both converters, the average output current is the average diode current, shown in Fig. 4. Its peak value is given by (6) (7) F. Discontinuous Conduction Mode Operation and the Critical Conduction Parameter To operate at DCM, the following inequalities must hold [see Fig. 3(d)]: The worst situation occurs for operate at DCM, (14) (15). Therefore, to On the other hand, the average output current is given by (16) (17) Its average value in a switching period is given by (8) Using (10) and (17) results in (18) is the conduction parameter of the Sepic or Ćuk PFP: (19) and the average for half of a line period becomes (9) From (16) and (18), the critical value of operate at DCM [8] can be found as to (20) E. Input Current Considering 100% of efficiency,, Using (9) in (11), and noting that, (10) (11) (12) G. and Design The equivalent inductance is given by is obtained using (19) and (21) The design of and is made using the desired ripple value of the input current. Considering the input current shown in Fig. 5, its peak-to-peak value is given as (22) Its maximum value occurs for and is given by (13) (23)

SIMONETTI et al.: SEPIC AND ĆUK POWER FACTOR PREREGULATORS 633 Therefore, can be obtained considering the specified maximum current ripple: (24) and (25) ( normally is a percentage of the fundamental input current.) Fig. 6. Small-signal model equivalent circuit. H. The Design of the Intermediate Capacitor In conventional Sepic and Ćuk converters, the capacitor voltage is assumed to be constant. When operating as a PFP, the capacitor voltage is under the following two conflicting constraints: 1) to present a nearly constant value within a switching period and 2) to follow the input voltage profile within a line period. Its value has a significant influence in the input current waveform. The resonant frequency of,, and must be much greater than the line frequency to avoid input current oscillations at every line half cycle. Also, the resonant frequency between and must be lower than the switching frequency to assure almost constant voltage in a switching period. A good initial approximation for is given by [9] (26) (27) An isolated Ćuk converter presents an additional resonance caused by the transformer magnetizing inductance that might constitute a major problem [10]. In the Sepic converter, the magnetizing inductance is usually used as the inductor. I. Small-Signal Model A small-signal model can be easily obtained using the CIECA approach [11]. The following small-signal perturbations will be applied to both input and output average currents: the caret means steady-state value and means the introduced perturbation (small-signal value). Applying the perturbations in (10) and performing the small-signal approximation ( ) results in Repeating the procedure for (13) results in (29) (30) (31) The equivalent electric circuit described by (28) and (30) is shown in Fig. 6. From the equivalent circuit, the transfer function for the particular application can be found. The equivalent small-signal impedance of the load is a function of the type of load the PFP is feeding. 1) Constant Impedance Load: The small-signal impedance is the actual load impedance: (32) 2) Constant Power Load: A PFP usually feeds a dc dc converter [(switch-mode power supply (SMPS)]. An SMPS presents the following small-signal input impedance [12]: (33) 3) Constant Current Load: The load acts as a current source (e.g., a linear regulator). The small-signal impedance is (34) III. DESIGN EXAMPLE AND SIMULATION A Sepic PFP was designed with the following characteristics: t V; V; khz s W (28)

634 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 44, NO. 5, OCTOBER 1997 Fig. 7. (c) (d) Simulation results. Input current. Inductor currents. (c) Output voltage. (d) Intermediate capacitor (C 1 ) voltage. The ratio is (35) The critical conduction parameter (boundary between discontinuous and continuous conduction operation) is To assure DCM operation, the following chosen: From (18), the nominal duty cycle and, using (21), The current ripple is is found: (36) is (37) (38) H (39) A (40) and, from (24) and (25), mh H (41) Considering a resonant frequency of 2500 [Hz] the intermediate capacitor is given by F (42) Through simulation, was chosen to be 0.39 F. Simulation results are shown in Fig. 7. Fig. 7 shows the input current; Fig. 7 shows the current in inductors and for a few switching periods; Fig. 7(c) shows the output voltage and Fig. 7(d) shows capacitor voltage. The importance of a correct choice of capacitor is shown in Fig. 8. Fig. 8 shows the input current using F; a low-frequency oscillation ( khz) can be observed in the current signal. On the other hand, Fig. 8 shows the capacitor voltage for F. In this case, the capacitor voltage cannot be considered constant in a switching period, and its peak value is much higher than that shown in Fig. 7(d).

SIMONETTI et al.: SEPIC AND ĆUK POWER FACTOR PREREGULATORS 635 Fig. 8. capacitor voltage using C1 =0:1F. Influence of C1 value. Input current using C1 = 3:9 F. C1 Fig. 9. Open-loop dynamic simulation results. Input voltage increased by 20 V, resistive load. Duty-cycle increased by 0.03, constant power load. Also, the small-signal model was tested through simulation. From (29), it is found that Considering a resistive load, and having transfer function is (43) mf, the (44) Fig. 9 shows full-circuit simulation and small-signal model results for a 20-V increase in the input voltage ( ). For a constant power load, the transfer function is given by IV. EXPERIMENTAL RESULTS The following single-phase Sepic DCM PFP was implemented: V; khz; W; t V; Using the equations presented in this paper, the following is obtained: (45) Fig. 9 shows open-loop simulation and model results for a change of 10% in the duty cycle ( ). The estimated small-signal model results and full-circuit simulation results are in good agreement. Simulation results have shown the validity of the design approach and small-signal model presented. mh H F (46)

636 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 44, NO. 5, OCTOBER 1997 Fig. 10. (c) (d) Experimental results. Input voltage and current (filtered). Inductor currents. (c) Output voltage. (d) Dynamic response for a load change. The control-to-output transfer function ( F) is (47) The feedback loop of a PFP must be slow (crossover frequency below one-third of the line frequency) to avoid excessive second-harmonic injection from the output voltage into the input current (resulting in third-order harmonic current) [1]. The system is stable if the open-loop transfer function crosses 0 db with 20 db slope. Taking these points into account, an output voltage feedback loop was implemented, yielding the following open-loop transfer function: (48) The zero crossover frequency is about 5 Hz with 20 db slope, and the gain at 100 Hz is close to 0.01. Fig. 10 shows the converter input voltage and current. It can be observed that the current actually follows the input voltage. Fig. 10 shows and inductor currents for a few switching periods, as Fig. 10(c) shows the output voltage. The dynamic response of the PFP for a 100 50 W load change and vice versa can be seen in Fig. 10(d). Experimental results confirm the analysis carried out in this paper. V. CONCLUSIONS Sepic and Ćuk converters working as PFP in DCM are perfect preregulators. The input current naturally follows the input voltage, and theoretical power factor is one. The operation analysis for each stage leads to the equations for correctly designing the converter. The ripple present in the input current is limited by design, choosing an adequate value for the input inductor ( ). A correct choice of the intermediate capacitor is fundamental in obtaining a highquality input current. The static and dynamic simulation results, as well as the experimental results, have confirmed the validity of the analysis and design approaches presented here. REFERENCES [1] L. H. Dixon, High power factor preregulators for off-line power supplies, in Unitrode Power Supply Design Seminar Manual SEM600, Unitrode Corp., Waltham, MA, pp. 6.1 6.16, 1988. [2] I. Barbi and S. A. O. Silva, Sinusoidal line current rectification at unity power factor with boost quasiresonant converters, in Proc. IEEE APEC, 1990, pp. 553 562. [3] C. Zhov, R. B. Ridley, and F. C. Lee, Design and analysis of a hysteretic boost power factor correction circuit, in Proc. IEEE PESC, 1990, pp. 800 807. [4] J. Sebastián, J. Uceda, J. A. Cobos, J. Arau, and F. Aldana, Improving power factor correction in distributed power supply systems using PWM and ZCS-QR Sepic topologies, in Proc. IEEE PESC, 1991, pp. 780 791.

SIMONETTI et al.: SEPIC AND ĆUK POWER FACTOR PREREGULATORS 637 [5] R. Erickson, M. Madigan, and S. Singer, Design of a simple highpower-factor rectifier based on the flyback converter, in Proc. IEEE APEC, 1990, pp. 792 801. [6] R. P. Massey and E. C. Snyder, High voltage single-ended DC DC converter, in Proc. IEEE PESC, 1977, pp. 156 159. [7] S. Ćuk and R. D. Middlebrook, A new optimum topology switching DC-to-DC converter, in Proc. IEEE PESC, 1977, pp. 160 179. [8] J. Sebastián, J. A. Cobos, P. Gil, and J. Uceda, The determination of the boundaries between continuous and discontinuous conduction modes in DC-to-DC converters used as power factor preregulators, in Proc. IEEE PESC, 1992, pp. 1061 1070. [9] D. S. L. Simonetti, AC DC preregulators with power factor correction Single-switch solutions, Ph.D. dissertation, Univ. Politécnica de Madrid, Madrid, Spain, Nov. 1995. [10] R. A. Langley, J. D. van Wyk, and J. J. Schoeman, Instabilities in transformer-coupled Ćuk-converters and their solution at higher power levels, in Proc. 4th Int. Conf. Power Electronics and Variable-Speed Drives, July 1990, pp. 207 211. [11] P. R. K. Chetty, Current injected equivalent circuit approach (CIECA) to modeling of switching dc dc converters, IEEE Trans. Aerosp. Electron. Syst., vol. 17, pp. 802 808, Nov. 1981. [12] R. D. Middlebrook, Input filter considerations in design and application of switching regulators, in Conf. Rec. IEEE-IAS Annu. Meeting, 1979, pp. 366 382. Javier Sebastián (M 87), for a photograph and biography, see this issue, p. 603. Javier Uceda (M 83 SM 91), for a photograph and biography, see this issue, p. 603. Domingos Sávio Lyrio Simonetti (S 92 M 95) was born in Vitória, Brazil, in 1961. He received the Degree in electrical engineering from the Universidade Federal do Espírito Santo, Vitória, Brazil, the M.Sc. degree from the Federal University of Santa Catarina, Florianópolis, Brazil, and the Ph.D. degree from the Universidad Politécnica de Madrid, Madrid, Spain, in 1984, 1987, and 1995, respectively. Since 1984, he has been a Professor in the Electrical Engineering Department, Universidade Federal do Espírito Santo. His research interests include high-power-factor rectifiers, active power filters, low-loss converters, and machine drives.