NPA1-D Product Description: The Nxbeam NPA1-D is a Ka-band high power GaN MMIC fabricated in.2um GaN HEMT on SiC. This part is ideally suited for satellite communications, point-to-point radios, and radar applications. The MMIC operates from 28 to 32 GHz and provides 38 W of saturated output power at > 27% PAE in an ultra-small footprint of 17.81 mm 2 (4.75 mm x 3.75 mm). The NPA1-D comes in die form with RF input and output matched to Ω with DC blocking capacitors for easy system integration. The HEMT devices are fully passivated for reliable operation. Band pad and backside metallization are Au-based for compatibility with eutectic die attachment methods. Key Features: Frequency: 28 32 GHz Linear Gain: 26 db Psat: 38 W PAE: 27 % Chip Dimensions: 4.75 x 3.75 x.1 mm Electrical Specifications Test Condition: Vd = 28V, Idq = 2.98A, CW Operation, Temp. = C Parameter Min Typical Max Unit Frequency 28 32 GHz Gain (small signal) 26 db Input Return Loss > db Output Return Loss > db Output Power (at Psat).8 dbm Power Gain (at Psat) 18 db Power Added Efficiency (at Psat) > 27 % Absolute Maximum Ratings (Temp. = C) Parameter Min Max Unit Drain Voltage (Vd1, Vd2, Vd3) 28 V Drain Current (Id1) 32 ma Drain Current (Id2) 14 ma Drain Current (Id3) 42 ma Gate Voltage (Vg1, Vg2, Vg3) -5 V Input Power (Pin) TBD dbm Assembly Temperature ( seconds) C 1 Circuit Block Diagram 2 3 4 5 6 7 8 Recommended Operating Condition Parameter Value Unit Drain Voltage (Vd) 24 or 28 V Drain Current (Idq) 2.98 A Gate Voltage (Vg) (Typical) -3.5 V 14 13 12 11 9 Pin number information detailed under Die Size and Bond Pad Information Page 1 of 6 Phone: 949-656-2883
Power Gain (db) Pout (dbm) Power (dbm) PAE (%) Gain (db) Return Loss (db) NPA1-D Small Signal Performance (T= C) 33 31 29 27 Gain vs. Frequency DB( S(2,1) ) Amp_Full DB( S(2,1) ) -5 Amp_Full_NL_CapCurrent_Interstage2 -DB( S(2,1) ) Amp_Full_NL - -2 Return Loss vs. Frequency 23 21 19 17 - - - Blue: Input Red: Output - Large Signal Performance (T= C) 6 Output Power (at Psat) vs. Frequency DB(PGain(PORT_1,PORT_2)) DB( Pcomp(PORT_2,1) ) (dbm) PAE(PORT_1,PORT_2) PAE (at Psat) vs. Frequency 55 2 2 5 Power Gain (at Psat) vs. Frequency DB(PGain(PORT_1,PORT_2)) DB( Pcomp(PORT_2,1) ) PAE(PORT_1,PORT_2) Output Power vs. Input Power vs. Frequnecy 2 2 5 5 : 28, 29,, 31, 32 - -8-6 -4-2 2 4 6 8 12 14 16 18 2 22 24 26 28 Power (dbm) Page 2 of 6
IM3 (dbc) NPA1-D Linearity (T= C) -5 IM3 vs. Output Power Per Tone (at 29.5 GHz) Tone Spacing: 1 MHz - - -2 - - - 33 34 36 37 38 39 41 42 Output Power Per Tone (dbm) Page 3 of 6
1875 um 1875 um 37 um NPA1-D Die Size and Bond Pad Information Chip Size = 47 ± um x 37 ± um Chip Thickness = um Chip Backside metal is ground RF Input/Output Pad Dimensions = 134 um x 28 um DC Pad Dimensions: Vg1, Vg2, Vg3 = um x um Vd1 = 2 um x um Vd2 = um x um Vd3 = um x um Pad Num. Function 1 RF in 2, 14 Vg1 3, 13 Vd1 4, 12 Vg2 5, 11 Vd2 6, Vg3 7, 9 Vd3 8 RF out 2 um 167 um 11 um 6 um 389 um 1 um 2 3 4 5 6 7 1 8 14 13 12 11 9 47 um Page 4 of 6
NPA1-D Suggested Bonding Arraignment The following diagram is a suggested bonding arraignment but other arraignments are possible. It is also possible to tie all gate voltages together as well as all drain voltages together. Vg1 Vd1 Vg2 Vd2 Vg3 Vd3 2 3 4 5 6 7 RF in 1 8 RF out 14 13 12 11 9 Gate Connection Drain Connection.1 µf, V Shunt Capacitor.1 µf, V Shunt Capacitor Ω, V Series Resistor pf, V Shunt Capacitor Assembly Process.1 µf, V Shunt Capacitor.1 µf, V Shunt Capacitor pf, V Shunt Capacitor This product has gold backside metallization and can be mounted using either a conductive epoxy or AuSn attachment. Nxbeam recommends the use of AuSn attachment due to the high power level of this product to ensure good thermal conductivity. Maximum recommended temperature during die attachment is 32 C for seconds. This product contains metal air bridges so caution should be taken when handling the die to avoid damage. Page 5 of 6
NPA1-D The NPA1-D can be biased from either top or bottom of the chip. Bias-down Procedure: 1.) Turn off RF signal. 2.) Gradually decrease the gate voltage down to -5 V. 3.) Gradually decrease the drain voltage down to V. 4.) Gradually increase gate voltage to V. 5.) Turn off supply voltages Bias Information Bias-up Procedure: 1.) It is recommended that voltage and current limits are set on the voltage supply s prior to biasing the product. 2.) Ensure power supplies are properly grounded to the product test fixture. 3.) Apply negative gate voltage (-5 V) to ensure all devices are pinched off. 4.) Gradually increase the drain bias voltage to the desired bias level but not to exceed the maximum voltage of 28 V. 5.) Gradually increase the gate voltage while monitoring the drain current until the desired drain current is achieved. 6.) Apply RF signal. ESD Sensitive Product Important Information The data contained in this document is a sampling of preproduction data. Nxbeam Inc. reserves the right to update and change without notice the characteristic data and other specifications as they apply to this document. Customers should obtain and verify the most recent product information before placing orders. Nxbeam Inc. assumes no responsibility or liability whatsoever for the use of the information contained herein. The product represented by this datasheet is subject to U.S. Export Law as contained in ITAR or the EAR regulations. Page 6 of 6