DESCRIPTION The is a high-speed analog voltage comparator which, for the first time, mates state-of-the-art Schottky diode technology with the conventional linear process. This allows simultaneous fabrication of high-speed TTL gates with a precision linear amplifier on a single monolithic chip. PIN CONFIGURATIONS D, N Packages V + V + A FEATURES ns propagation delay Complementary output gates TTL or ECL compatible outputs Wide common-mode and differential voltage range Typical gain V 7 8 TOP VIEW GND APPLICATIONS A/D conversion ECL-to-TTL interface TTL-to-ECL interface Memory sensing Optical data coupling BLOCK DIAGRAM V + A V V + ORDERING INFORMATION DESCRIPTION TEMPERATURE RANGE ORDER CODE DWG # -Pin Plastic Dual In-Line Package (DIP) to +7 C N B -Pin Small Outline (SO) Package to +7 C D 7D V + V + D D D A V K R.K R.K 7 R D R 7 R D K 7 8 R7 K 7 R8 K.K R D D7 D8 D R K D R.K R D R K R K R.K 7 8 R 7 K 8 GND August, 8-7
ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER RATING UNIT V + Positive supply voltage + V V - Negative supply voltage - V V + Gate supply voltage +7 V V OUT Output voltage +7 V V IN Differential input voltage ± V V CM Input common mode voltage ± V P D Maximum power dissipation T A = C (still-air) N package mw D package mw T A Operating temperature range to +7 C T STG Storage temperature range - to + C T SOLD Lead soldering temperature. Derate above C at the following rates: N package at.mw/ C D package at 8.mW/ C ( sec max) + C August,
DC ELECTRICAL CHARACTERISTICS V +=+V, V +=+.V, V -=-V, unless otherwise specified. SYMBOL PARAMETER TEST CONDITIONS Input characteristics Min Typ Max Input offset voltage @ C V OS Over temperature range Input bias current @ C I BIAS Over temperature range V IN =V UNIT mv µa Input offset current @ C µa I OS Over temperature range V IN =V µa V CM Common-mode voltage range - V Gate characteristics Output voltage V OUT state V +=.7V, I SOURCE =-ma.7. V OUT state V +=.7V, I SINK =ma. V Strobe inputs Input current V +=.V, V STROBE =.V - ma Input current @ C V +=.V, V STROBE =.7V µa Over temperature range V +=.V, V STROBE =.7V µa input voltage V +=.7V.8 V input voltage V +=.7V. V I SC Short-circuit output current V +=.V, V OUT =V -8-7 ma Power supply requirements Supply voltage V + V V - - - V V +.7. V Supply current V +=V, V -=-V V +=.V I + Over temp. ma I - Over temp. ma I + Over temp. ma. See logic function table. AC ELECTRICAL CHARACTERISTICS T A = C (See AC test circuit). SYMBOL PARAMETER TEST CONDITIONS t R Transient response V IN =±mv step Propagation delay time LIMITS Min Typ Max t PLH Low-to-high ns t PHL High-to-low ns Delay between output A and B ns Strobe delay time t ON turn-on time ns t OFF turn-off time ns UNIT August,
TYPICAL PERFORMAE CHARACTERISTICS Input Currents vs Temperature Supply Currents vs Temperature Power Dissipation vs Supply Voltage INOUR CURRENT A µ 8... BIAS CURRENT OFFSET CURRENT SUPPLY CURRENT ma 7 I + V + =.V I V = V I + V + = V POWER DISSIPATION mw V + =.V TA = o C 7 7 7 8 TEMPERATURE o C TEMPERATURE o C SUPPLY VOLTAGE (V +, V ) VOLTS Supply Current vs Supply Voltage Output Propagation Delays Response Time for Various Input Overdrives SUPPLY CURRENT ma 8 7 T T + T + TA = o C V + =.V VOLTAGE V VOLTAGE mv + A V + = V, V = V V + =.V VOLTAGE V VOLTAGE mv + + mv + mv + mv V + = V, V = V V + =.V + mv + mv 7 8 SUPPLY VOLTAGE (V +, V ) VOLTS TIME ns TIME ns RESPONSE TIME TEST CIRCUIT PROBE Ω (V +) + µf +. K. + (V +) + µf PROBE + K C R L Ω Ω + R R C L CR 8 CR K CR (V ). + C CR = IN selected for. divider R, selected for mv at Pin Input PRR = MHz P w = ns T r = T f = ns Amplitude =.V Output R L = Ω C L = pf (including stray capacitance August,
APPLICATIONS One of the main features of the device is that supply voltages (V+, V-) need not be balanced, as in the following diagrams. For proper operation, however, negative supply (V-) should always be at least V more than the ground terminal (pin ). Input Common-Mode range should be limited to values of V less than the supply voltages (V+ and V-) up to a maximum of ±V as supply voltages are increased. It is also important to note that Output A is in phase with Input A and Output B is in phase with Input B. LOGIC FUTION V ID (A +, B - ) V ID -V OS H X L H -V OS <V ID <V OS H H Undefined Undefined V ID V OS X H H L X L L H H TYPICAL APPLICATIONS λ + V + V R R N ECL R N TTL S V Photodiode Detector V ECL-to-TTL Interface + V V REF + V R K K MOS RAM TTL N N Ω Ω R R V MOS Memory Sense AMP V.V TTL-to-ECL Interface August,