Analog to Digital Conversion 02534567998 6 4 2 3 4 5 6
ANALOG to DIGITAL CONVERSION
Analog variation (Continuous, smooth variation) Digitized Variation (Discrete set of points) N2 N1
Digitization applied to signals. (Continuous sampling to generate a series of numbers)
Digitization applied to signals. (Continuous sampling to generate a series of numbers)
How to convert an ANALOG voltage to a BINARY NUMBER? Ramp type A/D Converter V1 V2 COUNT = N1 COUNT = N2 N1 & N2 are numeric representations of the analog voltages V1 & V2! START COUNTING STOP START COUNTING STOP
The digital output of the counter is a true representation of the magnitude of the voltage at the instant of digitization. Counters provide a BINARY count output. BINARY COUNT α VOLTAGE Repeat the process START Ramp, START Count, STOP when Vramp = V to obtain a series of N1, N2, N3,.. as digitized values to represent the variation of the analog voltage V.
Dual Slope type A/D Converter 01011001
Dual Slope type A/D Converter Scheme of Operation The control logic switches V IN to the integrator input for a fixed time interval. During this time interval the integrator output V I is a positive ramp with a slope proportional to V IN After the fixed time interval the control logic switches the reference voltage V REF onto the integrator and resets the counter to zero. The integrator output is then a negative ramp with a fixed rate of decrease. The time taken for V I to decrease to zero is proportional to V IN. Count the clock pulses during this time. When V I falls to zero the comparator output V C changes to 1 and the count is stopped. The count is proportional to the fall time and therefore to V IN. The parallel digital output signal is proportional to the count. This method has the advantage that integration tends to average out the effects of other interference voltages.
Dual Slope type A/D Converter Scheme of Operation
Successive Approximation type A/D Converter 01011001
Successive Approximation type A/D Converter Scheme of Operation This method involves making successive guesses at the binary code corresponding to the input voltage yi. The trial code is converted into an analogue voltage using a DAC, and a comparator is used to decide whether the guess is too high or too low. On the basis of this result another guess is made, and the process is repeated until Vq is within half a quantization interval of yi.
Successive Approximation type A/D Converter Scheme of Operation sequence of guesses MSB INPUT RANGE LSB
Flash A/D Converter
Flash A/D Converter Scheme of Operation In any n-digit binary ADC there are Q quantization voltage levels V0 to VQ 1, where Q = 2n. In a flash ADC there are Q 1 comparators in parallel and Q 1 corresponding voltage levels V1 to VQ 1. In each comparator q, the input sample value yi is compared with the corresponding voltage level Vq. If yi is less than or equal to Vq, the output is made zero 0. If yi is greater than Vq, the output is made to be 1.
Thus if yi lies between Vq and Vq+1, i.e. Vq < yi Vq+1, the output of the lowest q comparators 1 to q will all be 1 and the output of the remaining comparators q + 1 to Q 1 will all be 0. Thus the comparators provide a Q 1 digit parallel input code to a priority encoder which generates an n-digit binary parallel output code corresponding to the value of q. The main advantage of the flash converter is the short conversion time. The main disadvantage is that the large number of comparators required to give acceptable resolution which makes it relatively expensive.
Other characteristics of AD Converters RESOLUTION QUANTIZATION LEVEL SAMPLING FREQUENCY ALIASING
Resolution
Resolution
Resolution (Quantization interval) Resolution q = (V max V min ) / 2 n 1 2 n = [(V max V min ) / q ] + 1 n = log (V max V min )+ 1 / log 2 q n = Number of bits required to get a resolution q In general, Quantization interval
In digital imagery, conversion of gray levels (or color) to digital form is also identified as gray level quantization. For an 8 bit image, there are 256 quantization levels (= gray level resolution) corresponding to different levels of gray.
Greater the number of levels Q, the lower is the quantization error.
Sampling time / Sampling frequency The rate at which the input voltage signal is sampled is known as sampling frequency.
For adequate reproduction, the sampling frequency (fs) must be at least twice the maximum frequency of the analog signal (fa) under test. Rule of thumb: fs 10 fa
Example problems: A successive approximation type AD converter has 8 bits and an input range of 0 2.55 V. Find the binary output corresponding to an input of 1 V. A certain transducer provides and output voltage corresponding to height of a liquid column so that the output is 0 V for 0 cm, and 4.5 V for 20 cm. If you need to measure the height with a resolution of 0.5 mm, calculate the number of bite required in the AD converter.
ADC using successive approximation Given an analog input signal whose voltage should range from 0 to 15 volts, and an 8 bit digital encoding, calculate the correct encoding for 5 volts. Then trace the successive approximation approach to find the correct encoding. Assume M = 2 n 1 a / Vmax = d / M 5 / 15 = d / (256 1) d = 85 or binary 01010101
ADC using successive approximation Step 1 4: determine bits 0 3 ½(V max V min ) = 7.5 volts V max = 7.5 volts. ½(7.5 + 0) = 3.75 volts V min = 3.75 volts. ½(7.5 + 3.75) = 5.63 volts V max = 5.63 volts ½(5.63 + 3.75) = 4.69 volts V min = 4.69 volts. 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 1 0 0 0 0 Embedded Systems Design: A Unified Hardware/Software Introduction, (c) 2000 Vahid/Givargis
ADC using successive approximation Step 5 8: Determine bits 4 7 ½(5.63 + 4.69) = 5.16 volts V max = 5.16 volts. ½(5.16 + 4.69) = 4.93 volts V min = 4.93 volts. ½(5.16 + 4.93) = 5.05 volts V max = 5.05 volts. ½(5.05 + 4.93) = 4.99 volts 0 1 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 1 0 1 0 1 0 0 0 1 0 1 0 1 0 1 Embedded Systems Design: A Unified Hardware/Software Introduction, (c) 2000 Vahid/Givargis
Example What is the maximum frequency of input signal that can be converted by an A D convertor with a conversion time of 0.25 ms? samples per second = 1000 / 0.25 = 40,000 Maximum frequency in input signal has to be half this or 20kHz.
Counter type ADC
Digital to Analog Conversion (D/A Conversion) A digital to analog converter (DAC) is a device that converts digital numbers (binary) into an analog voltage or current output.
R-2R Ladder Network
http://www.tek.com/blog/tutorial digital analog conversion %E2%80%93 r 2r dac http://paginas.fisica.uson.mx/horacio.munguia/aula_virtual/cursos/instrumentacion %20II/Documentos/LADDERNETWORKS.pdf
Handling multiple inputs (Multiplexing) In order to fully utilize more expensive and important units such as the Microprocessor, AD and DA converters, and also to be able to handle more than one input and output, it is essential that microprocessor based devices can handle multiple tasks with the same hardware resource base.
Multiplexers & their use in measurement systems INPUTS A Multiplexer selects one out of many inputs and channels it to the single output OUTPUT SELECT Lines
Multiplexing in a Sensor System Sensor Sensor Signal Conditioning Analog MUX A/D Microprocessor Sensor H/L Control Bus 8 bit Analog to Digital Converters Share A/D via analog multiplexer Analog signal conditioning
Example ICs
Demultiplexers Demultiplexers (DEMUX) performs the same task of connecting one out of many lines to one. When used as a DEMUX, the information through a single input line is channeled to one out of many output lines. A MUX is an input selector. It allows you to select from 1 of N inputs and direct it to the output using control bits. A DeMUX is an output selector, letting you pick one of N outputs to direct an input to.
A 1-4 DEMUX
A microcontroller based data acquisition system
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