Si, SiC and GaN Power Devices: An Unbiased View on Key Performance Indicators

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2016 IEEE Proceedings of the 62nd IEEE International Electron Devices Meeting (IEDM 2016), San Francisco, USA, December 3-7, 2016 Si, SiC and GaN Power Devices: An Unbiased View on Key Performance Indicators G. Deboy, M. Treu, O. Haeberlen, D. Neumayr This material is published in order to provide access to research results of the Power Electronic Systems Laboratory / D-ITET / ETH Zurich. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the copyright holder. By choosing to view this document, you agree to all provisions of the copyright laws protecting it.

Si, SiC and GaN power devices: an unbiased view on key performance indicators G. Deboy 1, M. Treu 1, O. Haeberlen 1 and D. Neumayr 2 1 Infineon Technologies Austria AG, Power management & Multi market Division, Austria, email: gerald.deboy@infineon.com 2 Power Electronic Systems Laboratory, ETH Zurich, Switzerland Abstract This paper discusses key parameters such as capacitances & switching losses for silicon, SiC and GaN power devices with respect to applications in switch mode power supplies. Whereas wide bandgap devices deliver roughly one order of magnitude lower charges stored in the output capacitance, the energy equivalent is nearly on par with latest generation super junction devices. Silicon devices will hence prevail in classic hard switching applications at moderate switching frequencies whereas SiC and GaN based power devices will play to their full benefits in resonant topologies at moderate to high switching frequencies. I. INTRODUCTION The recent introduction of SiC power devices with voltage ratings below 1200V and the availability of 600V GaN HEMTs offer the designer of power supplies operating from single phase AC line a number of choices. As the power supply industry pushes along towards new frontiers in terms of efficiency and density, the matching of topology, control and device selection becomes a crucial task. The paper will be organized in a device section, a topology and control section and final concluding remarks. II. A. Silicon based power devices DEVICE SECTION The advancements in super junction (SJ) technology 1 have resulted in area specific on-state resistances below 1 Ohm*mm² for 600V respectively 650V rated power devices. This extremely low on-resistance has been achieved by radical shrink of the pitch of the underlying SJ structure. Precise tailoring of the doping profiles is required to yield process windows being wide enough for mass manufacturing. With further improvements in related manufacturing processes a specific on-state resistance in the range of 0.5 Ohm*mm² is conceivable before SJ devices face ultimately physical barriers. The continuous shrink of the device concept leads to a more and more pronounced non-linearity of the output capacitance. Whereas the low voltage part of the output capacitance increases due to higher area specific density of pncolumns, the high voltage part of the output capacitance decreases with the area shrink factor of the device. The change of output capacitance as function of voltage exceeds two orders of magnitudes, approaching three orders of magnitude for latest generations of SJ devices. Whereas the reduction of the high voltage part of the output capacitance leads to significant lower energy values being stored in the output capacitance, the dramatic non-linearity yields a more and more rectangular switching behavior with very high dv/dt values at turn-off. As turning off SJ devices in a lossless manner requires to turn off the channel current before the voltage significantly rises across the device, the shape of the output capacitance, being charged by the full load current, will determine the voltage waveform. The gain in the energy stored in the output capacitance, being dissipated as heat in hard switching applications during turn-on, is hence correlated to a corresponding increase of switching speed. B. GaN based power devices Lateral GaN power devices show naturally a normally-on characteristic supporting current flow at zero gate bias. Significant efforts have been made by various vendors to turn the device concept into normally-off either by using a cascode configuration with a series-connected low voltage MOSFET or through special gate structures such as the p-gate-injection transistor concept. One of the striking features of lateral GaN High electron mobility transistors is the zero reverse recovery charge. Due to absence of pn-junctions and current flow in a polarization induced two-dimensional electron gas, reverse operation starts when the drain voltage falls below the sum of the gate potential and the threshold voltage, thus creating a reverse channel. This unique characteristic make GaN HEMTs first choice for applications with continuous switching on a reverse biased device such as in half bridge or full bridge configurations. Furthermore, due to expansion of the space charge layer along the GaN / AlGaN interface within a basically undoped substrate, the output capacitance shows a very linear characteristic. Specifically in half bridge configurations the effective sum of output capacitances at the switching node with one device being charged from 0V to eg 400V, while the other discharges, is nearly constant. The resulting voltage waveform at the switching node is consequently a linear transition in contrast to the S-shaped voltage waveforms shown by SJ devices. Control of the dv/dt at the switching node is hence possible through precise control of the current flowing into this node. In an LLC converter for example controlling the magnetizing current will allow to fine tune the dv/dt if the input/output voltage specification supports 978-1-5090-3902-9/16/$31.00 2016 IEEE 20.2.1 IEDM16-532

such designs. Typically, due to a very low charge stored in the output capacitance, LLC designs could be taken to magnetizing currents below 1A. Another interesting aspect of GaN HEMTs is their suitability for dual gate structures to achieve bidirectional blocking and conducting devices 2 and to integrate more than one power device on a common substrate, thus easing the way towards higher integration levels than achievable with discrete components. C. SiC based power devices Commercially available device concepts include lateral or vertical JFET devices, planar MOSFETs and trench MOSFETs. With the MOSFET being a normally-off device the JFET concept in comparison requires either a cascode configuration or a direct drive concept with a safety switch to be turned into a device blocking at zero Volt gate bias. In contrast to GaN HEMTs SiC devices show vertical current flow from the top surface to the bottom surface as being state-of-the art in silicon based power devices. The devices are hence available in standard pin configuration in conventional packages such as TO 247, allowing a relatively easy change from silicon based power devices. GaN devices with their intrinsically high switching speed and low threshold voltage are best in SMD packages to reduce parasitic inductances to a bare minimum. Even though SiC MOSFETs have a blocking pn-junction with injection of bipolar carriers in reverse operation, the reverse recovery charge is more than one magnitude lower than in corresponding silicon devices. This effect comes from the very short bipolar carrier life time, which make SiC devices very suitable for applications with continuous hard commutation of the body diode. The output capacitance shows a classic hyperbolic shape as well known from planar silicon MOSFETs; the energy stored in the output capacitance is comparable both to latest SJ devices as well as GaN HEMTs. Table I shows a comparison of major key performance indicators. III. TOPOLOGY SECTION The strive for better efficiency and density in single phase AC power supplies favors bridgeless input stages for power factor correction such as Totem pole or eg topology I5 from the noteworthy paper by Tollik et al 3. Both these topologies use only one inductor and avoid in at least one interval of operation one or two diodes in the power path. Obviously remaining diodes can be paralleled with MOSFETs to further reduce conduction losses, thus pushing the efficiency of the PFC stage to 99% and above. If driven in continuous current mode, the totem pole stage will require power devices with low or zero reverse recovery charge, thus showing a clear value proposition for both GaN HEMTs and SiC devices. With both lower energy stored in the output capacitance, faster turn-off and true zero reverse recovery charge GaN HEMTs will show performance benefits as compared to their SiC counterparts. Tolliks topology in comparison shifts the commutation of current to the output diode bridge, thus allowing a combination of silicon based power device in back-to-back configuration with SiC Schottky barrier diodes in the two fast switching sockets. Alternatively also the Totem pole topology can be used with silicon devices, if the control is changed from continuous current mode into triangular current mode featuring zero voltage switching. This control method is specifically versatile for GaN HEMTs enabling operation in the range of 1 MHz as eg demonstrated within Googles Little box challenge 4. As subsequent DC/DC stage the LLC converter is today state-of-the-art. At moderate switching frequencies, typically below 150 khz, silicon devices can compete. If switching frequencies move to eg 400 khz and above the charge stored in the output capacitance and the resulting turn-off delay times create loss of duty cycle, thus leading to a situation, where lowering the on-state resistance does no longer result in better efficiency. The value of GaN HEMTs for LLC converter lies in its significantly lower charge stored in the output capacitance and its perfect linearity of the output capacitance. The intrinsic capability to cope with hard commutation events in case of control errors is an additional benefit versus silicon based power devices. IV. CONCLUSION We discussed key performance indicators for Silicon, SiC and GaN based power devices in the context of suitable topologies and control methods. GaN HEMTs will offer significant benefit versus silicon based power devices in topologies with continuous commutation of current in bridge based topologies, such as totem pole and in resonant topologies at moderate to high switching frequencies. The value proposition of SiC devices relies on the same arguments than for GaN devices with key performance indicators however not entirely reaching the level of corresponding GaN power devices. Silicon power devices will prevail in many applications both hard and resonant switching at moderate frequencies. REFERENCES [1] M. Treu et al, Si, SiC and GaN in power electronics a 600V class comparison, IEDM, 2012. [2] T. Morita et al, 650V 3.1 mohm*cm² GaN based monolithic bidirectional switch using normally-off gate injection transistor, IEDM 2007. [3] D. Tollik et al, Comparative analysis of single phase active PFC topologies, Intelec 1992. [4] J. Kolar et al, The ideal switch is not enough, Key note ISPSD 2016. IEDM16-533 20.2.2

Silicon SiC GaN Concept super junction planar MOSFET emode HEMT Blocking voltage 600V 900V 600V On-state resistance (typ.) 56 mohm 65 mohm 55 mohm Reverse recovery charge 6000 nc 130 nc 0 nc Energy stored in Coss @ 400V 8.1 µj 8.8 µj 6.4 µj Charge stored in Coss @ 400V 420 nc 70 nc 40 nc Turn-off loss @ 10A / 400V 15 µj 10 µj 10 µj [6] L. Alqueres and J. C. Praca, "The Brazilian power system and the challenge of the Amazon transmission," in Proc. 1991 IEEE Power Engineering Society Transmission and Distribution Conf., pp. 315-320 TABLE 1: Comparison of key performance indicators for silicon, SiC and GaN power devices. Output capacitance Coss [pf] 10000 1000 100 10 8 mohm*cm² SJ tech. 24 mohm*cm² SJ tech. 38.5 mohm*cm² SJ tech. GaN HEMT 1 10 100 1.000 Drain-Source voltage VDS [V] Fig. 1: Comparison of output capacitance characteristic between several 600V rated Superjunction technologies and GaN HEMT. 20.2.3 IEDM16-534

Lifetime @1.2V ( s ) 10 14 10 13 10 12 10 11 10 10 Switching losses [µj] 60 50 Predicted by V-model 40 30 20 10 0 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 EOT ( nm ) Hf(30%) Hf(50%) Eon [µj] Eoff [µj] Etot, hard switching Etot, soft switching Etot, soft switching, parallel cap 0 5 10 15 Load current [A] Fig. 2: Switching losses of GaN HEMT in hard and soft switching conditions. TODAY S BEST Classic Dual Boost HB TotemPole Higher efficiency (>98%) Highest efficiency (>98%) Simpler Reduced part cont TODAY/ TOMORROW TCM PFC Higher efficiency (99%) 2-phases (high part count) Complex control 100kHz+ operation FB TotemPole TOMORROW S BEST TCM PFC w/ GaN Highest efficiency (99.5%) Suitable for 1MHz+ operation Coupled with HF LLC for extreme power density (>>100W/in 3 ) Higher efficiency (>99%) Targeting 99% at very high switching frequency Fig. 3: Evolution of single phase PFC topologies. IEDM16-535 20.2.4