Readout electronics for optical detectors

Contributed paper OPTO-ELECTRONICS REVIEW 12(1), 129 137 (2004) Readout electronics for optical detectors Z. BIELECKI * Institute of Optoelectronics, Military University of Technology 2 Kaliskiego Str., 00-908 Warsaw, Poland A review of readouts electronics for optical detectors is presented. General requirements for scientific infrared focal plane arrays readout are discussed. Specific approaches to the unit cell electronics are described with respect to operation, complexity, noise, and other operating parameters. Keywords: low noise electronics, photoreceivers, focal plane arrays. 1. Introduction A receiver of optical radiation consists of a photodetector, preamplifier and signal processing circuit. In a photodetector, the optical signal is converted into an electrical one which is amplified before further processing. Sensitivity of an optical detection system depends primarily on the first stage of a photoreceiver, i.e., the photodetector and preamplifier. A preamplifier should have low noise and sufficiently wide bandwidth to ensure faithful reproduction of the temporal shape of an input signal. It is necessary to minimise the noises from various sources, i.e., background noise, photodetector noise, biasing resistors noise, and any additional noises of signal processing. If further minimisation of noise of the first photoreceiver stages is not possible, the advanced methods of optical signal detection can sometimes be used to well recover information carried by optical radiation signals of extremely low power. Heterodyne and homodyne detection can be used to reduce the effects of amplifier noise. Post detection methods are: phase-sensitive detection, synchronous integration of a signal, as well as heterodyne and homodyne detection. Several types of discrete devices or ICs are suitable for the active element in preamplifiers, bipolar (BJT) or field-effect transistor (FET) or an integrated circuit with an input bipolar transistor FET or MOSFET transistor can be used. Main criteria of its selection are: a value of detector resistance and a range of transmitted frequency [1]. Optimum design of a preamplifier can be obtained on the basis of analysis of particular noise sources in equivalent input noise of a detector-preamplifier circuit. The preamplifier noise is represented completely by the zero impedance voltage generator V n in series with the input port, and the infinite impedance current generator I n in parallel with the input. Typically, each of these terms is frequency dependent. For non-correlated noise components, the equivalent * e-mail: zbielecki@wat.edu.pl noise at the input of a photodetector-preamplifier circuit is described by the formula 2 2 2 2 2 2 ni nd nb n n d V = V + V + V + I R, (1) where V nd is the detector noise, V nb is the background noise, V n, I n are the voltage and current noise of the preamplifier, respectively, R d is the detector resistance. The first transistor of a preamplifier is a dominant noise contributor of the input noise of signal processing circuits. The effective contribution of this transistor s noise also depends on the detector impedance. If the transistor of the input stage has a high noise current it will be a bad chose for use with a high-resistance current-noise detector. A low-resistance detector operates best with a preamplifier of low noise voltage. Figure 1 shows the dependence of the ratio of preamplifier (or input transistor) noise to detector thermal noise as a function of detector resistance, for bipolar, JFET, and MOSFET amplifiers, in a common emitter or common Fig. 1. Dependence of the ratio of preamplifier input voltage noise to detector thermal noise on detector resistance (after Ref. 2). Opto-Electron. Rev., 12, no. 1, 2004 Z. Bielecki 129

Readout electronics for optical detectors source configuration [2]. It can be noticed that there are some ranges of detectors resistances for which the preamplifiers noise is lower than the detector thermal noise. For any given detector, the values of the thermal noise voltage V t and the resistance R d are determined by the detector types (they cannot be changed). However, it is possible to change the parameters V n and I n of the designed preamplifier. Thus, minimisation of the input noise of the circuit is possible. Changes in the values V n and I n are made by choosing adequate elements in the preamplifier circuit. For low-resistance detectors from tens of W to 1 kw, mainly the circuits with bipolar transistors at the input are usually used as they have low values of V n. Sometimes, in order to decrease the value of optimal resistance R o, a parallel connection of several active elements or even parallel connection of whole amplifiers is advantageous [3]. Within the range of average detector resistances from 1 kw to 1 MW, the preamplifiers FET input stages can be used. However, for connection with high-resistance detectors (above 1 MW) especially recommended are the transistors of low I n values. Such requirements fulfil JFET and MOSFET transistors. 2. Noise models of first stages of photoreceivers There are two basic preamplifier structures voltage and transimpedance. The simplest preamplifier structure is the low input impedance voltage preamplifier. This design is usually implemented using a bipolar transistor configuration because of high input impedance of FETs. In the preamplifiers of low input impedance, the signal source is loaded with low impedance (e.g., 50 W). Time constant determines by a detector load resistance and input capacity of a preamplifier determines the band that can be matched to the signal band. However, preamplifiers of low input resistance can have wide transmission band but they do not ensure highly sensitive photoreceiver. The high impedance preamplifier gives a significant improvement in sensitivity over the low impedance preamplifier, but it requires considerable electronic frequency equalization to compensate its high-frequency roll-off and has problems of limited dynamic range. When highly sensitive photoreceiver of low dynamic range is needed, preamplifier of high input impedance is recommended. The transimpedance preamplifier finds wide applications in optical signals detection. The preamplifier gives low noise performance without the severe limitation on bandwidth imposed by high input impedance preamplifier. It also provides greater dynamic range than the high input impedance structure. It is possible to linearly process optical signals of the powers changing within the range of many orders of magnitude [4]. A noise equivalent circuit of the first stage of a photoreceiver with a voltage type preamplifier is shown in Fig. 2. The signal current generator I ph represents the detected signal. Noises in a detector (photodiode) are represented by three-noise generators: I nph is the shot noise originating from a photocurrent, I nd is the shot noise of a dark current, I nb is the shot noise from a background current. The load (bias) resistor R L affects both the detector signal and its noise. The noise current generator I nr is the thermal noise current and excess noise of the load resistance R L. Since the thermal noise of I nr is inversely related to the square root of the resistance, R L must be large. For the lowest-noise system, detector will be a dominant noise source. Expression for signal-to-noise ratio at the first stage of a photoreceiver with voltage type preamplifier results from the equation S N I ph = 2 2 2 2 4kTDf Vn Inph + Ind + Inb + In + + æ R è ç ö R ø 2 L L 2. (2) The numerator represents the photocurrent and the denominator represents the equivalent input noise of photodetector-preamplifier circuit. The first three components determine the noise originating from the photocurrent, the dark current and the background, the fourth component is the current noise of the preamplifier, the fifth is the thermal noise of the resistance R L and the last one is the voltage noise configuration of the preamplifier. High value of signal-to-noise ratio at the first stage of a photoreceiver with voltage type preamplifier can be ob- Fig. 2. Equivalent scheme of a photodetector-voltage type preamplifier circuit, C d is the detector capacity and R L is the resistance biasing detector, R i and C i are the input resistance and capacitance of the preamplifier, respectively. 130 Opto-Electron. Rev., 12, no. 1, 2004 2004 COSiW SEP, Warsaw

Contributed paper Fig. 3. Equivalent scheme of the first stage of a photoreceiver with transimpedance preamplifier (after Ref. 5). tained for the high resistances R L, low current noise I n and low voltage noise V n of a preamplifier. Of course, low influence of the fifth and sixth component in the equivalent input noise causes narrowing of photoreceiver bandwidth. Figure 3 presents noise equivalent scheme of the first stage of a photoreceiver with transimpedance preamplifier. In this circuit, noise sources of a detector are identical as for the case shown in Fig. 2 where R sh is the shunt resistance of a detector. Preamplifier noise is represented by the voltage source V n and the current source I n. Thermal noises from a feedback resistor are presented in form of the current source I nf. From the arrangement in Fig. 3 it can be shown that the equivalent input noise is the square root of the sum of squares of noise components from: the photocurrent I ph,the dark current of a detector I d, the background current I b, thermal noise of the resistor R f, and the current I n and voltage V n noise from a preamplifier. Thus, the signal-to-noise ratio is of the form S N I ph = 2 2 2 2 4kTDf V Inph + Ind + Inb + In + + æ R ç è R 2 f n f ö ø 2. (3) In a photoreceiver, using transimpedance preamplifier, an identical bandwidth can be obtained by choosing a feedback resistance R f, much higher than the resistance R = Rd RL Ri which would be possible in a simpler photoreceiver with a voltage type preamplifier. Thus, comparing Eqs. (2) and (3) it can be noticed that for the same bandwidth the signal-to-noise ratio is higher for transimpedance preamplifier than for a classic one. In practice, it means that transimpedance amplifiers can have wider bandwidths yet retain the low noise characteristics of high-impedance preamplifiers. 3. Readout electronics for focal plane arrays In the systems of thermal imaging, first single detectors and next arrays of small number of elements were used. In these devices, to each detector an adequate preamplifier was assigned that was out of imaging plane of an optical system. Such systems require complex scanning mechanisms. At present, second-generation imaging devices of the higher resolution and sensitivity are developed. These devices have several orders of magnitude more detectors selected electronically by means of a circuit integrated with detectors arrays. Signal multiplexing takes place in image plane of an optical system. In the literature, detector arrays with signal processing in image plane is called focal pane arrays (FPAs). The optics function of a device is limited only to image focusing at detectors arrays. Lack of mechanical searching ensures significant reduction of device dimensions. Two-dimensional arrays, apart of infrared radiation detection, play various functions connected with processing of signals from particular detection elements, i.e., signal integration, compensation of elements nonuniformity, subtraction of background signal, multiplexing and other. A number of architectures have been used in the development of IR FPAs. In general, they may be classified as hybrid and monolithic [6 9]. Hybrid FPAs detectors and multiplexers are fabricated on different substrates and matched with each other by flip-chip bonding or loophole interconnection. In this case, we can optimise the detector material and multiplexer independently. In flip-chip bonding, the detector array is typically connected by pressure contacts via indium bumps to the silicon multiplex pads. In the loophole interconnection, the detector and multiplexer chip are adhered together to form a single chip before detector fabrication. In the monolithic matrices, detection and signal processing occur in the structures produced in one semiconductor plate. An elementary cell of such an array is a structure of MIS type. Opto-Electron. Rev., 12, no. 1, 2004 Z. Bielecki 131

Readout electronics for optical detectors Fig. 4. Architecture of typical CCD imager (after Ref. 8). CCD technology is very mature in respect to both the fabrication yield and the attainment of near-theoretical sensitivity. Figure 4 shows the schematic circuit for a typical CCD imager. The photogenerated carriers are first integrated in an electronic well at the pixel a photogate and subsequently transferred to slow and fast CCD shift register. Then, the charge is converted to a voltage at a sense node. At the end of the CCD register, a charge carrying information on the received signal can be readout and converted into a useful signal. At present, in CCD devices the following readout techniques are used: floating diffusion amplifier in each pixel, system with correlated double sampling CDS, floating gate amplifier. The floating diffusion amplifier, a typical CCD output preamplifier, can be implemented in each unit cell as shown dotted box in Fig. 5. The unit cell with the floating diffusion amplifier consists of three transistors and the detector. Photocurrent is integrated onto the stray capacitance, which is the combined capacitance presented by the gate of the Fig. 5. Unit cell with floating diffusion amplifier (after Ref. 10). source follower T2, the interconnection, and the detector capacitance. The capacitance is reset to the voltage level V R by supplying the reset clock F R between successive integration frames. Integration of the signal charge makes the potential of the source follower input node lower. The source follower is active only when the transistor T3 is clocked. The drain current of the source follower T2 flows through the enable transistor T3 and load resistor outside the array. Figure 6 shows a preamplifier, in this example the source follower per detector (SFD), the output of which is connected to a clamp circuit. The output signal is initially sampled across the clamp capacitor during the onset of photon integration (after the detector is reset). The action of the clamp switch and capacitor subtracts any initial offset voltage from the output waveform. Because the initial sample is made before significant photon charge has been integrated by charging onto the capacitor, the final integrated photon signal swing is unaltered; however, any offset voltage or drift present at the beginning of integration is, by the action of the circuit subtracted, from the final value. This process of sampling each pixel twice, once at the beginning of the frame and again at the end, and providing the difference is called correlated double sampling CDS. The value of the initial CDS sample represents dc offsets, low frequency drift 1/f and high-frequency noise; this initial value is subtracted from the final value, which also includes dc offset, low-frequency drift, and high- frequency noise. Since the two samples occur within a short period of time, the dc and lower-frequency drift components of each sample do not change significantly; hence, these terms cancel in the subtraction process. The floating gate amplifier configuration is shown in Fig. 7. It consists of two MOSFET transistors, so-called, the source follower T2 and the zeroing transistor T1. The floating gate (reading gate) is in the same row as the CCD transfer gates. If a moving charge is under the gate, it causes a change in the gate s potential of the transistor of the gate T2. At the preamplifier output, a voltage signal ap- 132 Opto-Electron. Rev., 12, no. 1, 2004 2004 COSiW SEP, Warsaw

Contributed paper Fig. 6. Correlated double sampling circuit (after Ref. 2). pears. This manner of readout does not cause degradation or decay of a moving charge so the charge can be detected at many places. An amplifier, in which the same charge is sampled with several floating gates is called a floating diffusion amplifier. At present, revolutionary changes are observed in miniaturisation, price reduction, and improvement in image recording technique. Up to now, a significant role played CCD systems. Recently, the first competitive systems based on CMOS technology have been used. CCD converters have very well dynamic properties, low noise, and they are very sensitive. A drawback of these devices is significant current consumption and large size of devices. Also difficult is to deliver several various supply voltages required for proper work of a system. So, investigations of the sensors based on CMOS technology are still continued. Development of digital technology of signal processing, especially miniaturisation and costs reduction of CMOS converters production caused renewed interest in them for industrial applications. They have numerous virtues. First, continuous miniaturisation ensures smaller pixels and in result arrays of very high number of these elements. Second, CMOS systems are characterised by lower power consumption than CCD ones. A drawback of these systems is noise resulting from instability of a threshold point of switching of transistors connecting pixels with a data bus. Key to the development of ROICs has been the evolution in input preamplifier technology. This evolution has been driven by increased performance requirements and silicon processing technology improvements. A brief discussion of the various circuits is given below. The direct injection circuit (DI) was one of the first integrated readout preamplifiers for second generation detectors and has been used as an input to CCDs and visible imagers for many years. This readout configuration requires minimal area in the unit cell (< 20 20 µm 2 ). Photon current in DI circuits is injected, via the source of the input transistor, onto an integration capacitor (Fig. 8). As the photon current integrates [Fig. 8(b)], it charges the capacitor throughout the frame. Next a multiplexer reads out the final value and the capacitor is reset prior to the beginning of the frame. To reduce detector noise, it is important that a uniform, near-zero-voltage bias be maintained across all the detectors. Fig. 7. Floating gain amplifier circuit (after Ref. 10). Fig. 8. Direct injection readout circuit (after Ref. 12). Opto-Electron. Rev., 12, no. 1, 2004 Z. Bielecki 133

Readout electronics for optical detectors Fig. 9. Schematic of source-follower per detector unit cell. The feedback enhanced direct injection (FEDI) is similar to direct injection except that inverting amplifier is provided between the detector node and the input MOSFET gate (Fig. 8 dashed line). The inverting gain provides feedback to yield better control over the detector bias at different photocurrent levels. It can maintain a constant detector bias at medium and high backgrounds. The amplifier reduces the input impedance of the DI and therefore increases the injection efficiency and bandwidth. The minimum operating photon flux range of the FEDI is an order of magnitude below that of the DI, thus the response is linear over a larger range than the DI circuit. The combined source follower per detector (SFD) unit cell is shown in Fig. 9. The unit cell consists of an integration capacitance, the reset transistor T1 operated as a switch, the source-follower transistor T2, and selection transistor T3. The integration capacitance may just be the detector capacitance and transistor T2 input capacitance. The integration capacitance is reset to the reference voltage V R by pulsing the reset transistor. The photocurrent is then integrated on the capacitance during the integration period. The ramping input voltage of the SFD is buffered by the source follower and then multiplexed, via the T3 switch, to a common bus prior to the video output buffer. After the multiplexer read cycle, the input node is reset and the integration cycle begins again. The switch must have very low current leakage characteristics when in the open state or this will add to the photocurrent signal. The dynamic range of the SFD is limited by the current voltage characteristics of the detector. As the signal is integrated, the detector bias changes with time and incident light level. The SFD has low noise for low bandwidth applications such as astronomy and still has acceptable signal-to-noise at very low backgrounds. It is nonlinear at medium and high backgrounds, e.g., a few photons per pixel per 100 ms. It is nonlinear at medium and high backgrounds, resulting in a limited dynamic range. The gain is set by the detector responsivity and source-follower input capacitance. The major noise source are the ktc noise (resulting from resetting the detector), MOSFET channel thermal and MOSFET 1/f noise. The capacitor feedback transimpedance amplifier (CTIA) is a reset integrator and addresses broad range of detector interface and performance requirements across Fig. 10. Schematic of a capacitive transimpedance amplifier unit cell. 134 Opto-Electron. Rev., 12, no. 1, 2004 2004 COSiW SEP, Warsaw

Contributed paper Fig. 11. Resistor load gate modulation (a), current mirror gate modulation (b). many applications. The CTIA consists of an inverting amplifier with a gain of K u, the integration capacitance C f placed in a feedback loop, and the reset switch K (Fig. 10). Photon charge causes a slight change in a voltage on the inverting input node of an amplifier. The amplifier responds with a sharp reduction in output voltage. As detector current accumulates over the frame time, this results in a ramp at the output. At the end of integration, the output voltage is sampled and multiplexed to the output. Since the output impedance of the amplifier is low, the integration capacitance can be made extremely small, yielding low noise performance. The feedback integration capacitor sets the gain. The switch K is cyclically closed to achieve reset. The CTIA provides low input impedance, stable detector bias, high gain, high frequency response and a high photon current injection efficiency. It has very low noise from low to high backgrounds. The resistor load gate modulation circuit (RL) is shown in Fig. 11. It was introduced to extend SFD performance to high irradiance backgrounds and dark currents. This circuit uses photon current to modulate the gate voltage and thereby induce an output current in the MOSFET. The drain current of the MOSFET transistor accumulates onto an integration capacitor. In high background irradiance, this circuit provides a design that can reject much of these background components. When the background alone is present on the detector, the bias on the detector or the load resistor can be adjusted for negligible drain current or integration of a charge. As the signal is applied, the transistor drain current increases exponentially with photon current and thereby allows some level of background flux rejection. The load resistor is designed for low 1/f noise, high temperature stability, and uniformity from cell to cell. The current mirror gate modulation (CM), see Fig. 11(b), extends readouts to the very high backgrounds. In this current mirror preamplifier, the MOSFET replaces the resistor of the RL circuit. The photon current flowing into the drain of the first of two closely matched transistors includes a common gate to source voltage change in both transistors. This results in a similar current in the second transistor. If the source voltage, V s and V ss, of the two matched transistors are connected, both will have the same gate to source voltages which will induce a current in the output transistor identical to the detector current flowing through the input transistor. In this circuit, the integration current is a linear function of a detector current. This CM interfaces easily to direct access or CCD multiplexers and has low unit cell area requirements. The CM circuit requires gain and offset corrections for most applications. The advantage over the RL circuit includes greater linearity and absence of a load resistor. 4. Examples of preamplifiers and experimental results Many problems have to be overcome during construction of low-noise preamplifier for low-resistance detectors (e.g., HgCdTe of resistance below 100 W). It is due to the fact that the detectors of resistance of the order of 20 W produce the noise voltage lower than 0.6 nv/hz 1/2, i.e., below the noise voltage generated in the best (available) amplifying elements [1]. So, the question arises; it is possible to build a preamplifier of noise voltage below a detector noise? It appears that it can be achieved when several identical preamplifiers are connected in parallel and next the output signals are added. Such a system of signal processing ensures reduction of final input noise according to the relationship V n total -1/ 2 = V n, (5) where V n is the noise voltage of a single preamplifier and n is the number of amplifying stages. Figure 12 presents a diagram of low noise preamplifier that is recommended for amplification of the signals received from low-resistance IR detectors. Low noise inte- n Opto-Electron. Rev., 12, no. 1, 2004 Z. Bielecki 135

Readout electronics for optical detectors Fig. 12. Preamplifier for low-resistance infrared detectors. grated circuit AD797 type were used at the input stage of an preamplifier. This preamplifier can be applied both for photodiodes and photoresistors. When a photoresistor is connected, the polarising resistor R L is required. For this system the noise voltage about 0.32 nv/hz 1/2 at f = 100 Hz was obtained (for n =9). For amplification of the signals from detectors of resistances of above 10 MW, the most frequently used are voltage and transimpedance amplifiers. The basic idea of increase in input impedance of preamplifier is reduction of thermal noises. However, the high resistances R L cause narrowing of a band of the input stage of a photoreceiver. A preamplifier of high input impedance is significant load resistance for a detector so it does not ensure wide range of signal changes. The problem of serious changes of a signal has been solved in transimpedance preamplifiers. For amplification of the signals from high-resistance detectors, the system was used the simplified scheme of which is shown in Fig. 13. Fig. 13. Preamplifier for high-resistance detectors. 136 Opto-Electron. Rev., 12, no. 1, 2004 2004 COSiW SEP, Warsaw

Contributed paper An integrated circuit of AD 795 type was used in the preamplifier. The received input noise current was 0.6 fa/hz 1/2 at f = 30 Hz. This preamplifier was used for amplification of the signals from UV GaN detectors. Investigations of noise of the designed system used for signal processing were carried out with Stanford Research Lock-In SR 830 amplifier. 5. Conclusions This paper summarises the major issues associated with readout electronics for the first- and second-generation optical detectors. General requirements for IR FPA readout electronics were discussed. The preamplifiers for single detectors and matrices: source-follower per detector, direct injection, buffered direct injection, gate modulation input, capacitive transimpedance amplifier circuit, and other have been reviewed. An analysis of noise models of photodetector preamplifier systems was carried out. Special attention has been paid to ensure maximum signal-to-noise ratio in a wide range of a detectors resistance. These models of preamplifiers, for extremely low resistance and high resistance for single detectors, are placed in an integrated housing which provides effective EMI shielding. Our preamplifiers are individually optimised to work with optical detectors. They can be used with many types of detectors available commercially. References 1. C.D. Motchenbacher and J.A. Connelly, Low-noise Electronic System Design, John Wiley & Sons, Inc., New York, 1995. 2. J.L. Vampola, Readout electronics for infrared sensors, in The Infrared and Electro-Optical Systems Handbook, Ch. 3, edited by W.D. Rogatto, Billingham, Washington, 1993. 3. Z. Bielecki, Proc. GAAS 11 th European Gallium Arsenide & other Compound Semiconductors Application Symposium, Munich, 137 140 (2002). 4. G.H. Rieke, Detection of Light: from Ultraviolet to the Submillimeter, Cambridge University Press, 1994. 5. Z. Bielecki, Maximisation of signal to noise ratio in infrared radiation receivers, Opto-Electron. Rev. 10, 209 216 (2002). 6. A. Rogalski, Infrared detectors at the beginning of the next millennium, Sensors and Materials 12, 233 288 (2000). 7. A. Rogalski, Infrared Detectors, Gordon and Breach Science Publishers, Amsterdam, 2000. 8. L.J. Kozlowski, J. Montroy, K. Vural, and W.E. Kleinhans, Ultra-low noise infrared focal plane array status, Proc. SPIE 3436, 162 171 (1998). 9. L. Kozlowski, K. Vural, J. Luo, A. Tomasini, T. Liu, and W.K. Kleinhans, Low-noise infrared and visible focal plane arrays, Opto-Electron. Rev. 7, 259 269 (1999). 10. RCA Electro-Optics Handbook, New Jersey, 1974. 11. E.L. Dereniak and D.G. Crowe, Optical Radiation Detectors, Wiley & Sons, New York, 1984. 12. M.J. Hewitt, J.L. Vampola, S.H. Black, and C.J. Nielsen, Infrared readout electronics: a historical perspective, Proc. SPIE 2226, 108 119 (1994). Opto-Electron. Rev., 12, no. 1, 2004 Z. Bielecki 137

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