Study and Design of a Voltage Line Conditioner with Serial Compensation and Fed by Load Side

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Federal University of Santa Catarina - UFSC Post-graduation in Electrical Engineering - PPGEEL Power Electronics Institute - INEP Master Thesis Presentation: Study and Design of a Voltage Line Conditioner with Serial Compensation and Fed by Load Side Eng. MSc Thiago Batista Soeiro July, 2007

Presentation Contents Introduction Voltage Line Conditioner: Power Stage Voltage Line Conditioner: Control Stage Experimental Results Conclusions

Motivations 1- The increase of voltage-sensitive equipments results in greater demand for high-quality voltage sources; 2- The existence of standards limiting the harmonic pollution in electric power system; 3- To aid the national industries in the development of high-quality voltage sources.

Main Objectives 1- To study concepts and topologies of voltage line conditioners; 2- To establish general voltage compensation methods to be applied in voltage line conditioners; 3- To evaluate the performance of the topology proposed under unbalanced and distorted system voltages; 4- To study and formulate control techniques to provide the conditioning of the load voltage 5- To develop and test a voltage line conditioner prototype to validate the analysis.

Important Concepts The Studied Topology was based on two concepts: ZL d i o The Principle of Serial Voltage Compensation,, applied in Stabilizers in 1950 by Patchett v i vri v ( v, i, d) o i o v r v ds Rectifier L o C o Indirect ac-ac Converter with Direct link presented by Bong- Hwan Kwon in 2002 S 1 S 2 v ri S 3 S 4 S 5 S 6 a S 7 S 8 b v dp v ri Inverter

Important Concepts The Voltage Line Conditioner Operation Principle: v i vds = vds = vdsf vdsh io = if ih Z S v i vi = vf vh vri

Voltage Line Conditioner Generalization of Serial Voltage Conditioners: The Serial Voltage Compensation: Δ v Transf.. Filter Δ v v i CA-CA ca ca Inversor Carga i v ca ca Carga Direct Compensation

Voltage Line Conditioner Δ v Filter by the load side Δ v i v CA-CA ca ca Inversor Carga i v CA-CA ca ca Inversor Carga Transf.. Filter

Voltage Line Conditioner Feeding the ac-ac Converter: v i Compensador CA-CA série Inversor Carga v i By the Load Side Compensador CA-CA série Inversor Carga By the Line Side

Voltage Line Conditioner Compensador CA-CA série Inversor v i v aux Carga Auxiliary Source

Voltage Line Conditioner ac-ac Converter Isolation: vds v i T 1 v f Converter ac ac Inverter L o C o By the Rectifier side vds By the inverter side v i v f Converter CA-CA ac ac Retificador Inverter Inversor T 1 L o C o

Voltage Line Conditioner Conditioner Topologies: vds vds v i v f Converter CA-CA ac ac Retificador Inverter Inversor T 1 L o C o v i v f Converter CA-CA ac ac Inversor Inverter Retificador L o C o T 1 vds vds v i T 1 v f Converter ac ac Inverter L o C o v i v f Converter CA-CA ac ac Inversor Inverter Retificador L o T 1 C o Fed by the line side

Voltage Line Conditioner Conditioner Topologies: vds vds v i T 1 L o Converter CA-CA ac ac Inversor Inverter Retificador v f C o v i C o T 1 L o Converter CA-CA ac ac Inversor Inverter Retificador v f vds vds v i C o L o T 1 Converter CA-CA ac ac Inversor Inverter Retificador v f v i C o L o Converter CA-CA ac ac Inversor Inverter Retificador v f T 1 Fed by the load side

Voltage Line Conditioner Conditioner Topologies: vds vds vi v f Converter CA-CA ac ac Inversor Inverter Retificador L o T 1 C o v i v f Converter CA-CA ac ac Retificador Inverter Inversor T 1 L o C o vds vds v i v f Converter CA-CA ac ac Inversor Inverter Retificador L o C o T 1 v i T 1 v f Converter CA-CA ac ac Retificador Inverter Inversor L o C o Fed by an auxiliary source

Voltage Line Conditioner: Power Stage vds L S L ds T 1 i o L o S 5 S 7 S 3 S 1 v i i Lo a b v r C o S 6 S 8 S 4 S 2 Inverter Rectifier

Modulation Strategy v () t 0 PWM Inverter (S 5 -S 8 ) S () t 1,4 S () t 2,3 v () t r 0 Tr 2 Tr t Bidirectional Rectifier (S 1 -S 4 )

0 π 2π 0 π 2π Main Waveforms v i Adding voltage Rectifier input voltage Subtracting voltage Rectifier input voltage 3 Level PWM Modulation v g1,4 v g 2,3 Rectifier v r v c v ab Inverter v ds 0 T d s 2 T s 2 v i t t

Main Analytical Expression () g t N = N N d() t 1 = d t Δ () Converter s Static Gain Transformation ratio Δ I = Leq ( ) () ( ) V d t d t 0 1 2 N f L s eq Current ripple ( 2 ( )) o ( ) 1 ( ) () ( ) ( ) ( ) ΔILeq N d t I d t d t Δ VCo = 16 N f C 4 f C ΔI N d t N 1 S o S o Leq Voltage ripple

Voltage Line Conditioner: Control Stage RS LS LdP Rede de Energia vt () i S 5 S 6 S 7 S 8 S 3 S 4 S 1 S 2 C 0 Carga vt () 0 Comando S S 1 2 S3 S4 Sensor de Tensão v Srr v Srr S5 S 6 S7 S 8 Modulador C(s) v _ ref Modulador Compensador de Tensão

Mathematical Model Small signals model: G(s), Transfer Function of output voltage vs. duty cycle; F(s), Transfer Function of output voltage vs. input voltage. ( ) G s ( ) F s v o = = d v o = = v i ( ) = ( ) ( ) ( ) ( ) v s F s v s G s d s 0 i 2 s Leq N Vo L ( ) Z N D o ( ) V N D 2 s L 2 2 eq N s Leq Co N N D ZL N N D ( ) L ( ) 2 s L 2 2 eq N s Leq Co N N D Z ( ) 2 2

Conditioner Analytical Study Load Influence over circuit s s dynamic response:

Conditioner Analytical Study There are some strategies to damp the voltage oscillation or compensate the absence of load: To damp voltage oscillation with virtual resistance control strategy; tegy; To insert a control loop to compensate abrupt voltage drop; To insert input filter topologies;

Virtual Resistance Line conditioner Block Diagram: N R V 0 G Virtual PWM N D N Vc( s) ˆd vˆleq V o 1 iˆco 1 G ˆd PWM ˆv 0 N s L sc eq 0 vˆi R Virtual iˆleq D N î 0 Z L V o ( ND)

Converter Control RS LS LdP T Rede de Energia vt () i S 5 S 6 b D 5 D 6 S 7 S 8 a D 7 S 3 S 4 D 3 D8 D4 S 1 S 2 D 1 D2 C 0 Carga vt () 0 Sensor de Corrente Comando S S 1 2 S3 S4 Sensor de Tensão v Srr v Srr S5 S 6 S7 S 8 Modulador C Rv( s) Modulador C(s) v Compensador de Tensão _ ref Compensador de Rvirtual I() c s

Experimental Results Prototype [ ] V = 220± 20% V i V o = S o = F r = F S = N = 4 Leq Co = 220[ V] 10[ kva] 60[ Hz] 20[ khz] [ μ ] [ μ ] 340 H 20 F

Control Signals

ac-ac converter voltage signals Rectifier Inverter

Operation with Load Transient Without Virtual Resistance Control Loop With Virtual Resistance Control Loop 50% Load Transient

Operation with input Transient 20% transient in input voltage Vi(t):

Operation with input Transient -20% transient in input voltage Vi(t): ):.

Operation with input Transient THD correction:

Nonlinear load Operation The greatest requirements in terms of dynamic response. 100 μh 10Ω 10mF

Conclusions Experimental Results: The control strategy was efficient with instantaneous correction of the output voltage when faced with input voltage and load variations; Capability of supplying an output voltage with low harmonic distortion; When presented with the worst case scenario, a nonlinear load, the conditioner studied was able to correct the THD to fit the required standards of 5% (IEEE519/92);

Conclusions Contributions: A generalization of serial line conditioners was presented through 12 possible topologies; This work focused on the study of a serial line conditioner with an ac-ac indirect converter with direct link, fed by load side. The capacitive filter was positioned on the load side to make use of the line impedance as a multi-functional filter; A control strategy was introduced to efficiently stabilize the output voltage of the studied structure;.

Conclusions Future works: Study of three-phase voltage line conditioners: - Space vector Modulation; - Digital Control and Nonlinear Control Techniques; - Study of Rectifier control techniques; - Study of combined series and shunt active power filters for simultaneous compensation of voltage and current; - Hybrid and Matrix Converters;

The End