Research Note THREE PHASE ON-LINE UPS BY IMPLEMENTING T-SOURCE INVERTER WITH MAXIMUM CONSTANT BOOST PWM CONTROL *

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IJS, ransactions of Electrical Engineering, ol 39, No E2, pp 29-215 Printed in he Islamic Republic of Iran, 215 Shiraz University Research Note HREE PHASE ON-LINE UPS BY IMPLEMENING -SOURE INERER WIH MAXIMUM ONSAN BOOS PWM ONROL * KHIRA ** AND A JEEANANDHAM Deptof EEE, Bannari Amman Institute of echnology, Sathyamangalam, amilnadu, India Email: chitrak@bitsathyacin Abstract his paper presents the new topology of three phase on line Uninterruptible Power Supply (UPS) by employing -Source Inverter (SI) with maximum constant boost Pulse Width Modulation (PWM) control and the results are compared with the conventional Uninterruptible Power Supply (UPS) he conventional UPS consists of oltage Source Inverter (SI) with step up transformer or D-D booster which decreases the efficiency and increases energy conversion cost he proposed three phase UPS with SI has the voltage boost capability through through zero state which is not present in the conventional SI his proposed UPS increases the efficiency due to single stage conversion, reduces the harmonics, increases the voltage gain and reduces the voltage stress he performance of the three phase on-line UPS with SI is simulated in MALAB / SIMULINK software and the results are compared with conventional UPS he simulation and the theoretical analysis are validated with experimental results Keywords On-line UPS, -Source Inverter, maximum constant boost, boost factor 1 INRODUION he purpose of implementing uninterruptible power supply (UPS) is to provide clean and uninterrupted high quality power to sensitive loads like life supporting systems, medical instruments, communication systems, data centers, industrial control units and computers [1-3] Regardless of quality of the A input, UPS system provides uninterrupted, reliable, distortion free, high quality power [4] here are two types of conventional UPS he first type of UPS consists of rectifier, battery, inverter and step up transformer [5] he second type of UPS consists of rectifier, battery, D-D booster and inverter [6-8] he control of switches in the booster circuit is complicated, efficiency is decreased and cost is increased due to the equipment used for increasing the voltage onventional SI can only buck the input voltage In SI, the switches in the same lag are not switched on simultaneously, hence to avoid through the dead time is introduced which leads to waveform distortion [9] Professor Zhi Jian Zhou in 28 [1] proposed Z-source inverter for the single phase UPS his method offers the following advantages: 1) buck- boost operation 2) step up transformer and dc-dc booster is not required 3) output voltage distortion is less But in ZSI the voltage stress in the switches is high and more L& components are used hese drawbacks are eliminated in SI In this paper a new topology of UPS is proposed using -Source inverter with maximum constant boost PWM control he proposed UPS offers the following advantages: 1) Buck and boost operation 2) Less HD 3) oltage stress is minimized 4) Fewer omponents 5) High efficiency he overall circuit diagram for the three phase on-line UPS with -Source inverter is shown in Fig 1 Received by the editors February 11, 214; Accepted August 4, 215 orresponding author

21 K hitra and A Jeevanandham D 3 Phase A Supply A A D1 D3 D5 Battery S1 S3 S5 IIR Rl Ll R ILR input D IIY Rl Ll Y ILY 3 Phase Load IIB Rl Ll B ILB A IB D4 D6 D2 S4 S6 S2 IY IR l l l S1 S2 S3 S4 S5 S6 Maximum onstant Boost PWM Pulse Generation AB / dq AB / dq dq / AB P P PI PI qref dref Fig 1 -source inverter for the proposed UPS 2 MODELING OF SI IRUI D-D input stage in boost type voltage source inverter is replaced by X shape L network in ZSI [11-12] o reduce the number of L components, the coupled inductors are designed on a common magnetic core [13] In SI high frequency low leakage inductance transformer and one capacitor is used instead of L lattice in ZSI, which is shown in Fig 1 a) Operating modes of SI -Source inverter utilizes the through zero state to boost the output voltage During through state, switches in the same leg are turned on simultaneously SI can be operated in two operating modes, namely active mode and through mode [13] Active mode is also called non through mode During active mode the input voltage appears across the capacitor and the diode is forward biased and conducts During through mode the output voltage is boosted and the inductor limits the current ripple and the voltage across the load is zero he SI equivalent circuits during through mode and active mode are shown in Fig 2a and 2b D L I in I in N c out= D c - input L ( c - input )/n out = D I out input I out input c c (a) (b) Fig 2 -Source inverter in (a) Shoot through ( ) state (b) active ( active ) state b) Boost factor and voltage stress of SI Switching period s = active (1) IJS, ransactions of Electrical Engineering, olume 39, Number E2 December 215

hree phase on-line ups by implementing -source inverter 211 : Shoot through time period active : Active time period For the switching period s the average voltage across the transformer inductances is zero [13] L active input - n he capacitor voltage and output voltage are functions of through duty ratio d d s (3) 1 input active active n 1 d 1 n 1 d ; d n 1 he maximum value of d for SI with n > 1 is smaller than the ZSI Hence the same output voltage can be obtained with smaller through time period [13] Using (5), D during non through state can be obtained By substituting (4) into (5) where D input n input / 1 n 1 d (5) B s D input input active B active he output peak voltage of the inverter is given by, s 1 1 2 s M = MB (8) ac dc input From (8), the voltage gain of the -Source inverter can be expressed as G ac MB (9) hus, any desired output voltage can be obtained by properly selecting the boost factor (B) and the modulation index (M) regardless of the battery bank voltage he voltage stress stress across the switches in SI can be expressed as [14-16] input stress input (2) (4) (6) (7) B (1) 3 MAXIMUM ONSAN BOOS PWM ONROL In this paper maximum constant boost control method is used for the SI, which gives the maximum voltage gain by keeping the through duty ratio constant he through duty ratio is maintained as constant in order to reduce the cost and volume [17-18] o reduce the voltage stress across the switches a great voltage boost is desired for any modulation index he reference signals R, Y, B which are obtained from the closed loop controller are compared with carrier signal tri and the through is December 215 IJS, ransactions of Electrical Engineering, olume 39, Number E2

212 K hitra and A Jeevanandham produced by two through envelope signals pos and neg he inverter is in through state when the carrier wave is greater than the upper through envelope pos ( tri > pos ) or the carrier wave is lower than the lower through envelope neg ( tri < neg ) [17] he signals pos and neg are periodical curves and the frequency is three times the output frequency he through duty ratio should be the same for the switching cycle in order to maintain a constant boost, because the boost factor depends on through duty ratio (d) his proposed control method provides the maximum constant boost and minimizes the voltage stress 4 LOSED LOOP ONROLLER FOR PROPOSED UPS losed loop controller is designed to achieve distortion free output voltage, voltage tracking and disturbance rejection [19-2] In the proposed UPS system shown in Fig 1, the output ac voltage is controlled by varying the modulation index M he voltage and current equations for inverter ac side is obtained using Kirchoff s voltage law and current law for each phase here are two control loops in the proposed UPS hey are inner current control loop and outer voltage control loop [2] apacitor current measurement is taken as the feedback current and load current is taken as disturbance current he proportional controller is included to obtain the desired bandwidth he outer voltage control loop is used to achieve proper voltage tracking PI controller which is connected in series is to remove the steady state error and to get good reference tracking and disturbance rejection [21] 5 RESULS AND DISUSSION he proposed SI for 3 phase on line UPS with maximum constant boost control technique was simulated using MALAB/simulink software wenty 12 lead acid batteries are connected in series in this UPS, so the input battery bank voltage is 24 he operating parameters given in able 1 were chosen for the simulation of the proposed UPS able 1 Operating Parameters of the proposed UPS Input D voltage Parameter -Source inductance -Source capacitance Switching frequency 24 1 mh 48 μf 5 khz Power factor 8 Load 5 kw Boost factor 18 Modulation index 8 alue Figure 3 shows the maximum constant boost PWM control and the switching pulses for the switches in SI Figures 4a and 4b show the output phase voltage (peak-peak) and the output phase current (peakpeak) with filter he peak value of output phase voltage of the proposed UPS is 33 and the output frequency is 5 HZ he peak value of output phase current of the proposed UPS is 14 A he output voltage HD and current HD is less than 1% IJS, ransactions of Electrical Engineering, olume 39, Number E2 December 215

oltage Magnitude hree phase on-line ups by implementing -source inverter 213 4 Maximum onstant Boost Pulse Generation R Y B pos arrier Signal tri 2-2 neg -4 1 ime (Sec) 2 Fig 3 Maximum constant boost control and Switching Pulses 5 Output Phase oltage with Filter 2 Output Phase urrent with Filter (A) -5 5 a (olts) -5 5 b (olts) -5 5 c (olts) -5 5 1 15 ime (Sec) 2 (a) -2 2 Ia (A) -2 2 Ib (A) -2 2-2 5 1 15 2 ime (Sec) Fig 4 (a) Output Phase oltage (Peak-Peak) (b) Output Phase urrent (Peak-Peak) Experiment was conducted to verify the theoretical and simulation analysis and confirm the proposed UPS Figure 5a shows the experimental setup of the proposed UPS Figure 6a shows the experimental waveform of output RMS phase voltage of the proposed UPS From the figure it is evident that the output voltage of the proposed UPS follows pure sine wave and harmonics are reduced Figure 6b shows the output RMS phase current of the proposed UPS Ic (A) (b) December 215 IJS, ransactions of Electrical Engineering, olume 39, Number E2

214 K hitra and A Jeevanandham Fig 5 (a) Experimental setup of the proposed UPS (b) Output voltage HD comparison (a) (b) Fig 6 Experimental waveforms of (a) output RMS phase voltage (b) Output RMS phase current he proposed UPS is efficient when compared to the traditional UPS because of its single stage conversion and fewer components From the Fig 5b it is evident that the output voltage HD of proposed UPS with SI is less than the traditional UPS his increases the power quality of the proposed UPS 6 ONLUSION In this paper, a new topology of three phase on-line UPS with SI has been presented he simulation of the proposed UPS is carried out for different loading conditions and the results are validated with experimental results he comparison of proposed UPS with SI is done based on power quality, efficiency and cost efficiency with the traditional UPS based on step up transformer, dc-dc booster and ZSI he output voltage HD and current HD of the proposed UPS are less than the traditional UPS he conduction losses in the switches and also the voltage stress are reduced in this proposed UPS he efficiency of the proposed UPS with -Source inverter based on maximum constant boost control is higher than the traditional UPS REFERENES 1 Emadi, A, Nasiri, A & Bekiarov, S B (25) Uninterruptible power supplies and active filters R Press 2 Racine, M S, Parham, J D & Rashid, M H (25) An overview of uninterruptible power supplies Annual North American 25 Power Symposium; 23 25, pp 159 164 3 Guerrero, J M, Garcia de icuna, L & Uceda, J (27) Uninterruptible power supply systems provide protection IEEE Industrial Electronics, ol 1, pp 28 38 4 Ashrafi, B, Niroomand, M & Ashrafi Nia, B (212) Novel reduced parts on-line uninterruptible power supply IEEE 212 International Power Engineering and Optimization onference, pp 252-257 IJS, ransactions of Electrical Engineering, olume 39, Number E2 December 215

hree phase on-line ups by implementing -source inverter 215 5 Jain, P K, Espinoza, J R & Jin, H (1998) Performance of a single-stage UPS system for single-phase trapezoidal shaped A voltage supplies IEEE rans Power Electron, ol 13, pp 912 923 6 Brancol, G, ruz, M, orrico Bascope, R P, Antunes, F L M & Barreto, L H S (26) A transformerless single phase on line UPS with 11/22 input output voltage IEEE 26 Applied Power Electronics onference, pp 348 354 7 Park, J K, Kwon, J M, Kim, E H & Kwon, B H (28) High performance transformer less online UPS IEEE rans Ind Electron, ol 55, 2943-2953 8 Lai, H & zou, Y Y (22) DSP embedded UPS controller for high performance single phase on line UPS systems IEEE 22 Industrial Electronics onference, pp 268 273 9 Kawamura, R & huarayapratip Haneysoshi, (1988) Deadbeat control of PWM inverter with modified pulse patterns for uninterruptible power supply IEEE rans Ind Electron, ol 35, pp 295 3 1 Zhou, Z J, Zhang, X, Xu, P & Shen, W X (28) Single-phase uninterruptible power supply based on Z- source inverter IEEE rans Ind Electron, ol 55, pp 2997 34 11 Peng, F Z (23) Z-source inverter IEEE rans Ind Appl, ol 39, pp 54 51 12 Peng, F Z (28) Z-source networks for power conversion IEEE Applied Power Electronics onference, pp 1258-1265 13 Strzelecki, R, Adamowicz, M, Strzelecka, N & Bury, B (29) New type -Source inverter IEEE Power Electronics onference, pp 191-195 14 Qian, W & Peng, F Z (211) rans-z-source Inverters IEEE rans Power Electronics, ol 26, pp 3453-3463 15 Ding, L I, hiang Loh, P, Zhu, M (213) ascaded multicell rans-z-source inverters IEEE rans Power Electronics, ol 28, pp 826-836 16 Shen, M, Joseph, A, Peng, F Z, Leon, M & Adams, D J (26) onstant boost control of the Z-source inverter to minimize current ripple and voltage stress IEEE rans Ind Appl, ol 42, pp 77-778 17 Peng, F Z, Shen, M & Qian, Z (25) Maximum boost control of the Z-source inverter IEEE rans Power Electron, ol 2, pp 833 838 18 Loh, P H, ilathgamuwa, D M, Lai, Y S, hua, G & Li, Y W (25) Pulse width modulation of Z- source inverters IEEE rans Power Electron, ol 2, pp 1346-1355 19 ran, Q & hun, W (27) Algorithms for controlling both the D boost and A output voltage of Z- source inverter IEEE rans Ind Electron, ol 54, pp 2745-275 2 Gajanayake, J, ilathgamuwa, D M & Loh, P (26) Modeling and design of multi-loop closed loop controller for Z-source inverter for distributed generation IEEE Power Electronics onference, pp 1353 1359 21 Hasanzadeh, A & Mokhtari, H (29) A simplified droop method implementation in parallel UPS inverters with proportional-resonant controller Iranian Journal of Science and echnology, ransactions of Electrical Engineering 29; 33: 163-178 December 215 IJS, ransactions of Electrical Engineering, olume 39, Number E2