FQD13N06 N-Channel QFET MOSFET

FQD13N06 N-Channel QFET MOSFET 60 V, 10 A, 140 mω Description This N-Channel enhancement mode power MOSFET is produced using Fairchild Semiconductor s proprietary planar stripe and DMOS technology. This advanced MOSFET technology has been especially tailored to reduce on-state resistance, and to provide superior switching performance and high avalanche energy strength. These devices are suitable for switched mode power supplies, active power factor correction (PFC), and electronic lamp ballasts. Features November 013 10 A, 60 V, R DS(on) = 140 mω (Max.) @ = 10 V, I D = 5.0 A Low Gate Charge (Typ. 5.8 nc) Low Crss (Typ. 15 pf) 100% Avalanche Tested D D G S D-PAK G S Absolute Maximum Ratings T C = 5 C unless otherwise noted. Symbol Parameter FQD13N06TM Unit S Drain-Source Voltage 60 V I D Drain Current - Continuous (T C = 5 C) 10 A Thermal Characteristics - Continuous (T C = 100 C) 6.3 A I DM Drain Current - Pulsed (Note 1) 40 A S Gate-Source Voltage ± 5 V E AS Single Pulsed Avalanche Energy (Note ) 85 mj I AR Avalanche Current (Note 1) 10 A E AR Repetitive Avalanche Energy (Note 1).8 mj dv/dt Peak Diode Recovery dv/dt (Note 3) 7.0 V/ns P D Power Dissipation (T A = 5 C) *.5 W Power Dissipation (T C = 5 C) 8 W - Derate above 5 C 0. W/ C T J, T STG Operating and Storage Temperature Range -55 to +150 C T L Maximum lead temperature for soldering, 1/8" from case for 5 seconds 300 C Symbol Parameter FQD13N06TM Unit R JC Thermal Resistance, Junction to Case, Max. 4.5 R JA Thermal Resistance, Junction to Ambient (Minimum Pad of -oz Copper), Max. 110 Thermal Resistance, Junction to Ambient (*1 in Pad of -oz Copper), Max. 50 o C/W 1

Package Marking and Ordering Information Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity FQD13N06TM FQD13N06 DPAK Tape and Reel 330 mm 16 mm 500 units Electrical Characteristics T C = 5 C unless otherwise noted. Symbol Parameter Test Conditions Min. Typ. Max. Unit Off Characteristics BS Drain-Source Breakdown Voltage = 0 V, I D = 50 µa 60 -- -- V Breakdown Voltage Temperature BS / T J Coefficient I DSS Zero Gate Voltage Drain Current I D = 50 µa, Referenced to 5 C -- 0.06 -- V/ C = 60 V, = 0 V -- -- 1 µa = 48 V, T C = 15 C -- -- 10 µa I GSSF Gate-Body Leakage Current, Forward = 5 V, = 0 V -- -- 100 na I GSSR Gate-Body Leakage Current, Reverse = -5 V, = 0 V -- -- -100 na On Characteristics (th) Gate Threshold Voltage =, I D = 50 µa.0 -- 4.0 V R DS(on) Static Drain-Source On-Resistance = 10 V, I D = 5.0 A -- 0.11 0.14 Ω g FS Forward Transconductance = 5 V, I D = 5.0 A -- 4.9 -- S Dynamic Characteristics C iss Input Capacitance = 5 V, = 0 V, -- 40 310 pf C oss Output Capacitance f = 1.0 MHz -- 90 10 pf C rss Reverse Transfer Capacitance -- 15 0 pf Switching Characteristics t d(on) Turn-On Delay Time -- 5 0 ns = 30 V, I D = 6.5 A, t r Turn-On Rise Time R G = 5 Ω -- 5 60 ns t d(off) Turn-Off Delay Time -- 8 5 ns t f Turn-Off Fall Time (Note 4) -- 15 40 ns Q g Total Gate Charge = 48 V, I D = 13 A, -- 5.8 7.5 nc Q gs Gate-Source Charge = 10 V --.0 -- nc Q gd Gate-Drain Charge (N ote 4) --.5 -- nc Drain-Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Drain-Source Diode Forward Current -- -- 10 A I SM Maximum Pulsed Drain-Source Diode Forward Current -- -- 40 A V SD Drain-Source Diode Forward Voltage = 0 V, I S = 10 A -- -- 1.5 V t rr Reverse Recovery Time = 0 V, I S = 13 A, -- 39 -- ns Q rr Reverse Recovery Charge di F / dt = 100 A/µs -- 40 -- nc Notes: 1. Repetitive rating : pulse-width limited by maximum junction temperature.. L = 990 µh, I AS = 10 A, = 5 V, R G = 5 Ω, starting T J = 5 C. 3. I SD 13 A, di/dt 300 A/us, BS, starting T J = 5 C. 4. Essentially independent of operating temperature.

Typical Characteristics I D, Drain Current [A] 10 1 10 0 10-1 Top : 15.0 V 10.0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V 1. 50μ s Pulse Test. T C = 5 10-1 10 0 10 1, Drain-Source Voltage [V] Figure 1. On-Region Characteristics I D, Drain Current [A] 10 1 10 0 150 5-55 10-1 4 6 8 10, Gate-Source Voltage [V] 1. = 5V. 50μ s Pulse Test Figure. Transfer Characteristics 500 R DS(ON) [mω ], Drain-Source On-Resistance 400 300 00 100 = 10V = 0V Note : T J = 5 0 0 10 0 30 40 I D, Drain Current [A] I DR, Reverse Drain Current [A] 10 1 150 5 1. = 0V. 50μ s Pulse Test 10 0 0. 0.4 0.6 0.8 1.0 1. 1.4 1.6 V SD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 600 500 C iss = C gs + C gd (C ds = shorted) C oss = C ds + C gd C rss = C gd 1 10 = 30V Capacitance [pf] 400 300 00 100 C iss C oss C rss 1. = 0 V. f = 1 MHz, Gate-Source Voltage [V] 8 6 4 = 48V Note : I D = 13 A 0 10-1 10 0 10 1, Drain-Source Voltage [V] 0 0 1 3 4 5 6 7 Q G, Total Gate Charge [nc] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics 3

Typical Characteristics (Continued) BS, (Normalized) Drain-Source Breakdown Voltage 1. 1.1 1.0 0.9 0.8-100 -50 0 50 100 150 00 T J, Junction Temperature [ o C] 1. = 0 V. I D = 50 μ A Figure 7. Breakdown Voltage Variation vs. Temperature R DS(ON), (Normalized) Drain-Source On-Resistance.5.0 1.5 1.0 0.5 0.0-100 -50 0 50 100 150 00 T J, Junction Temperature [ o C] 1. = 10 V. I D = 5.0 A Figure 8. On-Resistance Variation vs. Temperature 10 10 Operation in This Area is Limited by R DS(on) 8 I D, Drain Current [A] 10 1 10 0 10-1 1. T C = 5 o C. T J = 150 o C 3. Single Pulse 10-1 10 0 10 1 10 DC 10 ms, Drain-Source Voltage [V] 1 ms 100 µs I D, Drain Current [A] 6 4 0 5 50 75 100 15 150 T C, Case Temperature [ ] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature Z JC (t), Thermal Response [ o C/W] 10 0 0. 0.1 N otes : 1. Z θ JC (t) = 4.5 /W M ax.. D uty Factor, D =t 1 /t 3. T JM - T C = P DM * Z θ JC 0.05 10-1 D=0.5 0.0 0.01 single pulse P DM t 1 t 10-5 10-4 10-3 10-10 -1 10 0 10 1 t 1, S quare W ave P ulse D uration [sec] Figure 11. Transient Thermal Response Curve 4

1V 00nF I G = const. 3mA 50KΩ Same Type as DUT 300nF V GS 10V Q g Q gs Q gd DUT Charge Figure 1. Gate Charge Test Circuit & Waveform R L 90% R G V 10 DUT 10% t d(on) t r t d(off) tf t on t off Figure 13. Resistive Switching Test Circuit & Waveforms L E AS = ---- 1 LI AS BS -------------------- BS - I D BS I AS R G I D (t) V 10 DUT (t) t p t p Time Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms 5

R G DUT I SD Driver + _ Same Type as DUT L dv/dt controlled by RG I SD controlled by pulse period ( Driver ) Gate Pulse Width D = -------------------------- Gate Pulse Period 10V I FM, Body Diode Forward Current I SD ( DUT ) di/dt I RM Body Diode Reverse Current ( DUT ) Body Diode Recovery dv/dt V SD Body Diode Forward Voltage Drop Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms 6

Mechanical Dimensions Figure 16. TO5 (D-PAK), Molded, 3-Lead, Option AA&AB Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: http:///package/packagedetails.html?id=pn_tt5-003 7

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