HSP line ESD protection for high speed lines. Applications. Description. Features. Complies with following standards.

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2-line ESD protection for high speed lines Datasheet - production data Complies with following standards MIL-STD 883G Method 3015-7 Class 3B: 8 kv IEC 61000-4-2 level 4: 15 kv (air discharge) 8 kv (contact discharge) HSP062-2M6 µqfn-6l package Figure 1. Functional schematic (top view) I/O1 I/O2 GND 1 6 2 5 3 4 µqfn 6 leads Features NC NC VBUS HSP062-2P6 SOT 666 I/O1 1 6 NC I/O2 2 5 NC GND 3 4 VBUS SOT-666 Flow-through routing to keep signal integrity Ultralarge bandwidth: 4.6 GHz Ultralow capacitance: 0.6 pf Low leakage current: 100 na at 25 C Extended operating junction temperature range: -40 C to 150 C RoHS compliant Applications The HSP062-2 series is designed to protect against electrostatic discharge on sub micron technology circuits driving: HDMI 1.3 and 1.4 Digital Video Interface Display Port USB 3.0 Serial ATA Ethernet HMI Description The HSP062-2 is a 2-channel ESD array with a rail to rail architecture designed specifically for the protection of high speed differential lines. The ultralow variation of the capacitance ensures very low influence on signal-skew. The large bandwidth makes it compatible with 5 Gbps. The HSP062-2P6 is housed in a SOT-666, while the HSP062-2M6 is packaged in µqfn-6l (1.45 x 1.0 mm) with a 500 µm pitch. Benefits High ESD robustness of the equipment Suitable for high density boards March 2014 DocID022778 Rev 2 1/11 This is information on a product in full production. www.st.com

Characteristics HSP062-2 1 Characteristics Table 1. Absolute maximum ratings T amb = 25 C Symbol Parameter Value Unit V PP Peak pulse voltage IEC 61000-4-2 contact discharge 8 IEC 61000-4-2 air discharge 15 kv I pp Repetitive peak pulse current (8/20 µs) 3 A T j Operating junction temperature range -40 to +150 C T stg Storage temperature range -65 to +150 C T L Maximum lead temperature for soldering during 10 s 260 C Table 2. Electrical characteristics T amb = 25 C Symbol Parameter Test conditions Min. Typ. Max. Unit V BR Breakdown voltage I R = 1 ma 6 V I RM Leakage current V RM = 3 V 100 na V CL C I/O - GND ΔC I/O - GND Clamping voltage Capacitance (input/output to ground) Capacitance variation (input/output to ground) IEC 61000-4-2, +8 kv contact (I PP = 30 A), measured at 30 ns V I/O = 0 V, F = 200 to 3000 MHz, V OSC = 30 mv V I/O = 0 V F = 200 to 3000 MHz, V OSC = 30 mv 18 V 0.6 0.9 pf 0.09 0.17 pf f C Cut-off frequency -3 db 4.6 GHz 2/11 DocID022778 Rev 2

Characteristics Figure 2. Leakage current versus junction temperature (typical values) Figure 3. S21 attenuation measurement 10.00 I R (na) V R =V RM = 3 V 0.00 db -3.00 1.00 4.6 GHz @ -3dB -6.00 0.10-9.00 0.01 Tj ( C) 25 50 75 100 125 150-12.00 F(Hz) -15.00 300.0k 1.0M 3.0M 10.0M 30.0M 100.0M300.0M 1.0G 3.0G IO1 IO2 Figure 4. Eye diagram - HDMI mask at 3.4 Gbps per channel (1) (HSP062-2M6) 250 mv/div Figure 5. Eye diagram - HDMI mask at 3.4 Gbps per channel (1) (HSP062-2P6) 250 mv/div 49 ps/div 49 ps/div 1. HDMI specification conditions. This information can be provided for other applications. Please contact your local ST office. Figure 6. ESD response to IEC 61000-4-2 (+8 kv contact discharge) Figure 7. ESD response to IEC 61000-4-2 (-8 kv contact discharge) 10V/Div 10V/Div 100ns/Div 100ns/Div DocID022778 Rev 2 3/11 11

Ordering information scheme HSP062-2 2 Ordering information scheme Figure 8. Ordering information scheme HSP 06 2-2 x6 High speed line protection Breakdown Voltage Version Number of lines Package P6 = SOT-666 M6 = µqfn-6l 4/11 DocID022778 Rev 2

Package information 3 Package information Epoxy meets UL94, V0 Lead-free package In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Table 3. SOT-666 dimensions Dimensions L1 b1 Ref. Millimeters Inches Min. Typ. Max. Min. Typ. Max. L3 b D E1 A 0.45 0.60 0.018 0.024 A3 0.08 0.18 0.003 0.007 b 0.17 0.34 0.007 0.013 b1 0.19 0.27 0.34 0.007 0.011 0.013 A E L2 A3 D 1.50 1.70 0.059 0.067 E 1.50 1.70 0.059 0.067 E1 1.10 1.30 0.043 0.051 e 0.50 0.020 L1 0.19 0.007 e L2 0.10 0.30 0.004 0.012 L3 0.10 0.004 Figure 9. Footprint recommendations dimensions in mm (inches) Figure 10. Marking for SOT-666 0.50 (0.019) 0.62 2.60 (0.024) (0.01) U 0.99 (0.039) 0.30 (0.012) DocID022778 Rev 2 5/11 11

Package information HSP062-2 Table 4. Micro QFN 1.45x1.00 6L dimensions Dimensions 1 2 L k Ref. Millimeters Inches Min. Typ. Max. Min. Typ. Max. b A 0.50 0.55 0.60 0.020 0.022 0.024 e A1 0.00 0.02 0.05 0.000 0.001 0.002 A A1 N D E b 0.18 0.25 0.30 0.007 0.010 0.012 D 1.45 0.057 E 1.00 0.039 e 0.50 0.020 K 0.20 0.008 1 2 L 0.30 0.35 0.40 0.012 0.014 0.016 Figure 11. Footprint recommendations dimensions in mm (inches) Figure 12. Marking for Micro QFN 1.45x1.00 6L 0.50 [0.020] 0.25 [0.010] 0.65 [0.026] 0.30 [0.012] 1.60 [0.063] S Note: Product marking may be rotated by 90 for assembly plant differentiation. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose. 6/11 DocID022778 Rev 2

Recommendation on PCB assembly 4 Recommendation on PCB assembly 4.1 Stencil opening design 1. General recommendation on stencil opening design a) Stencil opening dimensions: L (Length), W (Width), T (Thickness). Figure 13. Stencil opening dimensions L T W b) General design rule Stencil thickness (T) = 75 ~ 125 µm W Aspect Ratio = ---- 1.5 T Aspect Area L W = 2T --------------------------- ( L + W) 0.66 2. Reference design a) Stencil opening thickness: 100 µm b) Stencil opening for leads: Opening to footprint ratio is 90%. Figure 14. Recommended stencil window position 7µm 7µm 15 µm 650 µm 620 µm 236 µm 250 µm 15 µm Footprint Stencil window Footprint DocID022778 Rev 2 7/11 11

Recommendation on PCB assembly HSP062-2 4.2 Solder paste 1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004. 2. No clean solder paste is recommended. 3. Offers a high tack force to resist component movement during high speed. 4. Solder paste with fine particles: powder particle size is 20-45 µm. 4.3 Placement 1. Manual positioning is not recommended. 2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering. 3. Standard tolerance of ± 0.05 mm is recommended. 4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. 4.4 PCB design preference 1. To control the solder paste amount, the closed via is recommended instead of open vias. 2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. 8/11 DocID022778 Rev 2

Recommendation on PCB assembly 4.5 Reflow profile Figure 15. ST ECOPACK recommended soldering reflow profile for PCB mounting Temperature ( C) 260 C max 255 C 220 C 180 C 125 C 3 C/s max 2 C/s recommended 2 C/s recommended 6 C/s max 6 C/s max 3 C/s max 0 0 1 2 3 4 5 6 7 10-30 sec Time (min) 90 to 150 sec 90 sec max Note: Minimize air convection currents in the reflow oven to avoid component movement. DocID022778 Rev 2 9/11 11

Ordering information HSP062-2 5 Ordering information Table 5. Ordering information Order code Marking Package Weight Base qty Delivery mode HSP062-2P6 U SOT-666 2.85 mg 3000 Tape and reel (7 ) HSP062-2M6 S (1) µqfn-6l 2.3 mg 3000 Tape and reel (7 ) 1. The marking can be rotated by multiple of 90 to differentiate assembly location 6 Revision history Table 6. Document revision history Date Revision Changes 07-Feb-2012 1 Initial release. 19-Mar-2014 2 Minor text changes. 10/11 DocID022778 Rev 2

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