4AC64, 74AC64 6-BIT BUS TRANSCEIVERS SCAS3A MARCH 990 REVISED APRIL 996 Members of the Texas Itruments Widebus Family 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Distributed and Configuration Minimizes High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) -m Process 00-mA Typical Latch-Up Immunity at C Package Optio Include Plastic Thin Shrink Small-Outline (DGG) Package, 300-mil Shrink Small-Outline (DL) Package Using -mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using -mil Center-to-Center Pin Spacings description The AC64 are 6-bit bus traceivers organized as dual-octal noninverting 3-state traceivers designed for asynchronous two-way communication between data buses. The control function implementation minimizes external timing requirements These devices allow data tramission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction control (DIR) input. The output-enable input () can be used to disable the devices so that the buses are effectively isolated. 4AC64... WD PACKAGE 74AC64... DGG OR DL PACKAGE (TOP VIEW) DIR B B B3 B4 B B6 B7 B8 B B B3 B4 B B6 B7 B8 DIR 3 4 6 7 8 9 0 3 4 6 7 8 9 0 3 4 48 47 46 4 44 43 4 4 40 39 38 37 36 3 34 33 3 3 30 9 8 7 6 A A A3 A4 A A6 A7 A8 A A A3 A4 A A6 A7 A8 The 74AC64 is packaged in TI s shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area. The 4AC64 is characterized for operation over the full military temperature range of C to C. The 74AC64 is characterized for operation from 40 C to 8 C. FUNCTION TABLE CONTROL INPUTS OPERATION DIR L L B data to A bus L H A data to bus H X Isolation Please be aware that an important notice concerning availability, standard warranty, and use in critical applicatio of Texas Itruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC and Widebus are trademarks of Texas Itruments Incorporated. UNLESS OTHERWISE NOTED this document contai PRODUCTION DATA information current as of publication date. Products conform to specificatio per the terms of Texas Itruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 996, Texas Itruments Incorporated POST OFFICE BOX 6303 DALLAS, TEXAS 76
4AC64, 74AC64 6-BIT BUS TRANSCEIVERS SCAS3A MARCH 990 REVISED APRIL 996 logic symbol DIR DIR 48 4 G3 3 EN [BA] 3 EN [AB] G6 6 EN4 [BA] 6 EN [AB] A A A3 A4 A A6 A7 A8 A A A3 A4 A A6 A7 A8 47 46 44 43 4 40 38 37 36 3 33 3 30 9 7 6 4 3 6 8 9 3 4 6 7 9 0 3 B B B3 B4 B B6 B7 B8 B B B3 B4 B B6 B7 B8 This symbol is in accordance with ANSI/IEEE Std 9-984 and IEC Publication 67-. logic diagram (positive logic) 48 DIR DIR 4 A 47 B A 36 3 B To Seven Other Traceivers To Seven Other Traceivers POST OFFICE BOX 6303 DALLAS, TEXAS 76
4AC64, 74AC64 6-BIT BUS TRANSCEIVERS SCAS3A MARCH 990 REVISED APRIL 996 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range,.......................................................... 0. V to 7 V Input voltage range, V I (see Note )........................................... 0. V to + 0. V Output voltage range, V O (see Note )........................................ 0. V to + 0. V Input clamp current, I IK (V I < 0 or V I > )................................................ ±0 ma Output clamp current, I OK (V O < 0 or V O > )............................................ ±0 ma Continuous output current, I O (V O = 0 to ).............................................. ±0 ma Continuous current through or.................................................. ±400 ma Maximum power dissipation at T A = C (in still air) (see Note ): DGG package................ 0.8 W DL package.................... W Storage temperature range, T stg................................................... 6 C to 0 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditio beyond those indicated under recommended operating conditio is not implied. Exposure to absolute-maximum-rated conditio for extended periods may affect device reliability. NOTES:. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.. The maximum package power dissipation is calculated using a junction temperature of 0 C and a board trace length of 70 mils. recommended operating conditio (see Note 3) 4AC64 74AC64 MIN NOM MAX MIN NOM MAX Supply voltage (see Note 4) 3. 3. V = 3 V.. VIH High-level input voltage = 4. V 3. 3. V =. V 3.8 3.8 = 3 V 0.9 0.9 VIL Low-level input voltage = 4. V.3.3 V =. V.6.6 VI Input voltage 0 0 V VO Output voltage 0 0 V = 3 V 4 4 IOH High-level output current = 4. V 4 4 ma =. V 4 4 = 3 V IOL Low-level output current = 4. V 4 4 ma =. V 4 4 t/ v Input traition rise or fall rate 0 0 0 0 /V TA Operating free-air temperature 40 8 C NOTES: 3. All unused pi (input and I/O) must be held high or low to prevent them from floating. 4. All and pi must be connected to the proper voltage power supply. PRODUCT PREVIEW information concer products in the formative or design phase of development. Characteristic data and other specificatio are design goals. Texas Itruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 6303 DALLAS, TEXAS 76 3
4AC64, 74AC64 6-BIT BUS TRANSCEIVERS SCAS3A MARCH 990 REVISED APRIL 996 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS TA = C 4AC64 74AC64 MIN TYP MAX MIN MAX MIN MAX 3 V.9.9.9 IOH = 0 µa 4. V 4.4 4.4 4.4. V.4.4.4 VOH IOH = 4 ma 3 V.8.48.48 V IOH = 4 ma 4. V 3.94 3.8 3.8. V 4.94 4.8 4.8 IOH = 7 ma. V 3.8 3.8 3 V 0. 0. 0. IOL = 0 µa 4. V 0. 0. 0.. V 0. 0. 0. VOL IOL = ma 3 V 0.36 0.44 0.44 V IOL =4mA 4. V 0.36 0.44 0.44. V 0.36 0.44 0.44 IOL = 7 ma. V.6.6 II VI = or. V ±0. ± ± µa IOZ VI = or. V ±0. ± ± µa ICC VI = or, IO = 0. V 8 80 80 µa Ci VI = or V 4. Co VI = or V 6 Not more than one output should be tested at a time, and the duration of the test should not exceed 0 ms. For I/O ports, the parameter IOZ includes the input leakage current. switching characteristics over recommended operating free-air temperature range, = 3.3 V ± 0.3 V (see Figure ) pf PARAMETER tplh tphl tpzh tpzl tphz tplz FROM TO TA = C 4AC64 74AC64 (INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX BorA. 7.6 0.4..9..9 3. 9.3 3. 3. 3. 3..8 8.6.8.8 3..8 3. 3.9 6. 3.9 8 3.9 8.3 8.4 0.4.3..3. 4.4 7.7 9.7 4.4 0.3 4.4 0.3 switching characteristics over recommended operating free-air temperature range, = V ± 0. V (see Figure ) PARAMETER tplh tphl tpzh tpzl tphz tplz FROM TO TA = C 4AC64 74AC64 (INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX BorA 4.6 6.9 7.9 7.9.. 7.9. 8.9. 8.9.3 4.9 7..3 8.6.3 8.6 3 6. 9. 3 0.7 3 0.7 7. 9. 9.8 9.8 4. 6. 8. 4. 8.7 4. 8.7 PRODUCT PREVIEW information concer products in the formative or design phase of development. Characteristic data and other specificatio are design goals. Texas Itruments reserves the right to change or discontinue these products without notice. 4 POST OFFICE BOX 6303 DALLAS, TEXAS 76
operating characteristics, = V, T A = C Cpd Power dissipation capacitance per latch 4AC64, 74AC64 6-BIT BUS TRANSCEIVERS SCAS3A MARCH 990 REVISED APRIL 996 PARAMETER TEST CONDITIONS TYP Outputs enabled Outputs disabled CL =0pF pf, f = MHz 43 8 pf PARAMETER MEASUREMENT INFORMATION From Output Under Test CL = 0 pf (see Note A) 00 Ω 00 Ω S Open TEST tplh/tphl tplz/tpzl tphz/tpzh S Open Input Output tplh LOAD CIRCUIT Output Control 0% 0% (low-level 0 V enabling) tpzl Output tplz 0% 0% Waveform 0% 0 V S at 0% VOL (see Note B) tphl tphz tpzh VOH Output Waveform VOH 0% 0% 80% S at 0% VOL (see Note B) 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. Waveform is for an output with internal conditio such that the output is low except when disabled by the output control. Waveform is for an output with internal conditio such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR MHz, ZO = 0 Ω, tr = 3, tf = 3. D. The outputs are measured one at a time with one input traition per measurement. Figure. Load Circuit and Voltage Waveforms POST OFFICE BOX 6303 DALLAS, TEXAS 76
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