Characterization and Compliance Testing for 400G/PAM4 Designs. Project Manager / Keysight Technologies

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Characterization and Compliance Testing for 400G/PAM4 Designs Project Manager / Keysight Technologies Jacky Yu & Gary Hsiao 2018.06.11 Taipei

State of the Standards (Jacky Yu) Tx test updates and learnings (Jacky Yu) Rx updates and learnings (Francis Liu) Q & A 2

400G Class (Current generation - 50G lane rate): IEEE 802.3bs 200/400GBaseE Technical work complete, published in spring 2018 Medium reach SMF + C2C,C2M PAM4 @ 53.1 & 26.6 Gbaud OIF CEI-56G Technical work complete, published in spring 2018 5 reaches PAM4 up to 29 Gbaud, NRZ up to 58 Gb/s 802.3cd: 50/100/200GBaseE Short reach MMF. + C2C,C2M, backplanes & cables PAM4 @26.6 Gbaud 64G Fibre Channel Short & medium reach in MMF and SMF PAM4 @ 28.9 Gbaud IEEE 50/100/200/400G >10 km SMF Entering 3rd major draft cycle, firming up (Fixing some leftover problems in 802.3bs) Second complete draft (some time to go) Study group concluding, nearing project start 800G Class (Next generation-100g lane rate ): OIF CEI-112G 4 reaches PAM4, CNRZ-5 IEEE 800GbE Project starts for 3 reaches, C2M complete draft (Will start after 802.3bs published) 3

Early turn on of complete links (SerDes, modules, connectors, channels) Testing shows some changes required Tx, Channel, Rx & COM parameter values New measurement definitions Test setup requirements 4

R E V I E W K E Y M E A S U R E M E N T S D E F I N E D I N I E E E 8 0 2. 3 B S / C D 5

Optical Modulation Amplitude (OMA) (difference between the 1 level and 0 level) Extinction Ratio (ER) (ratio of 1 and 0 level) Transmitter Dispersion Penalty (TDP) Eye-mask NRZ Transmitters PAM4 Transmitters Outer Optical Modulation Amplitude (difference between the 3 level and 0 level) Outer Extinction Ratio (ratio of 3 and 0 level) Transmitter and dispersion eye closure for PAM4 (TDECQ) A traditional NRZ mask test is no longer used! 6

Used in multiple IEEE 802.3bs/cd Clauses What are the key PAM4 Tx parameters that get measured for OPTICAL transmitters? Outer Optical Modulation Amplitude Outer Extinction Ratio Transmitter and dispersion eye closure for PAM4 (TDECQ) IEEE 802.3 participants can access the latest draft specs on the 802.3 website. IEEE 400GBASE-FR8/LR8 Tx Parameters Reference: IEEE P802.3bs /D3.5, 10th October 2017, page 251 7

Incoming Signal (top) Tells you the performance of your transmitter relative to an ideal transmitter For NRZ TDP, we literally measured the BER performance of the transmitter compared to an actual golden transmitter o How much extra power was required at the receiver to compensate for non-ideal performance? o Expensive and time consuming to measure TDECQ Equalized Signal (bottom) For TDECQ we indirectly measure SER (symbol error ratio) o Cost effective and relatively fast to measure (compared to TDP) TDECQ is a better predictor of system level performance vs eye mask testing. 8

Generate SSPRQ pattern (2 16-1 symbols) Reference Receiver: 4 th order Bessel-Thomson low-pass filter (Oscilloscope noise measured and mathematically backed out per Standard). MM: 12.6 GHz BW (26.56 GBd) 86100D DCA-X Scope o No Pol. controller, fiber SM: 13.28 GHz BW (26.56 GBd) SM: 26.56 GHz BW (53.125 GBd) CR PLL BW 4 MHz, Slope 20 db/dec (1 st Order, no peaking) Equalizer (5 tap, T spaced, FFE) Where: Qt = 3.414 (consistent with target SER) R = noise term Targeted samples on PAM4 eye diagram. Reference: IEEE P802.3bs /D3.5, 10th October 2017, Figure 121-5, Page 224. 9

Leverage very high target SER (~ 2E-4) Statistically determine the SER directly on the signal captured with an oscilloscope Rather than attenuate the signal to force errors, mathematically add noise --------- to create errors. Increase the added noise (---------) until the target SER is observed Repeat for the transmitter virtual ideal transmitter The amount of noise that must be added to the ideal reference signal to reach the target SER will generally be larger than the noise added to the signal being tested. Added noise Transmitter under = TDECQ test The db difference in noise levels represents the power penalty for the transmitter under test = TDECQ Virtual ideal transmitter 10

Early TDECQ versions Optimized virtual equalizer to minimize the spread of the eye levels (e.g. open up the eye) 5 tap, T/2 spaced, feed-forward equalizer (FFE) Classic Bessel-Thomson scope BW (BW = 75% of baud rate) Measurement made at two time slices at the eye center Final TDECQ version (Draft 3.5) Optimized to minimize the TDECQ penalty 5 tap, T spaced, feed-forward equalizer (FFE) Nyquist scope bandwidth (50% of baud rate) Measurement time position allowed to be optimized for minimum TDECQ penalty In each case, the changes were made to better represent the typical system that the transmitter would operate in. In most cases this is relative to how real system receivers will operate. 11

Consider anything that could possibly degrade the SER (think like a receiver!) o o o Linearity: If the signal levels are not proportionally distributed, the decision thresholds at the receiver may not be optimally set Skew: If the three eyes are not aligned in time, the receiver may not be making decisions at the optimal time Noise margin: The absolute noise that can be added to the signal to reach the target SER (an absolute value, not relative to an ideal transmitter) Advanced TDECQ analysis helps to isolate which signal components are dominating the overall TDECQ result o o o Partial TDECQ: The TDECQ contribution for each eye Partial SER: The effective SER for each eye Partial Noise margin: the noise margins for each eye 12

Equalizer (FFE) - requires a well-designed optimization o Automatic optimization of both tap weights and main cursor position to achieve the lowest possible TDECQ value o For consistency and speed of optimization, the optimization can be seeded based on previous analysis Reference Receiver apply the correct frequency response in the oscilloscope channel o Using unique impulse response correction (IRC), hardware imperfections are removed and an ideal response is created Low noise o When small signals are measured, oscilloscope channel noise can corrupt the construction of the measurement o Low channel noise allows accurate TDECQ on smaller signals Frequency Lower Limit Upper Limit Create an ideal reference receiver response using IRC 13

Fast and easy to implement measurements are built into the baseline FlexDCA user interface Comprehensive selection of one-button measurements 14

Built into the base firmware for easy automation Very fast acquisition rate N1092x DCA-M has an ideal frequency response for both 26 Gbaud and 53 Gbaud compliance test using unique impulse response correction process ( IRC ) Low cost compared to other sampling oscilloscopes Low noise channel allows accurate and repeatable TDECQ even on low power signals 15

Keysight N7004A 33 GHz O/E converter A fully-integrated optical-to-electrical (O/E) converter for measuring up to 28 GBd optical signals using Infiniium real-time scopes. Compatible with Infiniium V-Series, 90000X/Q, and Z Series. System level R&D debug and troubleshooting Reference receiver testing (filtered response) and unfiltered characterization of optical transmitters Scope SW includes built-in optical NRZ measurements (contact Keysight regarding built-in PAM4 measurements) 16

IEEE 802.3bs Annex 120D 200GAUI-4 and 400GAUI-8 What are the key PAM4 Tx parameters that get measured? Output waveform o Level Separation Mismatch Ratio Signal-to-noise-and-distortion ratio (SNDR) (Note there is still some debate over specs in IEEE 802.3cd) Output Jitter o J RMS o J4u o Even-Odd Jitter (EOJ) IEEE 802.3 participants can access the latest draft specs on the 802.3 website. Reference: IEEE P802.3bs /D3.5, 10th October 2017, page 352. 17

J4u, J RMS, and EOJ you may recognize some of these acronyms from other (older) Standards So they should be pretty straight forward to measure, right? While the IEEE Output Jitter names may sound familiar, they are measured very differently! o Traditional Jn (e.g. J5, J9) and EOJ parameters were measured using all edges of an NRZ pattern. o IEEE 802.3bs now measures J4u, J RMS, and EOJ on 12 specific edges of a PRBS13Q (PAM4) pattern! Reference: IEEE P802.3bs /D3.5, 10th October 2017, page 357. So don t just pull out your scope and press the J4 or EOJ button in Jitter Mode! 18

Different Architectures ARE used to generate PAM4 signals Some Tx designs may use different clock buffers for MSB and LSB; this can result in different uncorrelated jitter appearing on different edges. Measuring jitter only on JP03 (clock) patterns (original method) could miss potential issues. PAM4 TX PAM4 19

200GAUI-4 and 400GAUI-8 transmitter characteristics at TP0a (120D.3.1.1) Acquire data for 12 specific edges of a PRBS13Q (12 sets of data should be of equal size) Initially very time consuming to make measurements since Each histogram should include at least 10 6 hits. o o In a Jan 2017 IEEE ad hoc meeting, Keysight presented advanced methods to speed up test times while maintaining accuracy. Reference: http://grouper.ieee.org/groups/802/3/bs/public/adhoc/elect/30jan_17/lecheminan t_01_013017_elect.pdf o o RT Scopes can acquire entire patterns very quickly, but only a few samples of each edge are valid in a waveform, so many pattern acqs are required Sampling scopes can target edges very efficiently, but sampling speeds are relatively slow (ksa/s vs GSa/s) Histogram size changed: Size of all sets should be chosen to enable calculation of J4u with sufficient accuracy. Typically > 300k samples works well. New acquisition methods were accepted (edge model technique) Amplitude Edge Model Amplitude-to-Time (Jitter) transfer function ~ 100% efficiency Sample 1 Jitter Sample 2 20

200GAUI-4 and 400GAUI-8 transmitter characteristics at TP0a (120D.3.1.1) New 12 edge jitter method in FlexDCA reduced test time from hours to << 1 minute. J4u and JRMS jitter o Measure RJ/PJ on 12 specific transitions using a PRBS13Q pattern (exclude correlated jitter). o Data from all edges is combined and analyzed Even-Odd Jitter (EOJ) o Measured on PRBS13Q (3 repeats) o Max from measurements on all 12 edges FlexDCA (Option 200 Jitter with Option 9FP PAM4 Analysis) reports : J4u, J RMS, EOJ ALL measurement (per the Standard) Plus individual results for each of the 12 edges o Rise: 0 to 3, 1 to 2, 0 to 1, 2 to 3, 0 to 2, 1 to 3 o Fall: 3 to 0, 2 to 1, 1 to 0, 3 to 2, 2 to 0, 3 to 1 Measurement Setup: Receiver: 4 th Order Bessel-Thomson low-pass filter with 33 GHz BW CR PLL BW 4 MHz and a slope of 20 db/decade Contact Keysight for info on 12 edge jitter measurement capabilities for RT scopes. 21

Automated Software Apps for emerging Standards that use PAM4 Measures Steady-State Voltage, SNDR, ESMW, etc. N1085A PAM4 Measurement App for Ethernet and OIF-CEI (for the 86100D DCA-X) N8836A PAM4 Measurement App for Ethernet and OIF-CEI (for Infiniium real-time scopes) We are actively updating PAM4 algorithms as the Standards evolve. 22

Electrical Sampling Scope (includes built-in clock recovery and precision timebase) Keysight 86100D DCA-X with 86108B Channels: 2 Bandwidth: 50 GHz Jitter: <45 fs rms typ. Electrical Clock Recovery integrated HW Clock Recovery works with PAM-N signals up to 32 Gbaud 86100D-9FP PAM4 Analysis SW (works with any DCA module, optical or electrical) N1085A PAM4 Pre-Compliance SW NOTE 75 / 85 / 100+ GHZ BW remote head modules also available. Electrical Real-time Scope Keysight DSO Z-Series Channels 2-4 Bandwidth: up to 63 GHz Sample Rate: Up to 160 GSa/s PAM4 Serial Data Analysis Wizard Software Clock Recovery (specify transitions for CR) N8827A/B PAM4 Analysis SW N8836A PAM4 Pre-Compliance SW PAM4 SER/BER Error Capture and Decode capabilities using single-shot capture 23

System Board Level Chip Validation / Verification Compliance Troubleshooting Sampling Scopes (SS), DCA Best for validating/characterizing PAM4 designs For applications that place top priority on waveform precision. Highest Fidelity Low noise Ultra-low jitter High Bandwidth Highest Resolution (14-16 bits) Modular Platform Electrical Optical TDR/TDT Lowest price for same BW 86100D-9FP PAM4 Analysis SW N1085A PAM4 Pre-Compliance SW Real-time Scopes (RT) Best for troubleshooting PAM4 designs The most versatile tool for all areas of high-speed digital communications Best for troubleshooting Captures one-time (glitch) events No explicit trigger required Does not require repetitive signals for pattern waveform measurements. N7004A Optical-to-Electrical Converter N8827A/B PAM4 Analysis SW N8836A PAM4 Pre-Compliance SW PAM4 SER/BER Error Capture and Decode capabilities 24

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By design, 400G class links do not run error free rely on FEC to restore data Rely on accurate and repeatable BER measurement Actual measurement matters it is not going to be BER 0 anymore! Traditional setup using BERT relies on error free loopback link Testing with aggressors actually matters! Needed for both Input and Output (Tx) characterization & compliance tests 26

The Bit Error Ratio Tester will continue to be the principle tool for Input testing Traditional BERT Input test setup: Determine ability of DUT s Input to correctly receive impaired data BERT Pattern Generator Channel Rx IN DUT Tx OUT BERT Error Detector Stressed Data Pattern Clean Loopback Link Clean loopback link required to prevent adding errors at BERT ED input Will the loopback path be error free in links designed to use FEC for error free operation? 27

Same test used in legacy modules (NRZ) BERT Required BER for entire link (C2M + Optical): 1E-12 (Error free) ED PG Frequency Dependent Attenuator Module Compliance Board Rx Tx Module under test ROSA TOSA Tx input being tested 1. BERT pattern generator provides stressed test pattern to Frequency Dependent Attenuator (ISI channel) to Tx input of Module Compliance Board (MCB) 2. Tx Input under test receives stressed test pattern and drives optical Tx output through TOSA elements 3. Short optical fiber patch cable provides loopback of received signal to optical Rx input of same or second module to serve as O/E 4. Looped back signal passes through MCB to BERT Error Detector Input Required BER for CAUI-4 C2M link: 1E-15, tested to 1E-12 (Error free) 5. Multi-lane devices must be tested with aggressors on alternate lanes not shown here for simplicity Example: 100GBASE-LR4, each lane tested independently 28

PAM-4 Links do not run error free Required BER for entire link (C2M + Optical): 2.4E-4 BERT ED PG Frequency Dependent Attenuator Module Compliance Board Rx Tx Module under test Required BER for 200G AUI-4/ 400G AUI-8 C2M link: 1E-5 ROSA TOSA Tx input being tested Electrical and optical links using PAM-4 signaling do not run error free Require FEC to achieve error free data All elements within the link contribute to errors, including the transmitter Distortion, skew, linearity, noise Optical link has worse BER than C2M electrical link under test Cannot be used as loopback path Example: 400GBASE-ER8, each lane tested independently 29

BERT ED O/E Instrument Grade Loopback link BER requirement: < 2.4 E-4 PG Channel Module under Rx Tx in test Tx Allowable BER worse that input under test!!! Input under test BER Test limit: < 1E-5 Can we count on Instrument grade O/E and BERT input having higher grade performance to eliminate errors in loopback path? Not always! PAM4 links have more Tx induced impairments (linearity, eye skew, low SNDR, ) 30

Required BER for 200G AUI-4/ 400G AUI-8 C2M link: 1E-5 Errors in loopback path at ED input added to errors from Tx input under test BERT ED PG Frequency Dependent Attenuator Module Compliance Board Rx Tx Module under test ROSA TOSA Some module interface chips support host side loopback test mode But loopback return path is another C2M link, which is not intended to be error free (Error free loopback might be obtained IF: module Rx output transmitter is very clean, and channel is very short, Tx input being tested and has minimal reflections through module connector, Required BER for 200G AUI-4/ 400G AUI-8 C2M link: 1E-5 and BERT ED input is carefully equalized) But, how can you assure this? Example: 400GBASE-ER8, each lane tested independently 31

BERT ED PG Frequency Dependent Attenuator Module Compliance Board Rx Tx Module under test Error Checker ROSA TOSA Tx input being tested When error free loopback link cannot be assured (as in PAM-4 links), an internal error checker directly driven by input receiver under test must be used for accurate BER measurements BERT is still used to generate stressed test pattern, but not for error detection Error checker in DUT is read through alternate link, such as the management interface Required BER for 200G AUI-4/ 400G AUI-8 C2M link: 1E-5 Example: 400GBASE-ER8, each lane tested independently Data from DUT error checker can be read into Keysight M8070A System Software for M8000 BER test Solutions to enable direct JTOL and other measurements, identical capabilities as those made with BERT error detector 32

If an internal error checker is available, it should be used for Input testing Using Internal error checker advantages: Eliminates possibility of overstating errors from added errors in loopback path Can also test in system environment using host generated test pattern Downside of using internal error checkers Limited selection of test patterns recognized must be designed in Requires entering special test mode, which may not use mission mode data path Lose measurements built into BERT such as JTOL sweeps (Not an issue when using Keysight M8070A System Software for M8000 Series of BER Test Solutions) DUT Control Interface allows using internal error counter in place of BERT error analyzer Also provides access to other device control registers 33

Conditions for use of traditional BERT ED: BERT error analyzer must have powerful equalization, such as in M8046A PAM4 error analyzer Loopback Tx must be clean Loopback channel should have minimal reflections Module under test Loopback link integrity must be validated Ideal method: DUT can generated test pattern from loopback path Tx, verified with BERT ED Rx Tx Test Pattern Generator ROSA TOSA Alternate Compare BER measurement from internal error checker with BERT Module under test Rx Tx Error Checker ROSA TOSA 34

Standards require applying aggressor signals on back channel and alternate lanes for both Input and Output compliance tests Not a new requirement, but important in links using PAM4 due to reduced SNR Measurable eye closure in electrical and optical Tx outputs Needed in both electrical and optical paths Optical path potentially creates crosstalk induced eye closure before and after electrical conversion 35

Aggressor signals have rise times set to the minimum allowed for the transmitter output. Aggressors to be at same data rate as lane under test, but must not be phase aligned! Asynchronous clock introduces a few PPM rate difference, which creates continuous phase slip to assure coupled edge passes through slicer time window Aggressor Aggressor Victim Victim (Example shown with NRZ eye for clarity ) Can also use common clock with > 0.5 UI jitter, or continuously increasing delay (phase rotator) Use PAM-4 for Aggressor (all transitions). 0-3,3-0 NRZ over stresses DUT 36

Option to use AWG for RI/SI source, aggressor eye-skew PAM-4 or NRZ Loopback to ED 2 RI/SI PAM-4 or NRZ Remote head 2 + Input (RX) under test M8040A 64 GBaud BERT provides: Highly integrated for simplified test setup Built-in 4 tap de-emphasis Emulate jitter, calibrated and built-in Emulate aggressor w/ fast tr on 2nd cha Level non-linearity test True PAM-4 error detector Low bit/symbol ratios, long PRBS/sequences Automated jitter tolerance tests PAM-4 and NRZ switchable Scableable/upgradeable via options: 32/64 GBaud M8196A complements input test setup when used as: Random/ sinusoidal interference source with directional couplers Aggressor channel PAM-4 generator to emulate horizontally skewed eyes Economic PAM-4 generator (see AWG slide for some restrictions) Control from M8070A for M8195/6A 37

New measurement challenges being discovered as full links using PAM-4 are being implemented Key Optical Output (Tx) Measurements: TDECQ, Outer OMA, Outer ER Keys to fast, accurate, and repeatable optical measurements: o Optimized TDECQ Equalizer built into the baseline oscilloscope firmware o Ideal Reference Receiver using impulse response correction (IRC) o Low Noise receiver Key Electrical Output (Tx) Measurements: Output Jitter (J4u, J RMS, EOJ), SNDR, and ESMW o New 12 edge jitter parameters can be analyzed quickly using targeted sampling technique Traditional Input test setup using loopback to BERT can be used if errors in loopback path controlled Internal error checker with M8070A User of crosstalk aggressor sources required for accurate characterization and compliance test in PAM4 links Visit www.keysight.com/find/pam4 for more information. 38