HT9200A/HT9200B DTMF Generators

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DTMF Generators Features Operating voltage 2.0V~5.5V Serial mode for the HT9200A Serial/parallel mode for the HT9200B Low standby current Low total harmonic distortion 3.58MHz crystal or ceramic resonator HT9200A 8-pin DIP/SOP package HT9200B 14-pin SOP package General Description The HT9200A/B tone generators are designed for MCU interfaces. They can be instructed by a MCU to generate 16 dual tones and 8 single tones from the DTMF pin. The HT9200A provides a serial mode whereas the HT9200B contains a selectable serial/parallel mode interface for various applications such as security systems home automation remote control through telephone lines communication systems etc. Selection Table Part No. Function Operating Voltage OSC Frequency Interface Package HT9200A 2V~5.5V 3.58MHz Serial 8 DIP/SOP HT9200B 2V~5.5V 3.58MHz Serial/Parallel 14 SOP Block Diagram # & 0 + H O I J = 4 A I = J H I? E = J H 6. / A A H = J H 6. ) 6 ) 5 A H E = = J = 1 F K J + E H? K E J J H + E H? K E J 2 = H = A = J = 1 F K J + E H? K E J 5 2 Rev. 1.41 1 February 23 2009

Pin Assignment 8 5 5 & % $ # 8 6. ) 6 ) 0 6 ' ) & 1 2 ) 5 2 ) 8 5 5 + # $ % ' & 8 6. ) 6 ) 5 2 0 6 ' * 5 2 ) Pad Assignment Pad Coordinates Unit m 8 6. Pad No. X Y Pad No. 1 553.30 430.40 8 553.30 523.50 2 553.30 133.50 9 553.30 190.30 X Y 8 5 5 # $ % ' & 5 2 ) 6 ) 3 553.30 328.50 10 553.30 4.70 4 553.30 523.50 11 553.30 340.30 5 220.10 523.50 12 374.90 523.50 6 25.10 523.50 13 279.30 523.50 7 308.10 523.50 Chip size 1460 1470 ( m) 2 * The IC substrate should be connected to VSS in the PCB layout artwork. Pin Description Pin Name I/O Internal Connection Description CE I CMOS IN Pull-high Chip enable active low X2 X1 O I Oscillator The system oscillator consists of an inverter a bias resistor and the required load capacitor on chip. The oscillator function can be implemented by Connect a standard 3.579545MHz crystal to the X1 and X2 terminals. VSS Negative power suppl ground NC No connection D0~D3 I CMOS IN Pull-high or Floating Data inputs for the parallel mode When the IC is operating in the serial mode the data input terminals (D0~D3) are included with a pull-high resistor. When the IC is operating in the parallel mode these pins become floating. S/P I CMOS IN Operation mode selection input S/P= H Parallel mode S/P= L Serial mode CLK I CMOS IN Pull-high or Floating Data synchronous clock input for the serial mode When the IC is operating in the parallel mode the input terminal (CLK) is included with a pull-high resistor. When the IC is operating in the serial mode this pin becomes floating. Rev. 1.41 2 February 23 2009

Pin Name DATA I/O I Internal Connection CMOS IN Pull-high or Floating Description Data input terminal for the serial mode When the IC is operating in the parallel mode the input terminal (DATA) is included with a pull-high resistor. When the IC is operating in the serial mode this pin becomes floating. DTMF O CMOS OUT Output terminal of the DTMF signal VDD Positive power supply 2.0V~5.5V for normal operation Approximate internal connection circuits 5 1 2 K D E C D 8 5 7 6 8 5 1. H + 5 1 ) 6 ) 8 5 + 1 ) 6 4 F. F. - Absolute Maximum Ratings Supply Voltage... 0.3V to 6V Input Voltage...V SS 0.3 to V DD +0.3V Storage Temperature... 50 C to125 C Operating Temperature... 20 C to75 C Note These are stress ratings only. Stresses exceeding the range specified under Absolute Maximum Ratings may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. Rev. 1.41 3 February 23 2009

Electrical Characteristics Ta=25 C Symbol Parameter V DD Test Conditions Conditions Min. Typ. Max. Unit V DD Operating Voltage 2 5.5 V I DD Operating Current 2.5V S/P=VDD D0~D3=V SS 240 2500 5.0V CE=V SS No load 950 3000 A V IL Low Input Voltage VSS 0.2V DD V V IH High Input Voltage 0.8V DD V DD V I STB R P t DE V TDC Standby Current Pull-high Resistance DTMF Output Delay Time (Parallel Mode) DTMF Output DC Level 2.5V S/P=VDD CE=V DD no load 1 5.0V 2 2.5V VOL =0V 120 180 270 5.0V 45 68 100 5V t UP +6 t UP +8 ms 2V~ 5.5V DTMF Output 0.45V DD 0.75V DD V I TOL DTMF Sink Current 2.5V V DTMF =0.5V 0.1 ma V TAC DTMF Output AC Level 2.5V Row group R L =5k 0.12 0.15 0.18 Vrms A CR Column Pre-emphasis 2.5V Row group=0db 1 2 3 db R L DTMF Output Load 2.5V t HD 23dB 5 k t HD Tone Signal Distortion 2.5V R L =5k 30 23 db f CLK Clock Input Rate (Serial Mode) 100 500 khz t UP Oscillator Starting Time (When CE is low) 5.0V The time from CE falling edge to normal oscillator operation A k 10 ms f OSC System Frequency Crystal=3.5795MHz 3.5759 3.5795 3.5831 MHz Rev. 1.41 4 February 23 2009

Functional Description The HT9200A/B are DTMF generators for MCU interfaces. They are controlled by a MCU in the serial mode or the parallel mode (for the HT9200B only). Serial mode (HT9200A/B) The HT9200A/B employ a data input a 5-bit code and a synchronous clock to transmit a DTMF signal. Every digit of a phone number to be transmitted is selected by a series of inputs which consist of 5-bit data. Of the 5 bits the D0(LSB) is the first received bit. The HT9200A/B will latch data on the falling edge of the clock (CLK pin). The relationship between the digital codes and the tone output frequency is shown in Table 1. As for the control timing diagram refer to Figure 1. When the system is operating in the serial mode a pull-high resistor is attached to D0~D3 (for parallel mode) on the input terminal. Table 1 Digits vs. input data vs. tone output frequency (serial mode) Digit D4 D3 D2 D1 D0 Tone Output Frequency (Hz) 1 0 0 0 0 1 697 1209 2 0 0 0 1 0 697 1336 3 0 0 0 1 1 697 1477 4 0 0 1 0 0 770 1209 5 0 0 1 0 1 770 1336 6 0 0 1 1 0 770 1477 7 0 0 1 1 1 852 1209 8 0 1 0 0 0 852 1336 9 0 1 0 0 1 852 1477 0 0 1 0 1 0 941 1336 0 1 0 1 1 941 1209 0 1 1 0 0 941 1477 A 0 1 1 0 1 697 1633 B 0 1 1 1 0 770 1633 C 0 1 1 1 1 852 1633 D 0 0 0 0 0 941 1633 1 0 0 0 0 697 1 0 0 0 1 770 1 0 0 1 0 852 1 0 0 1 1 941 1 0 1 0 0 1209 1 0 1 0 1 1336 1 0 1 1 0 1477 1 0 1 1 1 1633 DTMF OFF 1 1 1 1 1 Note The codes not listed in Table 1 are not used D4 is MSB Rev. 1.41 5 February 23 2009

For the HT9200B the S/P pin has to be connected low for serial mode operation. Parallel mode ( HT9200B) The HT9200B provides four data inputs D0~D3 to generate their corresponding DTMF signals. The S/P has to be connected high to select the parallel operation mode. Then the input data codes should be determined. Finally the CE is connected low to transmit the DTMF signal from the DTMF pin. The T DE time (about 6ms) will be delayed from the CE falling edge to the DTMF signal output. The relationship between the digital codes and the tone output frequency is illustrated in Table 2. As for the control timing diagram see Figure 2. When the system is operating in the parallel mode D0~D3 are all in the floating state. Thus these data input pins should not float. 5 2 I? E = J H J7 2 ) 6 ) 5 * 5 * 5 * 5 * 5 * 5 * E C E J E C E J 5 J F? @ A 6. E C E J 6. I E C = Figure 1 E C E J 6. I E C = Table 2 Digits vs. input data vs. tone output frequency (parallel mode) Digit D3 D2 D1 D0 Tone Output Frequency (Hz) 1 0 0 0 1 697 1209 2 0 0 1 0 697 1336 3 0 0 1 1 697 1477 4 0 1 0 0 770 1209 5 0 1 0 1 770 1336 6 0 1 1 0 770 1477 7 0 1 1 1 852 1209 8 1 0 0 0 852 1336 9 1 0 0 1 852 1477 0 1 0 1 0 941 1336 1 0 1 1 941 1209 1 1 0 0 941 1477 A 1 1 0 1 697 1633 B 1 1 1 0 770 1633 C 1 1 1 1 852 1633 D 0 0 0 0 941 1633 Rev. 1.41 6 February 23 2009

5 2 I? E = J H 6. J - J - J A 6 D A @ = J = I D K @ > A H A = @ O > A B H A J D A > A? Figure 2 Tone frequency Output Frequency (Hz) %Error Specified Actual 697 699 +0.29% 770 766 0.52% 852 847 0.59% 941 948 +0.74% 1209 1215 +0.50% 1336 1332 0.30% 1477 1472 0.34% % Error does not contain the crystal frequency drift Rev. 1.41 7 February 23 2009

Application Circuits Serial mode 8 8 8 ) 6 ) 8 5 5 + 7 # % ' # # 0 F. F. 8 5 5 8 & 6. % ) 6 ) $ # 0 6 ' ) 6 A K J F K J Serial/parallel mode 8 8 5 2 8 5 5 8 5 5 ) 6 ) + 7 # % ' # # 0 F. F. 8 5 5 # + $ % 8 6. ) 6 ) 5 2 ' & 0 6 ' * 8 6 A K J F K J Rev. 1.41 8 February 23 2009

Package Information 8-pin DIP (300mil) Outline Dimensions ) * & # 0 + - / 1. Symbol Dimensions in mil Min. Nom. Max. A 355 375 B 240 260 C 125 135 D 125 145 E 16 20 F 50 70 G 100 H 295 315 I 375 Rev. 1.41 9 February 23 2009

8-pin SOP (150mil) Outline Dimensions & # ) * + + / 0 -. = MS-012 Symbol Dimensions in mil Min. Nom. Max. A 228 244 B 150 157 C 12 20 C 188 197 D 69 E 50 F 4 10 G 16 50 H 7 10 0 8 Rev. 1.41 10 February 23 2009

14-pin SOP (150mil) Outline Dimensions & ) * % + + / 0 -. = MS-012 Symbol Dimensions in mil Min. Nom. Max. A 228 244 B 150 157 C 12 20 C 337 344 D 69 E 50 F 4 10 G 16 50 H 7 10 0 8 Rev. 1.41 11 February 23 2009

Product Tape and Reel Specifications Reel Dimensions 6 ) * + 6 SOP 8N Symbol Description Dimensions in mm A Reel Outer Diameter 330.0 1.0 B Reel Inner Diameter 100.0 1.5 C Spindle Hole Diameter 13.0 +0.5/-0.2 D Key Slit Width 2.0 0.5 T1 Space Between Flange 12.8 +0.3/-0.2 T2 Reel Thickness 18.2 0.2 SOP 14N Symbol Description Dimensions in mm A Reel Outer Diameter 330.0 1.0 B Reel Inner Diameter 100.0 1.5 C Spindle Hole Diameter 13.0 +0.5/-0.2 D Key Slit Width 2.0 0.5 T1 Space Between Flange 16.8 +0.3/-0.2 T2 Reel Thickness 22.2 0.2 Rev. 1.41 12 February 23 2009

Carrier Tape Dimensions 2 2 J -. 9 + * 2 ) 4 A A 0 A 1 + F =? = C A F E = @ J D A H A A D A I = H A? = J A @ J D A I = A I E @ A SOP 8N Symbol Description Dimensions in mm W Carrier Tape Width 12.0 +0.3/-0.1 P Cavity Pitch 8.0 0.1 E Perforation Position 1.75 0.1 F Cavity to Perforation (Width Direction) 5.5 0.1 D Perforation Diameter 1.55 0.1 D1 Cavity Hole Diameter 1.50 +0.25/-0.00 P0 Perforation Pitch 4.0 0.1 P1 Cavity to Perforation (Length Direction) 2.0 0.1 A0 Cavity Length 6.4 0.1 B0 Cavity Width 5.2 0.1 K0 Cavity Depth 2.1 0.1 t Carrier Tape Thickness 0.30 0.05 C Cover Tape Width 9.3 0.1 SOP 14N Symbol Description Dimensions in mm W Carrier Tape Width 16.0 +0.3/-0.1 P Cavity Pitch 8.0 0.1 E Perforation Position 1.75 0.1 F Cavity to Perforation (Width Direction) 7.5 0.1 D Perforation Diameter 1.5 +0.1/-0.0 D1 Cavity Hole Diameter 1.50 +0.25/-0.00 P0 Perforation Pitch 4.0 0.1 P1 Cavity to Perforation (Length Direction) 2.0 0.1 A0 Cavity Length 6.5 0.1 B0 Cavity Width 9.5 0.1 K0 Cavity Depth 2.1 0.1 t Carrier Tape Thickness 0.30 0.05 C Cover Tape Width 13.3 0.1 Rev. 1.41 13 February 23 2009

Holtek Semiconductor Inc. (Headquarters) No.3 Creation Rd. II Science Park Hsinchu Taiwan Tel 886-3-563-1999 Fax 886-3-563-1189 http//www.holtek.com.tw Holtek Semiconductor Inc. (Taipei Sales Office) 4F-2 No. 3-2 YuanQu St. Nankang Software Park Taipei 115 Taiwan Tel 886-2-2655-7070 Fax 886-2-2655-7373 Fax 886-2-2655-7383 (International sales hotline) Holtek Semiconductor Inc. (Shanghai Sales Office) G Room 3 Floor No.1 Building No.2016 Yi-Shan Road Minhang District Shanghai China 201103 Tel 86-21-5422-4590 Fax 86-21-5422-4705 http//www.holtek.com.cn Holtek Semiconductor Inc. (Shenzhen Sales Office) 5F Unit A Productivity Building Gaoxin M 2nd Middle Zone Of High-Tech Industrial Park ShenZhen China 518057 Tel 86-755-8616-9908 86-755-8616-9308 Fax 86-755-8616-9722 Holtek Semiconductor Inc. (Beijing Sales Office) Suite 1721 Jinyu Tower A129 West Xuan Wu Men Street Xicheng District Beijing China 100031 Tel 86-10-6641-0030 86-10-6641-7751 86-10-6641-7752 Fax 86-10-6641-0125 Holtek Semiconductor Inc. (Chengdu Sales Office) 709 Building 3 Champagne Plaza No.97 Dongda Street Chengdu Sichuan China 610016 Tel 86-28-6653-6590 Fax 86-28-6653-6591 Holtek Semiconductor (USA) Inc. (North America Sales Office) 46729 Fremont Blvd. Fremont CA 94538 USA Tel 1-510-252-9880 Fax 1-510-252-9885 http//www.holtek.com Copyright 2009 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek s products are not authorized for use as critical components in life support devices or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information please visit our web site at http//www.holtek.com.tw. Rev. 1.41 14 February 23 2009