74LVC08A. Description. Pin Assignments. Features. Applications QUADRUPLE 2-INPUT AND GATES 74LVC08A. (Top View) Vcc 4B 4A 4Y 3B 3A 3Y

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Transcription:

QUADRUPLE 2-INPUT AND GATES Description Pin Assignments The provides four independent 2-input AND gates. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be 1A (Top View) 1 14 Vcc used in a mixed voltage environment. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down. The gates perform the positive Boolean function: Y = A B or Y = A + B 1B 1Y 2A 2B 2Y GND 2 3 4 5 6 7 13 12 11 10 9 8 4B 4A 4Y 3B 3A 3Y Features Wide Supply Voltage Range from 1.65V to 5.5V Sinks 24mA at V CC = 3.3V CMOS low power consumption IOFF Supports Partial-Power-Down Mode Operation Inputs or outputs accept up to 5.5V Inputs can be driven by 3.3V or 5.5V allowing for voltage translation applications. ESD Protection Exceeds JESD 22 200-V Machine Model (A115-A) 2000-V Human Body Model (A114-A) Exceeds 1000-V Charged Device Model (C101C) Latch-Up Exceeds 250 ma per JESD 78, Class II Range of Package Options SO-14 and TSSOP-14 Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) Halogen and Antimony Free. Green Device (Note 3) Applications Voltage Level Shifting General Purpose Logic Power Down Signal Isolation Wide array of products such as: PCs, networking, notebooks, ultrabooks, netbooks Computer peripherals, hard drives, CD/DVD ROM TV, DVD, DVR, set top box Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. 2. See http:// for more information about Diodes Incorporated s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. 1 of 10

Pin Descriptions Pin Number Pin Name Description 1 1A Data Input 2 1B Data Input 3 1Y Data Output 4 2A Data Input 5 2B Data Input 6 2Y Data Output 7 GND Ground 8 3Y Data Output 9 3A Data Input 10 3B Data Input 11 4Y Data Output 12 4A Data Input 13 4B Data Input 14 V CC Supply Voltage Logic Diagram Function Table Inputs Output A B Y L L L L H L H L L H H H 2 of 10

Absolute Maximum Ratings (Note 4) (@T A = +25 C, unless otherwise specified.) Symbol Description Rating Unit ESD HBM Human Body Model ESD Protection 2 KV ESD CDM Charged Device Model ESD Protection 1 KV ESD MM Machine Model ESD Protection 200 V V CC Supply Voltage Range -0.5 to 6.5 V V I Input Voltage Range -0.5 to 6.5 V V O Voltage applied to output in high impedance or I OFF state -0.5 to 6.5 V V O Voltage applied to output in high or low state -0.3 to V CC +0.5 V I IK Input Clamp Current V I < 0-50 ma I OK Output Clamp Current V O < 0-50 ma I O Continuous output current ±50 ma I CC,, I GND Continuous current through V CC or GND ±100 ma T J Operating Junction Temperature -40 to +150 C T STG Storage Temperature -65 to +150 C P TOT Total Power Dissipation 500 mw Note: 4. Stresses beyond the absolute maximum may result in immediate failure or reduced reliability. These are stress values and device operation should be within recommend values. Recommended Operating Conditions (Note 5) (@T A = +25 C, unless otherwise specified.) Symbol Parameter Conditions Min Max Unit V CC Supply Voltage 1.65 5.5 V V I Input Voltage 0 5.5 V V O Output Voltage Active Mode 0 V CC V V CC = 0V; Power Down Mode 0 5.5 V Δt/ΔV Input transition rise or fall rate V CC = 1.65V to 2.7V 20 V CC = 2.7V to 5.5V 10 ns/v T A Operating free-air temperature -40 +125 C Notes: 5. Unused inputs should be held at V CC or Ground. 3 of 10

Electrical Characteristics (@T A = +25 C, unless otherwise specified.) Symbol Parameter Test Conditions V CC T A = -40 C to +85 C T A = -40 C to +125 C Min Max Min Max Unit V IH High-level Input Voltage 1.65V to 1.95V 0.65 X V CC 0.65 X V CC 2.3V to 2.7V 1.7 1.6 2.7V to 3.6V 2.0 2.0 V V IL Low-level input voltage 1.65V to 1.95V 0.35 X V CC 0.35 X V CC 2.3V to 2.7V 0.7 0.7 2.7V to 3.6V 0.8 0.8 V I OH = -100μA 1.65V to 3.6V V CC 0.2 V CC 0.3 V OH High Level Output Voltage I OH = -4mA 1.65V 1.2 I OH = -8mA 2.3V 1.9 I OH = -12mA 2.7V 2.2 2.05 3.0V 2.3 2.1 V I OH = -24mA 3.0V 2.2 2.0 I OH = 100μA 1.65V to 3.6V 0.2 0.3 V OL High-level Output Voltage I OH = 4mA 1.65V 0.45 0.6 I OH = 8mA 2.3V 0.70 0.85 I OH = 12mA 2.7V 0.40 0.6 3.0V 0.55 0.6 V I OH =-24mA 3.0V 0.55 0.6 I I Input Current V I =GND to 5.5V 3.6V ± 5 ± 20 μa I OFF Power Down Leakage Current V I or V O = 0V to 3.6V 0 10 20 μa I CC Supply Current V I = GND or V CC I O =0 3.6V 10 40 μa Additional One input at V CC ΔI CC Supply 0.6V Other at V CC or 2.7V to 3.6V 500 5000 μa Current Gnd. 4 of 10

Switching Characteristics Symbol t PD t SK(0) Parameter Propagation Delay A N or B N to Y N Output Skew Time Test Conditions Figure 1 V CC T A = +25 C -40 C to +85 C -40 C to +125 C Unit Min Typ Max Min Max Min Max 1.65V to1.95v 1.0 5.0 9.3 1.0 9.8 1.0 11.3 2.3V to 2.7V 1.0 2.9 6.4 1.0 6.9 1.0 9.0 ns 2.7V 1.0 3.0 4.6 1.0 4.8 1.0 6.0 3V to 3.6V 1.0 2.6 3.9 1.0 4.1 1.0 5.5 3V to 3.6V 1.0 1.5 ns Operating Characteristics (@T A = +25 C, unless otherwise specified.) C pd C I Parameter Power dissipation capacitance per gate Input Capacitance Test Conditions V CC = 1.8V V CC = 2.5V V CC = 3.3V Typ Typ Typ Unit f = 10 MHz 7.0 7.5 8.0 pf V i = V CC or GND 4 4 4 pf Package Characteristics Symbol Parameter Test Conditions V CC Min Typ Max Unit θ JA Thermal Resistance SO-14 TBD (Note 6) Junction-to-Ambient TSSOP-14 159 o C/W θ JC Thermal Resistance SO-14 TBD (Note 6) Junction-to-Case TSSOP-14 25 o C/W Note: 6. Test condition for SO-14 and TSSOP-14: Device mounted on FR-4 substrate PC board, 2oz copper, with minimum recommended pad layout. 5 of 10

Parameter Measuement Information V CC Inputs V I t r /t f V M C L R L 1.8V±0.15V V CC 2ns V CC /2 30pF 1KΩ 2.5V±0.2V V CC 2ns V CC /2 30pF 500Ω 2.7V 2.7V 2.5ns 1.5V 50pF 500Ω 3.3V±0.3V 2.7V 2.5ns 1.5V 50pF 500Ω Voltage Waveform Pulse Duration Voltage Waveform Propagation Delay Times Inverting and Non Inverting Outputs Notes: A. Includes test lead and test apparatus capacitance. B. All pulses are supplied at pulse repetition rate 10 MHz C. Inputs are measured separately one transition per measurement D. t PLH and t PHL are the same as t PD Figure 1. Load Circuit and Voltage Waveforms 6 of 10

Ordering Information Notes: Device Package Code Packaging (Note 7) Quantity 13 Tape and Reel Part Number Suffix S14-13 S14 SO-14 2500/Tape & Reel -13 T14-13 T14 TSSOP-14 2500/Tape & Reel -13 7. The taping orientation and tape details can be found at http:///datasheets/ap02007.pdf Marking Information (1) SO-14, TSSOP-14 Part Number S14 T14 Package SO-14 TSSOP-14 7 of 10

Package Outline Dimensions (All dimensions in mm.) Package Type: SO-14 B 7 (4x) D e A2 A1 E A H Gauge Plane L θ Detail A Detail A SO-14 Dim Min Max A 1.47 1.73 A1 0.10 0.25 A2 1.45 Typ B 0.33 0.51 D 8.53 8.74 E 3.80 3.99 e 1.27 Typ H 5.80 6.20 L 0.38 1.27 θ 0 8 All Dimensions in mm Package Type: TSSOP-14 Pin# 1 Indent G a1 K A B D L C F1 F Detail A a 2 0.25 Gauge Plane Seating Plane TSSOP-14 Dim Min Max a1 7 (4X) a2 0 8 A 4.9 5.10 B 4.30 4.50 C 1.2 D 0.8 1.05 F 1.00 Typ F1 0.45 0.75 G 0.65 Typ K 0.19 0.30 L 6.40 Typ All Dimensions in mm Detail A 8 of 10

Suggested Pad Layout Package Type: SO-14 X Y C2 C1 Dimensions Value (in mm) X 0.60 Y 1.50 C1 5.4 C2 1.27 Package Type: TSSOP-14 X Y C2 C1 Dimensions Value (in mm) X 0.45 Y 1.45 C1 5.9 C2 0.65 9 of 10

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