ECE 25 VI Diode Circuits Lab VI Digital Electronic Circuits In this lab we will look at two different kinds of inverters: nmos versus CMOS. VI.1 PreLab 1) Power consideration of inverters: a. Using PSICE, plot the transfer function (Vo as a function of Vin) for both circuits in Figure V1. b. What logic function do both of these circuits demonstrate? c. Add a plot to the probe window and show the nfet drain current as a function of Vin for both circuits. d. What does this tell you about the power considerations between the nmos and CMOS inverter? e. What do you predict the purpose of the LED is for this experiment? 2) Inverter transfer function: a. Remove the LED for both circuits and the RD for the CMOS circuit as shown in Fig. V2. b. Simulate Vo as a function of time and the transfer function for both circuits on a single graph. c. Find V IL, V IH, V OL, and V OH on the transfer function and place these values in Table V2. d. What do you notice about the difference between these two transfer functions? 3) Propagation Delay: a. Simulate the rise and fall time for both circuits. You will have to set up a pulse waveform (VPULSE) to drive stepfunctions into the circuit. Double click on the source and a new window will appear. You can fill out the fields that are slashed. The fields that you need to setup are shown in the graphic below. You will also need to include the rise time =.1usec and fall time =.1usec. Finally, you will need to include the initial voltage (V) and the pulsed voltage (5V). Given the worst case rise/fall time that you calculated in part (b), set up your pulse so that you can measure all of the rise and fall times for both circuits in one full period. period delay Pulse width b. Place your calculated and simulated rise and fall times in Table V3. c. What do you notice about the rise and fall times of the nmos and CMOS inverters? VI.2 Power Considerations of Inverters Wire the circuits in Figure V1. Use the 5V DC power supply to drive the gates of both circuits.. (If you drive both circuits in parallel with a single source, you can get through this part of the lab more quickly!) Sweep the input from.4v to 5V in.2v increments. Measure Vout, VR, and note the brightness of the LED in both circuits. Fill out the fields in Table V1. (Note: you can place these table values into excel directly and create the table in excel or write them into this table.) ECE25 Lab VI Page 1 of 7
Calculate the transistor current for each input using the formula: (VRVout)/RD and place these results into Table V1. Note what region of operation each transistor is in as the input is swept and place this into Table V1a and Table V1b. Answer the following questions: o In what state (Vo = or Vo=1) does the nmos inverter consume a lot of power? o What about the CMOS inverter allows it to consume less power? M3 VR D1 LED ZVP336A D2 LED VRcmos M1 Vin1a DC = 1V (a) Vout R1 2 ZVN336A V1 DC = 5 Figure V1: (a) nmos Inverter (b) CMOS Inverter with LED to show current flow. M2 Vin1b DC = 1V (b) R2 2 VoutCMOS ZVN336A ECE25 Lab VI Page 2 of 7
Vin Vout VR IR= (VRVout)/R.4.6.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5 LED Brightness nmos nfet region of op. Table V1a: Measurement for DC Sweep of nmos Inverter ECE25 Lab VI Page 3 of 7
Vin Vout VR IR= (VRVout)/R.4 LED Brightness CMOS nfet region of op. CMOS pfet region of op..6.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5 Table V1b: Measurement for DC Sweep of CMOS Inverter ECE25 Lab VI Page 4 of 7
VI.3 Inverter Transfer Function Wire the circuits in Figure V2. Drive the input of each inverter with a 5Hz triangle wave with an amplitude of 5V. Be sure and set the Load Impedance of the function generator to High Z. Obtain a scope plot of V o versus time and V IN versus time for each inverter. Print your scope plot and compare the scope plot to your PSpice plot. Obtain a plot of the transfer function, Vo versus Vin. Find V IL, V IH, V OL, and V OH for each inverter and place the measured results into Table V2. M6 R3 2 ZVP336A Vout2 VoutCMOS2 M4 ZVN336A M5 ZVN336A Vin2a FREQUENCY = 5 AMPLITUDE = 2.5 V2 DC = 2.5V Vin2b FREQUENCY = 5 AMPLITUDE = 2.5 V3 DC = 2.5V (a) (b) Figure V2: (a) nmos and (b) CMOS Inverter Circuit VIL PSpice Measured VIH VOL VOH Table V2: Measurements for Transfer Function Answer the following questions: How did your PSpice results compare to your measurements? How are the transfer functions different? What do your results tell you about the nmos versus CMOS inverter? ECE25 Lab VI Page 5 of 7
VI.4 Inverter Propagation Delay Add a 1uF load capacitor to the inverter circuits as shown in Figure V3. M9 ZVP336A R4 2 VoutCMOS3 M7 Vout3 ZVN336A C1 1u M8 ZVN336A C2 1u Vin3a Vin3b Figure V3: Diode clipping circuit. We will now find the propagation delay for the inverter. Set your scope to source a square wave with a frequency of 1kHz an amplitude of 5V. You will need to add a DC offset voltage to your square wave to get it to go from V to 5V. Measure both Vin and Vout with the scope and determine the propagation delay from high to low and from low to high for each circuit. Record your measurements in Table V3. Answer the following questions: PSpice Measured nmos Inverter: tprop high to low nmos Inverter: tprop low to high CMOS Inverter: tprop high to low CMOS Inverter: tprop low to high Table V3: Measurements for Transfer Function Were your measurements within the min/max tolerance? If not, why not? Why were the high to low and low to high propagation delays different? What do your results tell you about the nmos versus CMOS inverter? ECE25 Lab VI Page 6 of 7
VI.5 Lab 5 Check Sheet 1. Power Considerations PSpice transfer function with current for both circuits DC measurements in Table V1a and Table V1b. Answer to questions 2. Inverter Transfer Function PSpice plot of V IN and V o versus time for both circuits. Measured plot of V IN and V o versus time for both circuits. PSpice transfer characteristic for both circuits. Measured transfer characteristic for both circuits. Table V2 completed. Answers to questions 3. Propagation Delay PSpice plot of propagation delay for both circuits. Measured plot of propagation delay for both circuits. Table V3 completed. Answers to questions. ECE25 Lab VI Page 7 of 7