FQB34P10 P-Channel QFET MOSFET

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FQB34P10 P-Channel QFET MOSFET 100 V, -33.5 A, 60 mω Description This P-Channel enhancement mode power MOSFET is produced using Fairchild Semiconductor s proprietary planar stripe and DMOS technology. This advanced MOSFET technology has been especially tailored to reduce on-state resistance, and to provide superior switching performance and high avalanche energy strength. These devices are suitable for switched mode power supplies, audio amplifier, DC motor control, and variable switching power applications. Features -33.5 A, -100 V, R DS(on) = 60 mω (Max.) @ =.10 V, I D = -16.75 A Low Gate Charge (Typ. 85 nc) Low Crss (Typ. 170 pf) 100% Avalanche Tested March 2016 175 C Maximum Junction Temperature Rating S D G G S D 2 -PAK D Absolute Maximum Ratings T C = 25 C unless otherwise noted. Symbol Parameter FQB34P10TM Unit S Drain-Source Voltage -100 V I D Drain Current - Continuous (T C = 25 C) -33.5 A - Continuous (T C = 100 C) -23.5 A I DM Drain Current - Pulsed (Note 1) -134 A S Gate-Source Voltage ± 25 V E AS Single Pulsed Avalanche Energy (Note 2) 2200 mj I AR Avalanche Current (Note 1) -33.5 A E AR Repetitive Avalanche Energy (Note 1) 15.5 mj dv/dt Peak Diode Recovery dv/dt (Note 3) -6.0 V/ns P D Power Dissipation (T A = 25 C) * 3.75 W Power Dissipation (T C = 25 C) 155 W - Derate above 25 C 1.03 W/ C T J, T STG Operating and Storage Temperature Range -55 to +175 C T L Maximum lead temperature for soldering, 1/8" from case for 5 seconds Thermal Characteristics 300 C Symbol Parameter FQB34P10TM Unit R JC Thermal Resistance, Junction to Case, Max. 0.97 R JA Thermal Resistance, Junction to Ambient (Minimum Pad of 2-oz Copper), Max. 62.5 Thermal Resistance, Junction to Ambient (*1 in 2 Pad of 2-oz Copper), Max. 40 o C/W 1

Package Marking and Ordering Information Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity FQB34P10TM FQB34P10 D 2 -PAK Tape and Reel 330 mm 24 mm 800 units Electrical Characteristics T C = 25 C unless otherwise noted. Symbol Parameter Test Conditions Min. Typ. Max. Unit Off Characteristics BS Drain-Source Breakdown Voltage = 0 V, I D = -250 µa -100 -- -- V BS Breakdown Voltage Temperature I / T J Coefficient D = -250 µa, Referenced to 25 C -- -0.1 -- V/ C I DSS = -100 V, = 0 V -- -- -1 µa Zero Gate Voltage Drain Current = -80 V, T C = 150 C -- -- -10 µa I GSSF Gate-Body Leakage Current, Forward = -25 V, = 0 V -- -- -100 na I GSSR Gate-Body Leakage Current, Reverse = 25 V, = 0 V -- -- 100 na On Characteristics (th) Gate Threshold Voltage =, I D = -250 µa -2.0 -- -4.0 V R DS(on) Static Drain-Source V On-Resistance GS = -10 V, I D = -16.75 A -- 0.049 0.06 Ω g FS Forward Transconductance = -40 V, I D = -16.75 A -- 23 -- S Dynamic Characteristics C iss Input Capacitance = -25 V, = 0 V, -- 2240 2910 pf C oss Output Capacitance f = 1.0 MHz -- 730 950 pf C rss Reverse Transfer Capacitance -- 170 220 pf Switching Characteristics t d(on) Turn-On Delay Time -- 25 60 ns = -50 V, I D = -33.5 A, t r Turn-On Rise Time R G = 25 Ω -- 250 510 ns t d(off) Turn-Off Delay Time -- 160 330 ns t f Turn-Off Fall Time (Note 4) -- 210 430 ns Q g Total Gate Charge = -80 V, I D = -33.5 A, -- 85 110 nc Q gs Gate-Source Charge = -10 V -- 15 -- nc Q gd Gate-Drain Charge (Note 4) -- 45 -- nc Drain-Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Drain-Source Diode Forward Current -- -- -33.5 A I SM Maximum Pulsed Drain-Source Diode Forward Current -- -- -134 A V SD Drain-Source Diode Forward Voltage = 0 V, I S = -33.5 A -- -- -4.0 V t rr Reverse Recovery Time = 0 V, I S = -33.5 A, -- 160 -- ns Q rr Reverse Recovery Charge di F / dt = 100 A/µs -- 0.88 -- µc Notes: 1. Repetitive rating : pulse-width limited by maximum junction temperature. 2. L = mh, I AS = -33.5A, = -25 V, R G = 25 Ω, starting T J = 25 C. 3. I SD -33.5 A, di/dt 300 A/µs, BS, starting T J = 25 C. 4. Essentially independent of operating temperature. 2

Typical Characteristics -, Drain-Source Voltage [V] Figure 1. On-Region Characteristics 10 2 10 1 10 0 175 25-55 1. = -40V 2. 250μs Pulse Test 10-1 2 4 6 8 10 -, Gate-Source Voltage [V] Figure 2. Transfer Characteristics 10 2 R DS(on) [Ω], Drain-Source On-Resistance R, Reverse Drain Current [A] 10 1 10 0 175 25 1. = 0V 2. 250μs Pulse Test 10-1 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -V SD, Source-Drain Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature Capacitances [pf] 6500 6000 5500 5000 4500 4000 3500 3000 2500 2000 1500 1000 500 C oss C iss C rss 0 10-1 10 0 10 1, Drain-Source Voltage [V] C iss = C gs + C gd (C ds = shorted) C oss = C ds + C gd C rss = C gd 1. = 0 V 2. f = 1 MHz -, Gate-Source Voltage [V] 12 10 8 6 4 2 = -20V = -50V = -80V 0 0 20 40 60 80 100 Q G, Total Gate Charge [nc] Note : I D = -33.5 A Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics 3

Typical Characteristics (Continued) -BS, (Normalized) Drain-Source Breakdown Voltage 1.2 1.1 1.0 0.9 0.8-100 -50 0 50 100 150 200 T J, Junction Temperature [ o C] 1. = 0 V 2. I D = -250 μa Figure 7. Breakdown Voltage Variation vs. Temperature R DS(ON), (Normalized) Drain-Source On-Resistance 2.5 2.0 1.5 1.0 0.5 0.0-100 -50 0 50 100 150 200 T J, Junction Temperature [ o C] 1. = -10 V 2. I D = -16.75 A Figure 8. On-Resistance Variation vs. Temperature 10 2 10 1 10 0 Operation in This Area is Limited by R DS(on) 1. T C = 25 o C 2. T J = 175 o C 3. Single Pulse 100 μs 1 ms 10 ms DC 40 35 30 25 20 15 10 5 10-1 10 0 10 1 10 2 -, Drain-Source Voltage [V] 0 25 50 75 100 125 150 175 T C, Case Temperature [ ] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature 10 0 Z JC (t), Thermal Response [ o C/W] 10-1 10-2 D=0.5 0.2 0.1 0.05 1. Z θ JC (t) = 0.97 /W Max. 2. Duty Factor, D=t /t 3. T JM - T C = P DM * Z 1 2 (t) θ JC P 0.02 DM 0.01 t 1 single pulse t 2 10-5 10-4 10-3 10-2 10-1 10 0 10 1 t 1, Square Wave Pulse Duration [sec] Figure 11. Transient Thermal Response Curve 4

12V I G = const. 200nF 50KΩ 300nF Same Type as DUT DUT Q gs Figure 12. Gate Charge Test Circuit & Waveform Q g Q gd Charge R L t on t off R G 10% t d(on on) t r t d(of off) tf DUT 90% Figure 13. Resistive Switching Test Circuit & Waveforms I D L E AS - BV 1 DSS = --- LI 2 2 AS -------------------- BV t p BS - Time R G I D (t) (t) t p DUT I AS BS Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms 5

R G DUT I SD Driver + _ Compliment of DUT (N-Channel hannel) L dv/dt dt controlled by R G I SD controlled by pulse period ( Driver ) D = --- Gate Pul uls --------- e Width -------- ----- - Gate Pulse Period 10V I SD ( DUT ) ( DUT ) I FM Body Diode Reverse Current FM, Body Diode Forward Current V SD I RM di/dtdt Body Diode Forward Voltage Drop Body Diode Recovery dv/dt Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms 6

Mechanical Dimensions 7

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Preliminary No Identification Needed Obsolete First Production Full Production Not In Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. 8 Rev. I77