Chapter 3 Voltage Fed DC-DC Converters with Voltage Doubler 3.1 INTRODUCTION The primary objective of the research pursuit is to propose and implement a suitable topology for fuel cell application. The motivation for this research work emanated at Centre for fuel cell technology, ARCI, IITM Research Park, Chennai to circumvent the problems faced in their existing fuel cell power generation system. For fuel cell systems, several converters have been studied in publications. A voltage source inverter (Jiang X et al 2005), is common solution to feed in electrical energy into the three phase mains. To feed the high dc link voltage necessary for the voltage source inverter, a dc/dc converter is used between the fuel cell stack and the inverter.voltage-fed full bridge converters (Majid Pahlevaninezhad et al 2012 and DhathathreyanK.S 2013) are widely used when compared with other topologies A boost converter provides specific advantages like high efficiency and low component quantity (Mohr, M. and Fuchs, F.W 2005) for low ratios (i.e. 1:1 to 1:3) between fuel cell stack voltage and dc link voltage. For higher ratios, transformer less converters becomes less applicable (Solmecke, H 1998).DC/DC converters with high frequency transformers overcome these problems. They achieve the capability of high voltage ratios due to the magnetic coupling and turns ratio of the transformer. In addition they also provide galvanic isolation between the fuel cell and the mains. Fuel cell power generation system incorporates various types of voltage fed dc-dc converters like fly back converter, push pull converter, half bridge and full bridge converters. Figure 3.1 indicates circuit diagrams of these topologies. (Figure 3.1 (a)) Half bridge converter is efficient for low power applications but due to the asymmetric operation of two switches imbalance takes place on the high frequency transformer resulting in usage of switches which have current rating double that of full bridge converter (Su, G.J. and F.Z.Peng 2005).For power levels less than 75W (Oruganti, R. 2004).Fly back converter (Figure 3.1 (b)) is appropriate. High output voltage can be obtained with simple circuit having only single switch but at the cost of 38
high voltage stress with the presence of leakage inductance of coupled inductor there by reducing efficiency of the converter. Hence to improve its efficiency a novel converter same as that of active clamp converter is proposed by the authors (Zhao.Q and F.C. Lee 2003). In this active clamp is replaced by an additional diode and a coupled winding. This helps in reducing circulating current which further reduces leakage loss. Also diode reverse recovery is enhanced and voltage stress on the switches is also reduced using this topology thereby improving efficiency of the converter. Combination of SEPIC and fly back is used as another converter topology which can have high output voltage, high efficiency characteristics (Su-Jin Jang et al 2005) and also component utilization. For low power systems push pull topology (Figure.3.1(c)) is proposed. Fuel cell stack voltage can be boosted from 48v to 200v at high switching frequency which is given in (Gopinath. R et al 2002 and Mazumdar. J. et al 2002) Push pull converter consists of centre tapped transformer whose windings of two halves cannot be wound in symmetric manner. Due to this transformer gets saturated (Robert W. Erickson and DraganMaksimovic 2000) by a slight unbalanced excitation during high powers. Therefore a three paralleled push pull converter is used by authors Todorovic. M.H et al (2003) to rectify this problem. Furthermore a coupled inductor is used at transformer secondary side to make sure that no significant imbalance occurs between device currents. Many pleasing characteristics such as small ripple current, reduction in filter size and equal division of switch stress (Smith.C et al 2003) is obtained by three phase dc-dc converter (Figure 3.1(e)) but driver circuit and control design is complex with increase in phase number. The application of asymmetrical duty cycle of three phase dcdc converter is presented in (Oliveria. D.S et al 2005).The converter which has advantages of three phase configurations and ZVS commutation are combined for wide load range applications. Voltage fed full bridge dc-dc converters (Figure 3.1 (d)) are conventionally used in fuel cell power systems (Jason Lai 2004; Santi. E et al 2002; Turkey.A.M and J.N Krase 2002; Troy Nergaard, Jeremy Ferrell and Leonard Leslie 2001; Troy A. Nergaard et al 2002; Wang.J et al 2004; Cha. H.J and P.N Enjeti 2004) soft switching techniques 39
are adopted for elimination of switching losses and proper switch utilization. This topology is normally used in converter which produces low output voltage due to the presence of transformer isolated buck converter. To obtain high output voltage transformer turns ratio should undergo step up action but this high turn s ratio transformer increases leakage inductance and also transformer loss. Another drawback of voltage fed converters is the absence of direct control of input current. Hence to reduce the current ripple large input capacitors are needed along with LC filter. (a) half bridge (b) flyback (c) Push pull (d) full bridge (e) Three Phase Figure 3.1 Voltage fed DC-DC converters for fuel cell application 40
In this chapter to study the feasibility of the existing voltage fed converters for fuel cell applications, a voltage fed full bridge DC-DC converter with voltage doubler is proposed which is shown in Figure 3.2 The proposed converter is analyzed, simulated and tested in a laboratory, for its performance for the intended application. Four MOSFET s are used in the primary side of the bridge and these MOSFET s are driven by PWM signals with dead time as shown in Figure 3.2. MOSFET s are chosen as switching devices because the fuel cell voltage or input to the voltage fed converter is low. The high frequency transformer is modeled by the following: the transformer has the turn s ratio n, and its leakage inductance L k. The rectification on the secondary side is realized with a Voltage doubler consisting of diodes D1 D2 and capacitors C1 and C2. 3.2 STEADY STATE ANALYSIS OF VOLTAGE FED CONVERTER WITH VOLTAGE DOUBLER. For the analysis and steady state operation of VSI fed front end DC-DC converter consider the following modes of operation with four switches S1,S2,S3 and S4 in which two pair of switches conduct at a time and other two pair of switches are 180 0 phase shifted. To understand the implementation capability of the conventional VSI fed converters for the intended application a full bridge voltage fed DC-DC converter was proposed as shown in figure 3.2 Figure 3.2 Voltage fed DC-DC converter with voltage doubler 41
The steady state analysis of proposed voltage fed full bridge dc-dc converter with different operating modes is as follows. MODE 1 (t 0 < t < t 1 ) At the starting of this interval switches S1 and S4 are gated for turn-on. Input current flows from switch S1, leakage inductance Lr, transformer primary winding and switch S3. Due to the dot polarity secondary side diode Dr1 is forward biased and charges Cr1 capacitor. Figure 3.3 shows mode-1 equivalent circuit. I p V dc V L r 0 / 2n ( t t 0 ) (3.1) Figure 3.3 Mode-1 equivalent circuit. MODE 2 (t 1 < t< t 2 ) In this interval switch S1 is turned off and Switch parasitic capacitance C1 will gets discharged and C3 gets charged by using Leakage inductor (Lr) current. On secondary side still Dr1 is conducting to charge Cr1 capacitance. Figure 3.4 shows mode- 2 equivalent circuit. i p( 1 V t) ip( t1)cos ( t t ) (3.2) c1( t1 t) ip( t1). Z.sin ( t ) (3.3) 42
V c3( t1 t) Vdc ip( t1). Z.sin ( t ) (3.4) 1 Where and 2C.Lr Z Lr 2. C Figure 3.4 Mode-2 equivalent circuit. MODE 3 (t 2 < t< t 3 ) In this interval switch parasitic capacitance of S1 completely discharges and C3 gets completely charged and now the body diode of switch S3 starts conducting to ensure for ZVS turn-on of the primary switch. Figure 3.5 shows mode-3 equivalent circuit. V 0 / 2. n ip( t ) ip( t 2) ( t t 2) L r (3.5) Figure 3.5 Mode-3 equivalent circuit. 43
MODE 4 (t 3 < t< t 4 ) In this interval primary switch S4 are gated for turn-off, now C2 gets discharged and C4 gets charged resonantly through leakage inductor (Lr) current. This interval is very short period. Figure 3.6 shows mode-4 equivalent circuit. i p( 3 V V t) ip( t3)cos ( t t ) (3.6) c4( t3 t) ip( t3). Z.sin ( t ) (3.7) c2( t3 t) Vdc ip( t3). Z.sin ( t ) (3.8) Where 1 and 2C.Lr Z Lr 2. C Figure 3.6 Mode-4 equivalent circuit. MODE 5 (t 4 < t< t 5 ) In this interval C2 gets completely discharged and the body diode of switch-2 starts conducting automatically. Now we can ensure ZVS turn-on for both the switches S2 and S3. Figure 3.7 shows mode-5 equivalent circuit. 44
V dc V 0 / 2. n ip( t) ip( t 4) ( t t 4) L r (3.9) Figure 3.7 Mode-5 equivalent circuit. MODE 6 (t 5 < t< t 6 ) In this interval the switches S2 and S3 are gated for turn on the primary side input current flows in reverse direction causing the secondary side diode Dr2 to conduct and charge the Cr2 capacitance. Figure 3.8 shows mode-6 equivalent circuit.steady state operating wave forms in below figure 3.9 Figure 3.8 Mode-6 equivalent circuit. 45
Figure 3.9 Steady state waveforms 3.3 SIMULATION OF THE VOLTAGE FED DC-DC CONVERTER In Section 3.2, the analytical performance of the voltage fed DC-DC converter is studied. In this section the voltage fed DC-DC converter with voltage doubler is simulated in PSIM software and the results are discussed. Simulation is done with time step of 2E-008 and run time of 0.3 seconds. The circuit parameters are shown below in table 3.1. The simulation circuit with parameter is shown in Figure 3.10 Table 3.1 Simulation circuit Parameters S.No Parameters Values 1 Input Voltage 21V 2 Output Voltage 350 V 3 Switching Frequency 100kHz 4 Output Power 200W 5 High frequency transformer turns ratio 1:9 46
Figure 3.10 Simulation circuit of voltage fed DC-DC converter with voltage doubler Figure 3.11 Switching Pulses Figure 3.11 shows the switching pulses for the MOSFETS. For S1 and S4 identical pulses are supplied and similarly for S2 and S3 are identical pulses are supplied. To achieve Zero Voltage soft switching a small dead time is given between S1, S3 and S2, S4.The duty cycle is 0.47 and switching frequency is 10 khz. 47
Figure 3.12 Output voltage and current Figure 3.12 shows output voltage and current waveforms. For an input Voltage of 22V, 350V is obtained as an output. From the voltage waveform, it s clear that the ripple in output voltage is less than 2%. Figure 3.13 ZVS of switches S 1 &S 2 The above Figure 3.13 and Figure 3.14 illustrates zero voltage switching of switch S2, which starts conducting only after its drain to source voltage becoming zero. The switching pulse is given only when body diode conducts which ensures there is no voltage across the switch. Similarly Figure 3.15 shows the Zero voltage soft switching of switch S3. 48
Figure 3.14 Switching pulse (V gs ) and Drain to source voltage (V ds ) Figure 3.15 V gs,v ds and Drain current (I d ) of switches S 3 &S 4 Figure 3.16 ZVS of Switch 3 49
Figure 3.16 shows the Switching pulse, and drain to source voltage waveform of switch S3. From the figure it s clear that the drain to source voltage reaching zero and switching pulse is realized. Figure 3.17 Leakage current (I lk ), Transformer primary and secondary voltages Figure 3.17shows the leakage inductance current, transformer primary and secondary voltage and current waveforms. The turn s ratio of the transformer is 1:9 and switching frequency is 100 KHz. Figure 3.18 Input current 50
Figure 3.18 shows the input current waveform. From the input current waveform, it s clear that input current goes in negative direction also. The simulation waveforms are closely match with the theoretical waveforms as discussed in section 3.2, Figure 3.9 3.4 HARDWARE IMPLEMENTATION 3.4.1 HARDWARE TEST BENCH SET-UP The voltage fed DC-DC converter with voltage doubler has been built as a laboratory prototype. The primary objective is to study about the existing voltage fed converter; the hardware is built with the following specifications as shown in Table 3.2. H-Bridge Section The front end of the power stage for the voltage fed full bridge dc-dc converter is shown in Figure 3.19. It consists of four switches. The main objective is to study about existing voltage fed converter for fuel cell applications, the converter is designed with low power level. The input voltage varies between 19 to 26 V; the maximum switch stress voltage is also less only. IRFZ44N power MOSFET with 55V, 49A is used. The hardware model is shown in Figure 3.19. All these switches are controlled by AT89C51. Figure 3.19 MOSFET Switches 51
Gate Drivers AT89C51 is used to generate the required pulse for the four MOSFET switches. The frequency range is 10 khz. The output signal from AT89C51 is only 5V. 5V pulse voltage is not sufficient to drive the MOSFET switches. More V gs is required. So between the low power circuit and the high power circuit isolation circuit is required. This requirement is fulfilled by the driver circuit. IR2110 drivers are used. The control circuit is shown in Figure 3.20 Figure 3.20 Driver circuit Voltage doubler A voltage doubler circuit is shown in Figure 3.21 along with the phase shift converter on the primary side of the transformer. It can be thought of it as two half-wave rectifier circuits in series. The output of the voltage doubler is twice the input given to the phase shift converter. V 0 = 2 V in During the positive half-cycle one of the diodes (D1) conducts and charges the capacitor (C1). The equivalent circuit thus can be shown as follows: 52
Figure 3.21 Equivalent circuit of operating modes in voltage doubler circuit During the negative half-cycle the other diode (D2) conducts negatively to charge the other capacitor (C2). The voltage across the combination is therefore equal to twice the peak voltage. In this type of circuit it has to be assumed that the load does not draw a significant charge from the capacitors. The hardware set up is shown in Figure 3.22 Figure 3.22 Voltage doubler 53
Electronic Load A chroma DC/AC electronic load is used to load the converter. Setup is shown in Figure 3.23. The specification is DC Voltage 350V and power 1.8KW with maximum current of 18A. Figure 3.23 Electronic load 3.4.2 TESTING A test bench set up of the developed converter is shown in Figure 3.24. Programmable DC power supply (Chrome, 80V, 60A, 1.2KW) is used as input source. Electronic resistive load (Chrome, 500V and 1 KW) is used to load the converter. For measurements, Agilent digital scope DSO-X-3014A is used. 54
Figure 3.24 Hardware Set up Table 3.2 Hardware parameters S.No Parameters Values 1 MOSFETS IRFZ44 3 Transformer turns ratio 4 Doubler Capacitors 1:9 22uF,450V 5 Output Power 16W 6 PIC controller AT89c51 7 Driver IC IR2110 55
Figure 3.25 Hardware test bench set up 56
3.5 HARDWARE RESULTS 3.5.1 SWITCHING PULSE WAVEFORM Figure 3.26 Switching pulses Figure 3.26 shows the switching pulses for the MOSFETS. The switching frequency is 9.009 khz and duty cycle is 0.486. A dead time is given between S1, S3 and S2, S4 to ensure the ZVS.The duty cycle cannot increase above 50%. Hence voltage fed converter has duty cycle loss. 3.5.2 INPUT VOLTAGE AND CURRENT WAVEFORMS Figure 3.27 shows the input voltage and current waveforms. Channel 3 represents the input voltage and its scale is 20V/div. 18.7 V is measured as input voltage. Channel 2 represents input current waveform and its scale is 5A/div. The average input current is 884.1 ma. 57
Figure 3.27 Input voltage and input current 3.5.3 OUTPUT WAVEFORMS The converter is tested with Electronic load (Chrome). The measurements are shown in Figure 3.28. From the measurements it is clear that the output voltage is 352.91 v and output current is 0.04 A. The output voltage and current waveforms are shown in Figure 3.29. The output voltage waveform represented in channel 1 with 100V/div and output current waveform is represented by channel 4 with 600mA/div. The output power (V 0 *I 0 ) is 14.1164W and the input power (V in *I in ) is 16.53267 W. The efficiency is 85.38%. 58
Figure 3.28 Output voltage and current Figure 3.29 Output measurements from Electronic load 59
3.5.4 DEVICE WAVEFORMS Figure 3.30 Soft switching (ZVS) waveforms The Figure 3.30 shows the switching pulse, drain current and drain to source voltage of MOSFET. Channel 1 represents drain to source voltage, channel 2 represents drain current and channel 3 represents switching pulse. The drain to source voltage of S3(channel 1) goes zero before the switch is turned on ensures zero voltage soft switching (ZVS). The drain current shows negative conduction, indicating that the body diode is conducting. 3.5.5 INPUT CURRENT WAVEFORM Figure 3.31 illustrated that the input current goes in negative direction. When the fuel cell is connected as a source, this negative going current will damage the stack. So to protect the fuel cell stack a unidirectional diode is necessary to connect as shown in Figure 3.32. 60
Figure 3.31 Input current waveform Figure 3.32 Setup to avoid negative current in voltage fed DC-DC converter 61
3.6 CONCLUSION Even though the voltage fed high gain DC-DC converter having advantages like electrical isolation, High voltage gain, and Zero voltage soft switching (snubber less), these converters may be not optimally suitable for the intended fuel cell application due to the following reasons: 1. Voltages fed converters always have a buck behavior. For a high voltage gain the boosting action is only performed by high frequency transformer winding ratio. Therefore, the whole voltage gain has to be provided by a large winding ratio of the high frequency transformer which decreases the power density. 2. In order to handle the input ripple current, a large number of electrolyte capacitors are essentially required, resulting in an increase in the overall size and cost. 3. As evident from Figure 3.31, it is clear that for the voltage fed DC-DC converters, source current will go in reverse direction also.when this voltage fed converters connected to the fuel cell stack, negative going source current will lead to the damage of the fuel cell stack. Therefore methods are needed to avoid reversed input current as shown in Figure 3.32 which increases the cost and degrades the efficiency of the system. 4. As evident from Figure 3.26, the voltage fed converter suffers from duty cycle loss. Duty cycle cannot be increased above 50%. Hence high voltage gain will be obtained only by increasing the turn s ratio of the isolation transformer. Because of the above mentioned issues, voltage fed converters may not be the optimal solution for fuel cell applications. To address these issues a current-fed fullbridge converter seems to be a probable option and the current fed converter is proposed in chapter 4. 62