Intenational Jounal on Recent and Innovation Tends Computg and Communication ISSN: 31-8169 Simulation of High Step-Up Resonant Paallel LC Convete fo Gid Connected Renewable Enegy Souces G Hima Bdu 1, K enkata Reddy, CH Rami Reddy 3 bdug1@gmail.com kattavenkataeddy@hotmail.com ceddy9@gmail.com Abstact:- With the apid impovement of lage-scale enewable enegy souces and HDC gid, it is a capable altenative to connect the enewable enegy souces to the HDC gid with a pue dc system, which high-powe high-voltage step-up dc dc convetes ae the key equipment to tansmit the electical enegy. This pape pesents a High step up LC convete it can achieve high voltage ga usg an LC paallel esonant tank.also povided zeo voltage switchg (ZS) technology unde switch tun- On condition also at tun-off conditions at ma powe switches by ectifyg diodes to educe the conduction losses. The opeation pciple of the convete and its esonant paamete selection is pesented this pape. The opeation pciple of the convete has been successfully veified with the help of MATLAB/SIMULINK. Keywods Renewable enegy, esonant convete, soft switchg, voltage step-up, voltage stess. ***** I.INTRODUCTION The development of enewable enegy souces is cucial to elieve the pessues of exhaustion of the fossil fuel and envionmental pollution. At pesent, most of the enewable enegy souces ae utilized with the fom of ac powe. The geneation equipments of the enewable enegy souces and enegy stoage devices usually conta dc convesion stages and the poduced electical enegy is deliveed to the powe gid though dc/ac stages, esultg additional enegy loss. Moeove, the common poblem of the enewable enegy souces, such as wd and sola, is the lage vaiations of output powe, and the connection of lage scale of the enewable souces to the powe gid is a huge challenge fo the taditional electical equipment, gid stuctue, and opeation. DC gid, as one of the solutions to the afoementioned issues, is an emegg and pomisg appoach which has dawn much attention ecently [1] [4]. At pesent, the voltages ove the dc stages the geneation equipments of the enewable enegy souces ae elatively low, the ange of seveal hunded volts to seveal thousand volts hence, high-powe high-voltage step-up dc dc convetes ae equied to delive the poduced electical enegy to the HDC gid. Futhemoe, as the connectos between the enewable enegy souces and HDC gid, the step-up dc dc convetes not only tansmit electical enegy, but also isolate o buff kds of fault conditions; they ae one of the key equipments the dc gid [5]. As of late, the poweful highvoltage step up dc dc convetes has been concentated boadly [6]-[9]. The tansfome is an advantageous way to deal with acknowledge voltage step up. The excellent full-connect (FB) convete, sgle dynamic extension (SAB) convete, what's moe, LCC full convete ae concentated on and thei execution is looked at fo the offshoe wd fam application[6]. The thee-stage topologies, fo example, thee-stage SAB convete, aangement esonant convete, and double dynamic extension convete, which ae moe suitable fo high-contol applications because of educed cuent anxiety of evey scaffold, ae additionally contemplated futhemoe, tended fo high-contol high-voltage step up applications [10]. The isg paticula dc dc convete, which utilizes two secluded multilevel convetes connected by a medium fequency tansfome, is appopiate fo the application the HDC matix [11]. Fo these disengaged topologies, the pimay deteent is the ceation of the poweful high-voltage medium-ecuence tansfome and thee is no epot about the tansfome model yet. Multiple smallcapacity isolated convetes connected seies and/o paallel to fom a high-powe high-voltage convete is an effective means to avoid the use of sgle lage-capacity tansfome [1] [14]. Fo the application whee galvanic isolation is not mandatoy, the use of a tansfome would only cease the cost, volume, and losses, especially fo high-powe high-voltage applications [15]. Seveal nonisolated topologies fo high-powe high-voltage applications have ecently been poposed and studied the liteatue [16] [17]. A boost convete is adapted by the eseaches of Conveteam company to tansmit enegy fom ± 50 to ± 00 k [18]. To obta the highe voltage ga, Enjeti et al. poposed a multiple-module stuctue, which consists of a boost convete and IJRITCC Mach 016, Available @ http://www.ijitcc.og 84
Intenational Jounal on Recent and Innovation Tends Computg and Communication ISSN: 31-8169 a buck/boost convete connected put paallel output-seies [19]. The output powe and voltage ae shaed by the two convetes and the voltage and cuent atgs of switches and diodes ae coespondgly educed. Howeve, the efficiency of a boost o buck/boost convete is elatively low due to the had switchg of the active switch and the lage evese ecovey loss of the diode. The soft-switchg technology is citical to impove the convesion efficiency, Fig.1 Poposed esonant step-up convete Especially fo high-voltage applications.recently, seveal soft-switchg topologies fo high powe high-voltage applications have been poposed. In the convete topologies based on esonant switched capacito (RSC) ae poposed with educed switchg loss and modula stuctue. The shotage of the RSC-based convete is the poo voltage egulation and the equiement of a lage numbe of capacitos. Jovcicet al. poposed a novel type of esonant step-up convete with potentially soft-switchg opeation, which utilizes thyistos as switches and does not suffe fom excessive switch stesses and evese ecovey poblems; moeove, a lage voltage ga is easily obtaed [18] [19]. Similaly, [0], a new family of esonant tansfome less modula dc dc convetes is poposed and the ma featue of the poposed convetes is that the unequal voltage stess on semiconductos of thyisto valve is avoided with the use of active switchg netwok, which is composed of an ac capacito and fou identical active switches. Thyistos have lage voltage and cuent atgs; howeve, the use of thyisto limits the switchg fequency of the convete, esultg bulky passive components and slow dynamic esponse [1]. Moeove, the esonant ductos of the convetes ae unidiectional magnetized [] [4], leadg to lowe utilization of the magnetic coe, which means that a geat volume of coe is equied. II.CONERTER STRUCTURE AND OPERATION PRINCIPLE The poposed esonant step-up convete is appeaed Fig. 1. The convete is made out of a FB switch system, which compises Q 1 though Q 4, a LC paallel esonant tank, a voltage double ectifie, and two fo blockg diodes, D b1 and D b. The consistent state wokg wavefoms ae appeaed Fig. and pot by pot opeation methods of the poposed convete ae appeaed Fig. 3. Fo the poposed convete, Q and Q 3 ae tuned on futhemoe, off at the same time; Q 1 and Q 4 ae tuned on and off all the while. Keepg md the end goal to eaange the vestigation of the convete, the takg afte suspicions ae made: 1) All switches, diodes, ducto, and capacito ae pefect segments; ) Yield channel capacitos C 1 and C ae equivalent and huge enough so that the yield voltage o is viewed as consistent an exchangg peiod T s. IJRITCC Mach 016, Available @ http://www.ijitcc.og 85
Intenational Jounal on Recent and Innovation Tends Computg and Communication ISSN: 31-8169 A. Mode 1 [t 0, t 1 ] [See Fig. 3.3(a)] Dug this mode, Q 1 and Q 4 ae tuned on esultg the positive put voltage acoss the LC paallel esonant tank, i.e., v L =v C =. The convete opeates simila to a conventional boost convete and the esonant ducto L acts as the boost ducto with the cuent though it ceasg lealy fom I 0. The load is poweed by C 1 and C. At t1, the esonant ducto cuent i L eaches I 1 T 1 I1 Io (1) L WheeT1 is the time teval of t 0 to t 1. In this mode, the enegy deliveed fom to L is 1 E L I1 I0 () Fig.. Opeatg wavefoms of the poposed convete. B. Mode [t 1, t 3 ] [See Fig.3. 3(b)] At t 1,Q 1 and Q 4 ae tuned off and afte that L esonates with C, v C deceases fom and i L ceases fomi 1 esonant fom. Takg to account the paasitic output capacitos of Q 1 though Q 4 and junction capacito of D b, the equivalent cicuit of the convete afte t 1 is shown Fig. 4(a), which CD b,cq 1, and CQ 4 ae chaged, CQ and CQ 3 ae dischaged. In ode to ealize zeo-voltage switchg (ZS) foq and Q 3, an additional capacito, whose magnitude is about ten times with espect to CQ, is connected paallel withd b.hence, the voltage acoss D b is consideed unchanged dug the chagg/dischagg pocess and Db is equivalent to be shoted. Due to C is much lage than the paasitic capacitances, the voltages acoss Q 1 and Q 4 cease slowly. IJRITCC Mach 016, Available @ http://www.ijitcc.og 86
Intenational Jounal on Recent and Innovation Tends Computg and Communication ISSN: 31-8169 Fig 4.Futhe equivalent cicuits of Mode. (a) [t 1,t ]. (b) [t,t 3 ]. IJRITCC Mach 016, Available @ http://www.ijitcc.og 87
Intenational Jounal on Recent and Innovation Tends Computg and Communication ISSN: 31-8169 Fig. 3 Equivalent cicuits of each opeation stages. (a) [t0,t1 ]. (b) [t1,t3]. (c) [t3,t4]. (d)[t4,t5]. (e) [t5,t6]. (f) [t6,t8].(g)[t8,t9].(h)[t9,t10]. As a esult, Q 1 and Q 4 ae tuned off at almost zeo voltage this mode. When v C dops to zeo, i L eaches its maximum magnitude. Afte that, v C ceases negative diection and i L decles esonant fom. At t, v C =, the voltages acossq 1 andq 4 each, the voltages acoss Q and Q 3 fall to zeo and the two switches can be tuned on unde zeo-voltage condition. It should be noted that although Q and Q 3 could be tuned on afte t, thee ae no cuents flowg though them. Aftet, Lcontues to esonate with C, v C ceases negative diection fom,i L decles esonant fom. D b will hold evesedbias voltage and the voltage acoss Q4 contues to cease fom. The voltage acoss Q 1 is kept at. The equivalent cicuit of the convete afte t is shown Fig. 4(b), which D and D 3 ae the antipaallel diodes of Q and Q 3,espectively. This mode uns until v C ceases to o/ and i L educes to I, at t 3, the voltage acoss Q 4 eaches o/ and the voltage acoss D b eaches o/. It can be seen that dug t 1 to t 3, no powe is tansfeed fom the put souce o to the load, and the whole enegy stoed the LC esonant tank is unchanged, i.e., We have whee 1 1 1 1 0 L I1 C L I C i t S t t I COS t t L 1 1 1 Z C S C t OS t t1 I1Z t t1 1 0 acs T acs LI1 LI1 C C andt is the time teval of t 1 to t 3. (3) (4) (5) (6) C. Mode 3 [t3, t4] [See Fig. 3.3(c)] Att 3,v C = o/, D R1 conducts natually, C 1 is chaged by i L though D R1,v C keeps unchanged, and i L deceases lealy. At t 4,i L = 0. The time teval of t 3 to t 4 is IL T3 (7) The enegy deliveed to load side this mode is The enegy consumed by the load half-switchg peiod is IJRITCC Mach 016, Available @ http://www.ijitcc.og o IT 4 o 3 Eout (8) 88
Intenational Jounal on Recent and Innovation Tends Computg and Communication ISSN: 31-8169 o IoTs ER (9) Assumg 100% convesion efficiency of the convete and accodg to the enegy convesation ule, half-switchg peiod Combg (7), (8), (9), and (10), we have E E E (10) out R IT o s I o L o (11) Ts IoL T3 (1) o D. Mode 4 [t 4, t 5 ] [See Fig. 3.3(d) At t 4,i L deceases to zeo and the cuent flowg thoughd R1 also deceases to zeo, and D R1 is tuned off with zeo cuent switchg (ZCS); theefoe, thee is no evese ecovey. Afte t 4, L esonates with C, C is dischaged though L, v C ceases fom o/ positive diection, and i L ceases fom zeo negative diection. Meanwhile, the voltage acossq 4 decles fom o/. At t 5,v C =, and i L = I 3. In this mode, the whole enegy stoed the LC esonant tank is unchanged, i.e. We have WheeT 4 is the time teval of t 4 to t 5. I o o 3 1 1 1 C L I C 1 C ( o 4 ) I3 (14) L o il ( t) S t t L v c T 4 IJRITCC Mach 016, Available @ http://www.ijitcc.og 5 (13) (15) ocos t t5 () t (16) 1 accos o E. Mode 5 [t 5, t 6 ] [See Fig 3.3(e)] If Q and Q 3 ae tuned on befoe t 5, then afte t 5,L is chaged by though Q and Q 3, i L ceases negative diection, and the mode is simila to Mode 1. If Q and Q 3 ae not tuned on befoe t 5, then afte t 5, L will esonate with C, the voltage of node A v A will cease fom zeo and the voltage of node B v B will decay fom zeo-voltage condition will be lost if Q and Q 3 ae tuned on at the moment. Theefoe, Q and Q 3 must be tuned on befoet 5 to educe switchg loss. The opeation modes dug [t 6,t 10 ] ae simila to Modes 4, and the detailed equivalent cicuits ae shown Fig. 3.3(f) to (h). Dug [t 6,t 10 ], Q and Q 3 ae tuned off at almost zeo voltage, Q 1 and Q 4 ae tuned on with ZS, and D R is tuned off with ZCS. III.ANALYSIS AND DESIGN OF THE CONERTER A. oltage Ratg and DC Fault Response Accodg to the analysis of Section II, the voltage stesses of Q 1 and Q ae the put voltage, the voltage stesses ofq 3 and Q 4 ae half of the output voltage, i.e., o/, the voltage stesses of D b1 and D b ae o/-. The total voltage stess of the pimay semiconducto devices is o, which is half of that. It implies that much less semiconducto devices ae equied the poposed step-up convete, esultg low conduction and switchg losses and low cost. Moeove, the peak voltages acoss (17) 89
Intenational Jounal on Recent and Innovation Tends Computg and Communication ISSN: 31-8169 the esonant ducto and esonant capacito ae o/, which is also half of that. Lowe peak voltage dicates that the sulation is easy to be implemented, leadg to the eduction of the size of the esonant tank. B. oltage Balance between C1 and C The pevious analysis is based on the assumption that voltages acoss C 1 and C ae, espectively, half of output voltage. Povided that c 1 = c, fo example, c 1 > o/ > c, accodg to the opeation pciple of Fig., the peak cuent of i c at t 3 will be smalle than that at t 8, which means that the aveage cuent flowg to C 1 will be smalle than the aveage cuent flowg to C. Due to C 1 and C powe the same load, theefoe, c 1 deceases and c ceases, and fally they shae the same output voltage. ice vesa, i.e., c 1 ceases and c deceases unde the pesumption that c 1 < o/ <c. C. Analysis of the Convete Fom Fig., we have T s T1 T T3 T4 (18) Combg (1), (), and (14) yields Fom (17), the ga of o / is expessed as Substitutg (0) to (1) yields Substitutg () to (3) yields Substitutg () to (6) yields T 1 I 1 o o s T 1 L T C 4 o I T (19) L 4 4 4 C I T C L L L I 1 o o o s o o 4 (0) cos T (1) C 4 4 I T o o o s 4L () IT o o s (3) L 1 0 acs T acs (4) 4 oiot s 4 oiot s o o C C Combg (1), (17), (18), (0), and (4), we have 4 4 4 C o o IoTs C o L L 1 acs acs 0 4 oiot s 4 oiot s o o L C C Ts IoL 1 Ts accos o o Fom (5), we can obta the followg equation unde unloaded condition (Io = 0): f f I 0 (6) s o Whee f s is the switchg fequency and f is the esonant fequency of L and C, i.e. (5) IJRITCC Mach 016, Available @ http://www.ijitcc.og 90
Intenational Jounal on Recent and Innovation Tends Computg and Communication ISSN: 31-8169 1 f (7) LC It can be seen that the switchg fequency is equal to the esonant fequency unde unloaded condition. Actually, it can be seen fom Fig. that T1 = T3 = 0 unde unloaded condition because thee is no enegy put and output if the convete is assumed to be lossless. And if Io >0, then both T1 and T3 ae lage than zeo; thus, the switchg fequency is lowe than the esonant fequency; the heavie the load, the lowe the switchg fequency. Theefoe, the maximum switchg fequency of the convete is f f (8) smax Fom the analysis of Section II, it can be seen that to ealize zeo-voltage tun-on of the switches, the mimum duty cycle of the convete is T1 Dm (9) T As shown Fig. and the pevious analysis, the mimum duty cycle also is the effective duty cycle of the convete, dug which the pimay cuent flows though the ma switches.accodg to (5), the time teval ΔT of t1 to t is The maximum duty cycle of the Convete is s acs T 4 I T D o o s o C max TS T T D. Design of the Convete A 1 MW, 4 k (±10%)/80 k step-up convete is taken as an example to design the paametes. Insulated-gate bipola tansistos (IGBTs) ae taken as the ma switches and fs max is set to be 5 khz. Fom (5), one can obta the expession of Ts associated with L unde full-load condition. Howeve, (5) dicates that Ts is an implicit function associated with L and the concete analytic solution of Ts cannot be obtaed. Hence, thee is a tadeoff when designg the esonant paametes. The fal selection of L is 100 μh, C is.86 μf, and the mimum switchg fequency is.8 khz, and the peak cuent of the semiconducto devices is 890 A, which is about two times of the aveage put cuent. Hee both D m and D max depend on the output powe, the maximum of Dm is 0., and the mimum of Dmax is 0.4. Thus, to ealize ZS fo the switches, the duty cycle can be the any value the ange of 0. 0.4.Theefoe, the contol of the poposed convete is vey simple with constant duty cycle and vaiable switchg fequency. I.SIMULATION RESLTS In ode to veify the opeation pciple and the theoetical analysis, a convete is simulated with MATLAB simulation softwae and the detailed paametes ae listed Table. All switches used MATLAB simulation ae ideal switches and 15 nf capacitance is added paallel with Db1 and Db. Fig.5 shows the simulation esults at the output powe of 1 MW ( = 4 k),espectively. SMULATION PARAMTERS Item Symbol alue In Put oltage 4 K Out Put oltage out 80 K Resonant Inductance L 100 µh Switchg fequency f s 5 KHZ Resonant Capacitance C.86 µf Filte Capacitance C 1, C µf Duty Cycle D 40% S (30) (31) IJRITCC Mach 016, Available @ http://www.ijitcc.og 91
Intenational Jounal on Recent and Innovation Tends Computg and Communication ISSN: 31-8169 Fig. fom 6 to 10 illustates the measued wavefoms of q1,q4,q,q3,db1, db,c,il,ic,c1,c,o,io at Po=1MW. the measued wavefoms ae consistent with the steady-state analysis. As the fig.7 shows, the voltage stess of Q1 and Q is 4 k, the voltage stess of Q3 andq4 is 40 k. Fig.8 and Fig.9..shows voltage stess of Db1 and Db is 36 k, and the peak voltage acoss the LC esonant tank is 40 k. Q1 thoughq4 ae tuned on unde zeo-voltage condition and when they ae tuned off, the voltage acoss the device ceases slowly fom zeo. The switchg fequencies of the convete at 5 ae.3 and 5 khz, espectively. Fig.11 shows simulation esults of output powe. Fig.5. simulk model of step up LC esonant convete 6. Gate pulses acoss Q1Q4,QQ3 Fig Fig.8.voltage acoss the diodes db1,db Fig.7. voltage acoss the switches q1,q,q3,q4 Fig.9. voltage acoss the esonant &filteg capacitance c,c1,c IJRITCC Mach 016, Available @ http://www.ijitcc.og 9
Intenational Jounal on Recent and Innovation Tends Computg and Communication ISSN: 31-8169 Fig.10. cuents acoss the esonant tank Iab,Il, Ic Fig.11. output voltage and output cuent.conclusion A novel High step up LC esonant dc dc convete is poposed this pape, which can achieve vey high step-up voltage ga and it is suitable fo high-powe high-voltage applications. The convete utilizes the esonant ducto to delive powe by chagg fom the put and dischagg at the output. The esonant capacito is employed to achieve zeo-voltage tunon and tun-off fo the active switches and ZCS fo the ectifie diodes. The analysis demonstates that the convete can opeate at any ga value (> ) with pope contol; howeve, the paametes of the esonant tank deteme the maximum switchg fequency, the ange of switchg fequency, and cuent atgs of active switches and diodes. The convete is contolled by the vaiable switchg fequency. Simulation esults veify the opeation pciple of the convete and paametes selection of the esonant tank REFERENCES [1] CIGRE B4-5Wokg Goup, HDC Gid Feasibility Study. Melboune, ic., Austalia: Int. Council Lage Elect. Syst., 011. [] A. S. Abdel-Khalik, A.M.Massoud, A. A. Elseougi, and S. Ahmed, Optimum powe tansmission-based doop contol design fo multi-temal HDC of offshoe wd fams, IEEE Tans. Powe Syst., vol. 8, no. 3, pp. 3401 3409, Aug. 013. [3] F. Deng and Z. Chen, Design of potective ductos fo HDC tansmission le with DC gid offshoe wd fams, IEEE Tans. Powe Del., vol. 8, no. 1, pp. 75 83, Jan. 013. [4] F. Deng and Z. Chen, Opeation and contol of a DC-gid offshoe wd fam unde DC tansmission system faults, IEEE Tans. Powe Del., vol. 8, no. 1, pp. 1356 1363, Jul. 013. IJRITCC Mach 016, Available @ http://www.ijitcc.og 93
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