Ultra-Low Noise Ultra-Fast 300mA LDO Regulator. Features

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Ultra-Low Noise Ultra-Fast 300mA LDO Regulator General Description The is a 300mA, low dropout and low noise linear regulator with high ripple rejection ratio and fast turn-on time. It offers 1% initial accuracy and has fixed output voltage 3.1V. The includes a reference voltage source, an error amplifier, driver transistors and an internal current limiter. The current limiter s holdback circuit operates as a short protection. The works well with low ESR ceramic capacitors, suitable for portable RF and wireless battery-powered applications with stringent space requirements and demanding performance. It also offers ultra low noise output and has low quiescent current. Ordering Information - Package A50:SOT23-5 Output Voltage Voltage Code 3.1 31 Packing R: Tape and Reel Features ±1% Output Voltage Initial Accuracy Ultra-Low-Noise application Wide 3.5V to 6V Operating Range Quick Start-Up Current Limiting Protection Thermal Shutdown Protection Low Dropout : 260mV @ 300mA High Ripple Rejection 70dB@1KHz Standby Current Less Than 0.1µA Applications Battery-Powered Equipment Portable Instruments Digital Camera WLAN Communication Hand-Held Instruments Marking Information For marking information, please contact our sales representative directly or through distributor around your location. Other voltage outputs may be available. For further details, please contact an idesyn sales or distributor. Apr. 2009 1 Rev 0.2

Typical Application Circuit V IN C IN=1µF V IN V OUT C OUT =1µF V OUT Enable 100K EN BP 10nF Figure 1. Fixed Voltage BP Version Absolute Maximum Ratings (Note 1) Recommended Operating Conditions Supply Voltage VIN 6V Input Voltage VIN 3.5V to 6V Power Dissipation, PD @ TA=25 C EN Input Voltage 0V to 6V SOT-23-5 400mW Junction Temperature -40 C to 125 C Thermal Resistance, Θja Ambient Operating Temperature -40 C to 85 C SOT-23-5 250 C/W Lead Temperature 260 C Storage Temperature -65 C to 150 C Apr. 2009 2 Rev 0.2

Electrical Characteristics (Unless otherwise specified V IN =V OUT +1V, T A =25 C) Parameters Symbol Condition Min Typ Max Units Operating Voltage Range Vin 6 V (Note 2) Standby Current ISBY VEN = GND,Shutdown 0.01 1 µa Supply Current Limit ILimit R LOAD = 1Ω 360 450 ma Quiescent Current I Q 90 µa Dropout Voltage (Note 3) VDROP Iout = 300mA Vout=3.1 V 260 370 mv EN input Bias Current I IBSD VEN = GND or VIN 0 100 na VIN = (VOUT +1V) to 5.5V, Line regulation ΔV LINE 10 mv/v I OUT = 1mA Load Regulation ΔV LOAD 1mA < I OUT < 300mA 15 25 mv Output Noise Voltage eno 10Hz to 100KHz, Iout = 200mA Cout = 1µF 100 µv RMS Thermal Shutdown Temperature TSD 165 C Thermal Shutdown ΔTSD 30 C Temperature Hysteresis Output Voltage Accuracy ΔV OUT I OUT = 25 ma -1 +1 % Reference Voltage Tolerance V REF 1.188 1.2 1.212 V EN Threshold Logic-Low V V IL VIN = 3V to 5.5V,Shutdown 0.4 V Logic-High V V IH VIN = 3V to 5.5V,Start-Up 1.2 V Power Supply f = 100Hz -70 PSRR C Rejection Rate OUT = 1µF, I OUT = 10mA f = 10KHz -65 db Note 1: Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2: VIN(MIN)=VOUT+VDROPOUT Note 3: The dropout voltage is defined as (VIN-VOUT) when VOUT is 100mV below the target value of VOUT. Apr. 2009 3 Rev 0.2

Pin Configurations (Top View) VOUT BP 5 4 1 2 3 VIN GND EN SOT-23-5 Pin Description Pin Name Pin Function EN GND VOUT VIN BP Chip Enable (Active High). Note that this pin is high impedance. There should be a pull low 100kΩresistor connected to GND when the control signal is floating. Ground Output Voltage Input Voltage Bypass Pin Function Block Diagram EN Shutdown and Logic Control VIN BP V REF - + Error Amplifier MOS Driver Current-Limit and Thermal Protection VOUT GND Apr. 2009 4 Rev 0.2

Typical Performance Characteristics(Unless otherwise specified, V IN = V OUT + 1V, C IN = C OUT = 1uF, C BP = 10nF, T A = 25 C) 110 Quiescent Current vs. Input Voltage 300 Dropout Voltage vs. Load Current Quiescent Current (µa) 105 100 95 90 85 80 3.5 4 4.5 5 5.5 6 Dropout Voltage (mv) 250 200 150 100 50 0 0 50 100 150 200 250 300 V IN (V) Load Current (ma) Short Circuit Current vs. Input Voltage Load Regulation 700 3.10 Short Circuit Current (ma) 600 500 400 V OUT Connect to GND 300 3.5 4 4.5 5 5.5 6 Output Voltage (V) 3.09 3.08 3.07 3.06 V IN = 5V, 3.5V VOUT=3.1V 0 50 100 150 200 250 300 V IN (V) Load Current (ma) Line Regulation PSRR 3.10 80 Output Voltage (V) 3.09 3.08 3.07 Load 1mA Load 300mA 3.06 3.5 4 4.5 5 5.5 6 PSRR (db) 70 60 V OUT 3.1V, Load = 10mA V OUT 3.1V, Load 50 ma 50 V IN =V OUT+1V=EN C IN=C OUT=1µF C BP=10nF 40 100 1000 1K 10K 10000 100K 100000 Input Voltage (V) Frequency (Hz) Apr. 2009 5 Rev 0.2

Region of Stable COUT ESR vs. Load Current EN Threshold vs. Input Voltage 100 0.85 COUT -ESR (Ω) 10 1 0.1 0.01 Instable Stable EN Voltage (V) 0.80 0.75 0.70 0.65 ON OFF Instable C IN = C OUT =1µF 0.001 0 100 200 300 0.60 3.5 4 4.5 5 5.5 6 Load Current (ma) Input Voltage (V) Start Up from EN Start Up from EN V EN (DC) V EN (DC) V OUT (DC) V IN = 4.1V I LOAD = 0mA V OUT (DC) V IN = 4.1V I LOAD = 300mA Time (10.0us/Div) Time (10.0us/Div) Shutdown from EN Shutdown from EN V EN (DC) (2.00V/Div) V EN (DC) (2.00V/Div) V OUT (DC) (2.00V/Div) V IN = 4.1V I LOAD = 0mA V OUT (DC) (2.00V/Div) V IN = 4.1V I LOAD = 300mA Time (250us/Div) Time (10us/Div) Apr. 2009 6 Rev 0.2

Load Transient Response Load Transient Response V OUT (AC) (10mV/Div) C BP = 10nF V OUT (AC) (10mV/Div) C BP = 10nF I LOAD (DC) (50mA/Div) V IN = 4.1V, C IN=C OUT=1uF, Load = 1mA to 150mA I LOAD (DC) (200mA/Div) V IN = 4.1V, C IN=C OUT=1uF, Load = 1mA to 300mA Time (250us/Div) Time (250us/Div) Line Transient Response Line Transient Response V IN (DC) V IN (DC) V OUT (AC) (5.0mV/Div) V OUT (DC) (5.0mV/Div) V IN = 4.0V to 5.0V, Load = 1mA V IN = 4.0V to 5.0V, Load = 300mA Time (1.00ms/Div) Time (1.00ms/Div) Apr. 2009 7 Rev 0.2

Application Information Capacitor Selection and Regulator Stability Input Capacitor An input capacitance of 1µF is required between the device input pin and ground directly (the amount of the capacitance may be increased without limit). The input capacitor MUST be located less than 1 cm from the device to assure input stability (see PCB Layout Section). A lower ESR capacitor allows the use of less capacitance, while higher ESR type (like aluminum electrolytic) requires more capacitance. Capacitor types (aluminum, ceramic and tantalum) can be mixed in parallel, but the total equivalent input capacitance/esr must be defined as above for stable operation. There are no requirements for the ESR on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance is 1 µf over the entire operating range. Output Capacitor The is designed specifically to work with very small ceramic output capacitors. The minimum capacitance recommended (temperature characteristics of X7R, X5R, Z5U or Y5V) is within the 1µF to 10µF range with 5mΩ to 50mΩ ESR range ceramic capacitor between LDO output and GND for transient stability, but it may be increased without limit. Higher capacitance values help to improve transient response. The output capacitor's ESR is critical because it forms a zero to provide phase lead which is required for loop stability. Enable Function The is shut down by pulling the EN pin low, and turned on by driving the input high. If the shutdown feature is not required, the EN pin should be tied to VIN to keep the regulator on at all times (the EN pin MUST NOT be left floating). To assure proper operation, the signal source used to drive the EN pin must be able to swing above and below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics under VIH and VIL. The ON/OFF signal may come from either CMOS output, or an open-collector output with pull-up resistor to the device input voltage or another logic supply. The highlevel voltage may exceed the device input voltage, but must remain within the absolute maximum ratings for the EN pin. Operating Region and Power Dissipation Since the is a linear regulator, its power dissipation is always given by P = I OUT (V IN V OUT ). The maximum power dissipation is given by: P D(MAX) = (T J T A ) /θ JA,=(125 C -25 C)/250 C /W = 400mW Where (T J T A ) is the temperature difference the die and the ambient air, θ JA, is the thermal resistance of the chosen package to the ambient air. For surface mount device, heat sinking is accomplished by using the heat spreading capabilities of the PC board and its copper traces. In the case of a SOT-23-5 package, the thermal resistance is typically 250 C /Watt. Refer to Figure 1 & 2 for the valid operating region (Safe Operating Area) and refer to Figure 3 for maximum power dissipation information of SOT-23-5. The die attachment area of the lead frame is connected to pin 2, which is the GND pin. Therefore, the GND pin of can dissipate the heat from the die very effectively. To improve the maximum power providing capability, connect the GND pin to ground using a large ground plane near the GND pin. Apr. 2009 8 Rev 0.2

Output Current IOUT (ma) 250 200 150 100 50 Safe Operation Area of I OUT =150mA [Power Dissipation Limit] Still air SOT-23-5 package Mounted on recommended footprint (R JA=250 C/W) T A=85 C 0 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 Fig 1 T A=55 C T A=25 C Input-Output Voltage Differential V IN-V OUT(V) Output Current IOUT (ma) 400 350 300 250 200 150 100 50 Safe Operation Area of I OUT =300mA [Power Dissipation Limit] Still air SOT-23-5 package Mounted on recommended footprint (R JA=250 C/W) T A=85 C 0 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 Input-Output Voltage Differential V IN-V OUT(V) Fig 2 T A=25 C T A=55 C Apr. 2009 9 Rev 0.2

Packaging SOT-23-5 SYMBOLS DIMENSIONS IN MILLIMETERS MIN NOM MAX A 1.00 1.10 1.30 A1 0.00 --- 0.10 A2 0.70 0.80 0.90 b 0.35 0.40 0.50 C 0.10 0.15 0.25 D 2.70 2.90 3.10 E 1.50 1.60 1.80 e --- 1.90(TYP) --- H 2.60 2.80 3.00 L 0.37 --- --- θ1 1 5 9 e1 --- 0.95(TYP) --- Apr. 2009 10 Rev 0.2