Features Precision supply-voltage monitor -.6V (PT7M7xxxL) -.8V (PT7M7xxxM except PT7M7809M) -.08V (PT7M7xxxT) -.9V (PT7M7xxxS) -.6V (PT7M7xxxR) -.V (PT7M7xxxZ) -.0V (PT7M7xxxY) -.00V (PT7M7xxxJ) -.6V (PT7M7809M) 00ms reset pulse width Debounced CMOS-compatible manual-reset input (78, 78, 78, 78, 7-7) Reset Output Signal for Watchdog and Power Abnormal, Manual Reset Reset Push-Pull output (PT7M7809,78,78, 78,78,7,7) Reset Open-Drain output (PT7M780/7) Voltage monitor for power-fail or low battery warning Guaranteed / valid at =.0V Description The PT7M7xxx family microprocessor (µp) supervisory circuits are targeted to improve reliability and accuracy of power-supply circuitry in µp systems. These devices reduce the complexity and number of components required to monitor power-supply and battery functions. The main functions are:. Asserting reset output during power-up, powerdown and brownout conditions for µp system.. Detecting power failure or low-battery conditions with a.v threshold detector.. Watchdog functions. Manual reset. Applications Power-supply circuitry in µp systems Ordering Information Part Number Package Part Number Package PT7M780XTE Lead free and Green SOT- PT7M7XTAE Lead free and Green SOT-6 PT7M7809XTE Lead free and Green SOT- PT7M78XTBE Lead free and Green SOT PT7M780XTE Lead free and Green SOT- PT7M78XTBE Lead free and Green SOT PT7M78XTAE Lead free and Green SOT- PT7M780XDE Die form PT7M78XTAE Lead free and Green SOT- PT7M7809XDE Die form PT7M78XTAE Lead free and Green SOT- PT7M780XDE Die form PT7M78XTAE Lead free and Green SOT- PT7M78XDE Die form PT7M78XTAE Lead free and Green SOT- PT7M78XDE Die form PT7M7XTAE Lead free and Green SOT-6 PT7M78XDE Die form PT7M7XTAE Lead free and Green SOT-6 PT7M78XDE Die form PT7M7XTAE Lead free and Green SOT-6 PT7M78XDE Die form X refers to voltage range, see below table. Suffix: X Monitored Voltage X L M* T S R Z Y J Reset Threshold (V).6.8.08.9.6..0.00 Note*: Threshold voltage=.8v can be applied to all parts except PT7M7809M. PT7M7809M s threshold voltage is.6v.
Function Comparison Part No. Push-Pull output Open-Drain output (push-pull) Manual Reset Input Power Fail Detector (.V) Watchdog Input PT7M780 - - - - - PT7M7809 - - - - - PT7M780 - - - - - PT7M78 - - - - PT7M78 - - - - 6 PT7M78 - - - 7 PT7M78 - - - 8 PT7M78 - - - 9 PT7M7 - - - 0 PT7M7 - - - PT7M7 - - - PT7M7 - - - Block Diagram WDI Watchdog Transition Detector Vcc Watchdog Timer Timebase for Reset & Watchdog Vcc Reset Generator () V RST PFI PFO.V Marking Information
Code Description Part Number Year Work Week Only for PT7M7809M Part Number Code Code Part No. Code Part No. Code Part No. AA PT7M7809L BC PT7M780L CE PT7M7L AB PT7M7809M BD PT7M780M CF PT7M7M AC PT7M7809T BE PT7M780T CG PT7M7T AD PT7M7809S BF PT7M780S CH PT7M7S AE PT7M7809R BG PT7M780R CI PT7M7R AF PT7M7809Z BH PT7M780Z CJ PT7M7Z AG PT7M7809Y BI PT7M780Y CK PT7M7Y jm PT7M7809J sc PT7M780J sk PT7M7J AH PT7M780L BJ PT7M78L CL PT7M7L AI PT7M780M BK PT7M78M CM PT7M7M AJ PT7M780T BL PT7M78T CN PT7M7T AK PT7M780S BM PT7M78S CO PT7M7S AL PT7M780R BN PT7M78R CP PT7M7R AM PT7M780Z BO PT7M78Z CQ PT7M7Z AN PT7M780Y BP PT7M78Y CR PT7M7Y se PT7M780J sh PT7M78J sl PT7M7J AO PT7M78L BQ PT7M78L CS PT7M7L AP PT7M78M BR PT7M78M CT PT7M7M AQ PT7M78T BS PT7M78T CU PT7M7T AR PT7M78S BT PT7M78S CV PT7M7S AS PT7M78R BU PT7M78R CW PT7M7R AT PT7M78Z BV PT7M78Z CX PT7M7Z AU PT7M78Y BW PT7M78Y CY PT7M7Y sf PT7M78J si PT7M78J sm PT7M7J AV PT7M78L BX PT7M78L CZ PT7M7L AW PT7M78M BY PT7M78M DA PT7M7M AX PT7M78T BZ PT7M78T DB PT7M7T AY PT7M78S CA PT7M78S DC PT7M7S AZ PT7M78R CB PT7M78R DD PT7M7R BA PT7M78Z CC PT7M78Z DE PT7M7Z BB PT7M78Y CD PT7M78Y DF PT7M7Y sg PT7M78J sj PT7M78J sn PT7M7J Lead free and Green package is available by adding line above the first code. For example: Part Number code of PT7M7809LTE is AA.
Data Sheet Pin Configuration SOT- 6 WDI WDI PFI PFO 6 PFI PFO SOT- PT7M780 PT7M7809 PT7M780 PT7M78 PT7M78 PT7M78 PT7M78 PT7M78 SOT-6 PT7M7 PT7M7 6 PFI PFO PT7M7 PT7M7 NC NC PT7M78 PT7M78 SOT
Pin Description Pin Type Description I Power Manual-Reset: (CMOS). Active low. Pull low to force a reset. Reset remains asserted for the duration of the Reset Timeout Period after transitions from low to high. Leave unconnected or connected to if not used. Supply Voltage. Reset is asserted when V CC drops below the Reset Threshold Voltage (V RST ). Reset remains asserted until V CC rises above V RST and keep asserted for the duration of the Reset Timeout Period (t RS ) once V CC rises above V RST. - Ground Reference for all signals. PFI I Power-Fail Voltage Monitor Input. When PFI <V PFT, PFO goes low. Connect PFI to or Vcc when not used. PFO O Power-Fail Output: it gets low and sinks current when PFI is less than.v; otherwise PFO stays high. WDI I O Watchdog Input (CMOS). If WDI remains high or low for the duration of the watchdog timeout period (t WD ), the internal watchdog timer trigger a reset output. Floating WDI or connecting WDI to a highimpedance three-state buffer disables the watchdog feature. The internal watchdog timer clears whenever reset is asserted or WDI occurs a rising or falling edge. Active-Low Reset Output (Push-Pull or Open-Drain). It goes low when Vcc is below the reset threshold. It remains low for about 00ms after one of the following occurs: Vcc rises above the reset threshold (VRST), the watchdog triggers a reset, or goes from low to high. O The inverse of, active high. Whenever is high, is low. NC - No connection. Pad Identification PT7M780, PT7M7809 No Symbol Location(X, Y) (97.0,.60) (7.0, 0.90) (9.0, 0.0) NC (7.0, 0.0) ) Wafer Size: 6 inch ) Wafer Thickness: 67um ) Chip Size: 770um*780um (include scribe line width 00um*00um) ) PAD Location: Refer above diagram and table. PAD size7um*7um ) PAD description refer to Pin description
PT7M780 No Symbol Location(X, Y) (97.0,.60) (7.0, 0.90) (9.0, 0.0) NC (7.0, 0.0) ) Wafer Size: 6 inch ) Wafer Thickness: 67um ) Chip Size: 770um*780um (include scribe line width 00um*00um) ) PAD Location: Refer above diagram and table. PAD size7um*7um ) PAD description refer to Pin description PT7M78 No Symbol Location(X, Y) (97.0,.60) (7.0, 0.90) (9.0, 0.0) (7.0, 0.0) ) Wafer Size: 6 inch ) Wafer Thickness: 67um ) Chip Size: 770um*780um (include scribe line width 00um*00um) ) PAD Location: Refer above diagram and table. PAD size7um*7um ) PAD description refer to Pin description PT7M78 No Symbol Location(X, Y) (97.0,.60) (7.0, 0.90) (9.0, 0.0) (7.0, 0.0) ) Wafer Size: 6 inch ) Wafer Thickness: 67um ) Chip Size: 770um*780um (include scribe line width 00um*00um) ) PAD Location: Refer above diagram and table. PAD size7um*7um ) PAD description refer to Pin description 6
PT7M78 ) Wafer Size: 6 inch ) Wafer Thickness: 67um ) Chip Size: 060um*80um (include scribe line width 00um*00um) ) PAD Location: Refer above diagram and table. PAD size7um*7um ) PAD description refer to Pin description PT7M78 No Symbol Location(X, Y) (.0, 6.) (8.60, 8.) (8.60, 80.) WDI (8.60, 8.) (.0, 7.0) 6 NC (.0, 8.0) 7 NC (66.80, 6.00) 8 NC (8.60, 79.7) 9 NC (8.60, 8.) ) Wafer Size: 6 inch ) Wafer Thickness: 67um ) Chip Size: 060um*80um (include scribe line width 00um*00um) ) PAD Location: Refer above diagram and table. PAD size7um*7um ) PAD description refer to Pin description No Symbol Location(X, Y) (.0, 6.) (8.60, 8.) (8.60, 80.) WDI (8.60, 8.) (.0, 7.0) 6 NC (.0, 8.0) 7 NC (66.80, 6.00) 8 NC (8.60, 79.7) 9 NC (8.60, 8.) 7
PT7M78 ) Wafer Size: 6 inch ) Wafer Thickness: 67um ) Chip Size: 060um*80um (include scribe line width 00um*00um) ) PAD Location: Refer above diagram and table. PAD size7um*7um ) PAD description refer to Pin description No Symbol Location(X, Y) (.0, 6.) (8.60, 8.) (8.60, 80.) (8.60, 8.) (.0, 7.0) 6 NC (.0, 8.0) 7 NC (66.80, 6.00) 8 NC (8.60, 79.7) 9 NC (8.60, 8.) Functional Description Reset Output A microprocessor (µp) reset input starts the µp in a known state. Whenever the µp is in an unknown state, it should be held in reset. The supervisory circuits assert reset during power-up and prevent code execution errors during power-down or brownout conditions. On power-up, once Vcc reaches about.0v, is a guaranteed logic low of 0.V or less. As Vcc rises, stays low. When Vcc rises above the reset threshold, an internal timer releases after about 00ms. pulses low whenever Vcc drops below the reset threshold, i.e. brownout condition. If brownout occurs in the middle of a previously initiated reset pulse, the pulse continues for at least another 00ms. On power-down, once Vcc falls below the reset threshold, stays low and is guaranteed to be 0.V or less until Vcc drops below.0v. Watchdog Timing Diagram shows the timing relationship. The active-high output is simply the inverse of the output, and is guaranteed to be valid with Vcc down to.0v. Watchdog Timer The PT7M7xxx watchdog circuit monitors the µp activity. If the µp does not toggle the watch-dog input (WDI) within.6s, reset asserts. As long as reset is asserted or the WDI input is toggled, the watchdog timer will stay clear and will not count. As soon as reset is released, the timer will start counting. WDI input pulses as short as 0ns can be detected. Disable the watchdog function by leaving WDI unconnected or by three-stating driver connected to WDI. Manual Reset The manual-reset input () allows reset to be triggered by a push button switch. has an internal pullup resistor, so it can be left open when not used. Power-Fail Comparator The power-fail comparator can be used for various purposes because its output and noninverting input are not internally connected. The inverting input is internally connected to a.v reference. 8
Typical Application Circuit IN DC Linear Regulator µp Vcc Vcc µp Supervisory PFI Circuit WDI I/O Line PFO Interrupt Maximum Ratings Storage Temperature...-6 o C to +0 o C Ambient Temperature with Power Applied... -0 o C to +8 o C Supply Voltage to Ground Potential (Vcc to )...-0.V to +7.0V DC Input Voltage (All inputs except Vcc and )...-0.V to V CC +0.V DC Output Current (All outputs)...0ma Power Dissipation... 0mW (Depend on package) Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Recommended Operation Conditions Sym Description Test Conditions Min Typ Max Unit Supply Voltage for 7xxxL/M/J -..0. V V CC Supply Voltage for 7xxxT/S -.0.. V Supply Voltage for 7xxxR/Z/Y -.7.0. V V IH Input High Voltage - 0.7V CC - - V V IL Input Low Voltage - - - 0.V CC V T A Operating Temperature - -0-8 9
DC Electrical Characteristics (V CC = V RN + % to.v, T A = -0~8ºC, unless otherwise noted.)(note ) Symbol Description Test Conditions Min Typ Max Unit V CC Operating Voltage Range -.0 -. V I CC Supply Current Vcc = V, No 780/09/0// - 6 8 µa load 78///7xx - 6 V IH Input High Voltage Pin:, WDI 0.7V CC - - V V IL Input Low Voltage Pin:, WDI - - 0.V CC V 7xxx(except 7809R/M) V RN -.% V RN V RN +.% T A = ºC 7809M V RN -.% V RN V RN +.% V RST Threshold Voltage(Fallingedge)(Note ) V RTH ) 7809R V RN -.0% V RN V RN +.0% V T A = -0 ~ 8ºC 7809M V RN -.8% V RN V RN + % V RTH V RTH V OH Threshold Voltage(Risingedge) (Note ) Reset Threshold Hysteresis (Note ) Output High Voltage(Except 78//) Output High Voltage(78//) T A = -0 ~ 8ºC 7xxx(except 7809M) V RN -.% V RN V RN +.% T A = -0 ~ 8ºC 7809M...96 V Vcc varies 78//L/M/T/S - - between 78//R - - V RN ± % Others - 0 - Vcc.V Isource=800µA Vcc-. - - Vcc.7V Isource=00µA 0.8 Vcc - - Vcc.8V Isource=0µA 0.8 Vcc - - V Vcc.0V Isource=µA 0.8 Vcc - - 78//L/M, Vcc=V RST Isource=0µA Vcc-. - - V 78//T/S/R, Vcc=V RST Isource=0µA 0.8 Vcc - - V Vcc.V Isink=.mA - - 0. V OL Output Low Voltage Vcc.7V Isink=.mA - - 0. V Vcc.0V Isink=00µA - - 0. I LKG Open-Drain Output Leakage Current V CC > V TH(MAX) for780 and 7 - - µa V PFT PFI Input Threshold V PFI varies from.v and.0v... V I PFI PFI Input Leakage Current - - - ± na I WDI I source r Average WDI Input WDI connected to V CC :.V - 0 60 Current (Note ) WDI connected to -0 - - Output Short- Circuit Current (only for PT7M78//) pull-up resistor (internal) PT7M78_L/M, =0V, Vcc=.V - - 800 PT7M78_T/S/R, =0V, Vcc=.6V - - 00 PT7M78/78 0 0 0 PT7M78/78/78 7 PT7M7/7/7 60 - -. Parameters of room temperature guaranteed by production test and parameters of full-temperature guaranteed by design.. Valid for both and. V RST (V RTH -) is the Reset threshold voltage when V CC from high to low level, and V RTH + is the Reset threshold voltage when V CC from low to high level. V RN is nominal reset threshold voltage.. WDI is internally serviced within the watchdog period if WDI is left unconnected. 0 mv µa µa kω
AC Electrical Characteristics Symbol Description Test Conditions Min Typ Max Unit t RS Reset Pulse Width from low to High, T A = 0 00 00 ms t WD Watchdog Timeout Period WDI, tied to Vcc, Vcc>V RN +%, T A =..6. s t Pulse Width - - - µs t MD to Delay Vcc=V - - 0 ns t WP WDI Pulse Width - 0 - - ns Watchdog Timing Diagram V RST V RST t RS t WD t RS t RS t WP t MD WDI t
Mechanical Information TE (Lead free and Green SOT-) X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS ) Controlling dimensions in millimeters. ) Ref: JEDEC TO-6H
TAE (Lead free and Green SOT-) X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS ) Controlling dimensions in millimeters. ) Ref: JEDEC MO-78C/AA
TAE (Lead free and Green SOT-6) X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS ) Controlling dimensions in millimeters. ) Ref: JEDEC MO-78C/AB
TBE (Lead free and Green SOT) X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS ) Controlling dimensions in millimeters. ) Ref: JEDEC TO-D
Notes Email: support@pti.com.cn Web Site: www.pti.com.cn, www.pti-ic.com China: Asia Pacific: U.S.A.: No. 0 Building, /F, 8 Guiping Road, Shanghai, 00, China Tel: (86)--68 076 Fax: (86)--68 8 Unit 7, /F, Chevalier Commercial Centre, 8 Wang Hoi Rd, Kowloon Bay, Hongkong Tel: (8)- 660 Fax: (8)- 667 North First Street, San Jose, California 9, USA Tel: ()-08-0800 Fax: ()-08-00 Pericom Technology Incorporation reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. Pericom Technology does not assume any responsibility for use of any circuitry described other than the circuitry embodied in Pericom Technology product. The company makes no representations that circuitry described herein is free from patent infringement or other rights, of Pericom Technology Incorporation. 6