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Elecrical, Conrol and Communicaion Engineering ISSN 2255-959 (online) ISSN 2255-940 (prin) 208, vol. 4, no., pp. 5 doi: 0.2478/ecce-208-000 hps://www.degruyer.com/view/j/ecce Asymmeric Snubberless Curren-Fed Full-Bridge Isolaed DC-DC Converers Roman Kosenko * (Suden Member, IEEE, Chernihiv Sae Universiy of Technology, Chernihiv, Ukraine), Andrei Blinov (Member, IEEE, Tallinn Universiy of Technology, Tallinn, Esonia), Dmiri innikov (Senior Member, IEEE, Tallinn Universiy of Technology, Tallinn, Esonia), Andrii Chub (Member, IEEE, Chernihiv Sae Technological Universiy, Chernihiv, Ukraine) Absrac This paper presens wo isolaed curren-fed fullbridge DC-DC converers ha can be used o inerface a lower volage source ino a DC bus of higher volage. The firs opology uses a resonan circui o force curren redisribuion beween low-volage-side ransisors and a passive recifier. The second opology uilizes an acive recifier wih secondary modulaion o achieve he same goal. The resonan circui can be formed by using ransformer leakage inducance and he parasiic capaciances of he swiches. The converers feaure sof swiching of semiconducors over a wide range of operaing condiions. This is achieved wih decreased energy circulaion when compared o exising opologies wih symmeric conrol and wih fewer semiconducors han in hose wih phase-shif conrol. The opologies can be implemened in renewable, supercapacior, baery, fuel cell, and DC microgrid applicaions. Seady-sae operaion and design aspecs of he converers are presened and verified experimenally wih 400 W prooypes. Keywords DC-DC power converers; Sof swiching; Zerocurren swiching; Zero-volage swiching. I. INTRODUCTION Power elecronic sysems wih a variable gain are required o inerface differen renewable energy sources or sorage sysems ino he microgrid []. Converers wih ransformers are ofen preferred due o reduced sresses on he componens and beer flexibiliy of applicaion [2], [3]. A significan porion of he pas and presen research ha is relaed o isolaed DC-DC converers is focused on volage-fed dualacive-bridge (DAB) opologies [4] [6]. These converers feaure good regulaion capabiliies and sof swiching over a wide range of operaing condiions wih advanced muli-mode digial conrol algorihms. A he same ime, isolaed currenfed (CF) converers could be beneficial due o heir inheren boos capabiliy, low inpu curren ripple, reduced energy circulaion, reduced requiremens regarding he isolaion ransformer and simpler conrol sysem [7] [9]. The presen sudy is focused on full-bridge-ype opologies due o heir flexibiliy and scalabiliy, making hem suiable for a wide range of applicaions wih various volage and power levels. A common drawback of isolaed CF opologies is relaed o volage overshoos across primary ransisors due o he leakage inducance of pracical ransformers. This issue is usually solved by applying a RCD snubber [0], he acive clamp circui inroduced in [] or soluions wihou snubbers, by uilizing he parasiic parameers of he circui [4] [7]. The laer approach is advanageous due o he reduced number of componens required and he sof swiching provided for power swiches in he opology. Exising snubberless (also referred o as clampless ) converers can uilize he symmeric [2], [3] conrol algorihm or he phase-shif one [4] [7]. In phase shif conrol, he primary swiches need o have he reverseblocking capabiliy. Given he ypical realizaion of his funcion (wih a series diode or an ani-series swich), i leads o a remarkable increase in he oal number of primary semiconducors and heir power losses. On he oher hand, a some operaing poins, symmeric opologies have excessive energy circulaion and increased curren sress on he primary swiches and he ransformer. In addiion o he exising soluions, he presen paper proposes wo asymmeric opologies ha combine he properies of boh approaches and could provide an improved weighed performance, paricularly if he converers have o operae under a wide range of inpu volage and power levels. In his paper, operaion wih a fullbridge recifier is assumed; however, he volage-doubler recifier can be applied for boh converers as well. The operaion principle of he opologies is described in Secion II, design guidelines are presened in Secion III and he experimenal resuls are demonsraed in Secion I. * Corresponding auhor. E-mail: roman.kosenko@u.ee 208 Roman Kosenko e al. This is an open access aricle licensed under he Creaive Commons Aribuion License (hp://creaivecommons.org/licenses/by/4.0), in he manner agreed wih Sciendo. 5

Elecrical, Conrol and Communicaion Engineering Primary side Secondary side Primary side Secondary side L S S3 L eq TX S5 S7 L S S3 S 5 L eq TX C S5 S7 C S 7 in Trp Trs C eq C ou ou in I Tr p Trp Trs C ou ou S2 S4 N N 2 S6 S8 S2 S 4 N N 2 S6 C S6 S8 C S 8 a ) b ) = = = = Fig.. Topology of he asymmeric converers proposed: ARPC (a), ASMB (b). T sw / 2 T sw /2 S S 2 S 3 S 4 Trp Trp S S 2 S 3 S 4 S 5, 8 S 6, 7 S 5 S 5 Trp Trp S 6 S 6 I S I S 3 S 5 S 5 I S I S 3 I S 4 I S 2 I S 4 I S 2 S 6 S 6 I S I S 3 I S I S 3 0 2 3 4 5 6 Fig. 2. Idealized operaing waveforms of APRC wih a passive recifier. I S 4 I S 2 I S 4 I S 2 0 2 3 4 5 6 Fig. 3. Idealized operaing waveforms of ASMC wih an acive recifier. 6

Elecrical, Conrol and Communicaion Engineering II. DESCRIPTION OF OPERATION The converer opologies proposed are shown in Fig.. As can be observed, hey feaure wo reverse-conducing and wo reverse-blocking devices a he primary side. The asymmeric parallel resonan converer (APRC) opology can be implemened wih a passive recifier (Fig. a). I uilizes a resonan ank formed by L eq and C eq o redisribue curren beween he op ransisors. The asymmeric secondary modulaion-based converer (ASMC) opology in Fig. b has an acive recifier ha is used o force he currens o change direcion and achieve he same goal. The equivalen capacior across he ransformer primary winding can be formed by he inrinsic capaciances of he recifier swiches (C S5 C S8 ) and/or separaely. Similarly, he equivalen inducance can represen he leakage inducance of he ransformer refleced o he primary winding or by an addiional inducor in series o he primary winding. Boh opologies operae a a consan swiching frequency and regulae oupu volage by phase-shif beween he op and boom swiches. The operaion of he converers presened in Figs. 2 and 3 can be described by six swiching modes for each half-period T sw /2. A. The APRC Topology 0 : swiches S and S4 are urned on and he oher ones are urned off. The converer is in he acive sae and he power is ransferred o he oupu hrough swiches S, S4 and diodes S5 and S8. A he end of his inerval, he inpu curren reaches he minimum value. 2 : S2 is urned off and he acive sae is finished. The curren of S2 rises, while he curren of S4 decreases linearly wih di/d, caused by he equivalen leakage inducance. The currens of S5 and S8 as well as he ransformer curren decrease wih he same slope. The inpu inducor volage polariy is reversed and is curren sars o increase, while he ransformer primary volage is zero. 2 3 : he curren of S2 reaches he inpu curren level and he ransformer primary volage rises o he ampliude value. The converer is in he shoo-hrough sae wih S and S2 conducing while he inpu inducor is energized. S4 could be urned off wih ZCS. 3 4 : S3 is urned on and he resonan process is sared. Capacior C eq sars o recharge and, as a resul, he S curren decreases and he S3 curren increases (Fig. 2). 4 5 : when he resonan curren becomes higher han he inpu curren, he sof swiching condiion is saisfied; he body diode of S sars o conduc and he ransisor channel can be urned off wih ZCS. The currens a he primary side reach he ampliude value when he capacior volage crosses zero and, as he capacior C eq volage polariy changes, sars o decrease back o he value of he inpu curren. 5 6 : he currens a he inpu side are equal o he inpu curren and he recharging of capacior C eq coninues. When C eq and he ransformer volages reach he ampliude value, recifier swiches S6 and S7 become forward-biased and sar o supply he curren o he oupu. From 6 he converer acive sae sars and he processes are hen repeaed for anoher swiching half-period. B. The ASMC Topology The firs hree modes are equivalen o hose in APRC. 0 : swiches S and S4 are urned on and he oher ones are urned off. The converer is in he acive sae and he power is ransferred o he oupu hrough swiches S, S4 and MOSFETs S5 and S8. A he end of his inerval, he inpu curren reaches he minimum value. 2 : S2 is urned off and he acive sae is finished. The curren of S2 rises, while he curren of S4 decreases linearly wih di/d, caused by he equivalen leakage inducance. The currens of S5 and S8 as well as he ransformer curren decrease wih he same slope. The inpu inducor volage polariy is reversed and is curren sars o increase, while he ransformer primary volage is zero. 2 3 : he curren of S2 reaches he inpu curren level and he ransformer primary volage rises o he ampliude value. The converer is in he shoo-hrough sae wih S and S2 conducing while he inpu inducor is energized. S4 could be urned off wih ZCS. 3 4 : S3 is urned on and he curren of S3 rises, while he curren of S decreases linearly wih di/d, caused by equivalen leakage inducance. This mode is analogous o he inerval 2 (Fig. 3). 4 5 : since S is a reverse-conducing device, afer decreasing o zero, he curren sars o flow hrough is body diode, changing wih he same slope, while he curren hrough S3 rises above he inpu curren. Thus, he sof swiching condiion is saisfied and S can be urned off wih ZCS, along wih S5 and S8. The equivalen capacior recharges and he ransformer volage changes is polariy. 5 6 : capacior C eq is recharged, he ransformer secondary volage reaches he ampliude value and he body diodes of S6 and S7 become forward-biased. The curren hrough S reurns back o zero wih he same di/d, and he curren of S3 and he ransformer primary curren become equal o he inpu curren. From 6, he converer acive sae is sared, hence S6 and S7 can be urned on o avoid excessive losses in he body diodes. The processes are hen repeaed for anoher swiching half-period. C. Design Aspecs. The APRC converer For APRC, sof swiching is achieved if peak ransformer primary curren I P(res) is larger han inpu inducor curren. I Pres ou Iin, () nzr where ou is he oupu volage, n is he ransformer urns raio and Z r is he impedance of he resonan circui: Z L eq r, (2) Ceq where L eq is he inducance of he equivalen circui (largely deermined by ransformer leakage inducance) and C eq is he equivalen capaciance, which can be represened by he inrinsic capaciance of he recifier semiconducor and/or an exernal capacior. 7

Elecrical, Conrol and Communicaion Engineering To saisfy he sof swiching crieria for a wide range of condiions, he resonan circui should be designed around minimal inpu volage a full load. The required impedance of he resonan ank Z r, should be chosen according o Z L eq ou inmin ou r, (3) Ceq nipres npmax where P max is he maximum power of he converer. The required resonan frequency is esimaed by fsw fr n G where f sw is he converer swiching frequency and G min is he desired minimum converer volage gain. The resonan frequency is calculaed from fr. (5) 2 LeqCeq From (3) (5), he equaion for he required equivalen inducance L eq is obained from L Z min, (4) r eq. (6) 2 fr The associaed resonan capaciance can hen be derived from (3). The duy cycle of he swiches should be higher han 0.5 o avoid open circui of he inpu inducor and for S2 and S4, i can be approximaed as D nl P min eq max S2,S4. (7) 2 in ou For he oher pair of swiches (S and S3), he required duy cycle is esimaed from D f sw S,S3. (8) 2 4fr The gain of his converer is no sensiive o load variaions and is esimaed from n G. (9) fsw 223 fr 2. The ASMB Converer For he ASMB converer, he duy cycle of he swiches can be calculaed from (8) for he minimum possible inpu volage and he maximum power level. I should be noiced ha a longer duy cycle would lead o an increased peak curren a he primary side and excessive energy circulaion. In he ideal case, he peak curren of he converer should be equal o maximum possible inpu curren (max), and he swich duy cycle is obained by niinmaxleq fsw D, (0) 2 ou where (max) = P max / in(min). The minimum oal duraion of he shoo-hrough sae ( 6 ) is hen esimaed from 6min 2 L ni C ni 2 2 eq in max eq ou inmax ou. () As shown, boh L eq and C eq increase he resuling minimum duraion of he shoo-hrough sae. Therefore, hey should be carefully seleced o have he desired regulaion capabiliies of he converer. The converer gain can be hen esimaed from G. (2) 2fsw 23 6min 3. Generalizaions Unlike in oher opologies wih phase shif conrol, he peak curren of he op ransisors is higher han he inpu curren, which offers a specific advanage. From he operaional waveforms and equaions presened i follows ha he recharging of capacior C eq akes place when he curren is a is peak value, which is higher han he maximum inpu curren. Thus, he capacior recharge ime is consan and unaffeced by he converer operaing poin and operaion a ligh load does no affec converer gain or require adjusmens o he conrol sraegy. Since only op ransisors exhibi such an increased curren, he oal energy circulaion hrough semiconducors a low-load condiions can be lower han ha of he opologies wih symmeric conrol. While he APRC opology requires lesser number of acive swiches, he ASMB provides a larger degree of freedom when choosing he value of C eq. Moreover, if he inpu curren value is known, he implemenaion of digial conrol o adjus he duy cycles of he swiches would allow a significan reducion of he circulaing energy. Fig. 4. Experimenal waveforms of an APRC converer: Ch S gae volage, Ch2 S2 gae volage, Ch3 S curren and Ch4 S2 curren. 8

Elecrical, Conrol and Communicaion Engineering Ch2:Iin 2A/div Ch3: ITrp 5 A/div Ch: Trp 50 /div Ch4: Trs 200 /div 5 µs/div Fig. 5. Experimenal waveforms of an APRC converer: Ch Trp, Ch2, Ch3 and Ch4 Trs. Fig. 6. Experimenal waveforms of an ASMC converer: Ch S gae volage, Ch2 S2 gae volage, Ch3 S curren and Ch4 S2 curren. III. EXPERIMENTAL ERIFICATION To validae he proposed converers, an experimenal prooype wih a raed power of 400 W was assembled and boh opologies were esed wih he same hardware. Synchronous MOSFETs insead of series diodes were applied in he primary par o reduce conducion losses. The parameers and componens used are lised in Table I. TABLE I PARAMETERS AND COMPONENTS OF THE EXPERIMENTAL PROTOTYPE Parameer/componen Symbol alue Inpu volage, DC in 20 30 Oupu volage, DC ou 400 Swiching frequency f sw 50 khz Primary side inducors inducance L 00 μh Equivalen capaciance (a TX primary C eq 0 nf winding) Transformer urns raio N 2 /N 3 : Equivalen TX leakage inducance L eq 0.8 μh Raed power P raed 400 W Primary-side ransisors S S4 FDMS868 Secondary-side ransisors S5 S8 STP8N60DM2 Microconroller STM32F334R8T6 Primary-side ransisor drivers ADUM322 Secondary-side ransisor drivers ACPL-P346 The experimenal waveforms for he APRC opology a in = 24 are presened in Figs. 4 and 5. As shown in Fig. 4, op swich S is urned off when he resonan curren is flowing hrough is body diode, resuling in ZCS. Boom swich S2 is urned off when is curren is aken over by S4, which also resuls in ZCS. All he primary swiches urn on wih reduced di/d and, as a resul, he urn-on losses diminish. The inpu curren waveform in Fig. 5 shows ha he converer coninues o be in he shoo-hrough sae during he resonan period, while he ransformer secondary winding changes polariy. Fig. 7. Experimenal waveforms of an ASMC converer: Ch Trp, Ch2, Ch3 and Ch4 Trs. The measuremen resuls of ASMC a in = 24 are shown in Figs. 6 and 7. During he experimens, he converer was operaing wih a very small value of C eq and, as a resul, he 4 5 inerval is minor. Similar o he APRC opology, he op ransisors urn off when heir body diode conducs, while he boom ones afer he curren drops o zero, resuling in ZCS for all he primary semiconducors. From Fig. 7 i can be observed ha he ransformer secondary volage changes polariy when is curren is a he peak value and, since C eq could be small for his converer, he process akes significanly less ime. During he laboraory experimens, he power sage of ARPC reached an efficiency of 96.4 % and ha of ASMC 96.6 % a an inpu volage of 30. The experimenal resuls are in agreemen wih heoreical esimaions for boh opologies and herefore i can be concluded ha he claims presened in he previous secions have been confirmed. 9

Elecrical, Conrol and Communicaion Engineering I. CONCLUSION This paper inroduced wo isolaed sof-swiching asymmeric curren-fed DC-DC converers wih a passive recifier and an acive one. The proposed opologies can be applied in sysems where a high gain and/or galvanic isolaion are required, such as fuel cells, baeries, DC microgrids and oher applicaions. The converers have wo reverse-blocking devices and wo reverse-conducing ones a he primary side and uilize phase-shif conrol wih a consan swiching frequency. Their main aim is o reduce he problem of high circulaing energy encounered in exising symmeric opologies and he high conducion losses presen in opologies wih phase-shif conrol. The experimenal resuls showed a peak power sage efficiency of 96.4 % and 96.6 % for he ARPC and ASMC opologies, respecively. Tha proves ha he opologies proposed allow achieving a comparable level of efficiency while having a lower swich coun han oher exising opologies wih a phase-shif conrol algorihm and lower curren sress han he opologies wih a symmerical modulaion conrol algorihm. Fuure research will focus on he deailed analysis of he presened opologies and heir comparison wih oher exising soluions, designed wih he same consrains and requiremens. ACKNOWLEDGEMENT This research was suppored by he Esonian Cenre of Excellence in Zero Energy and Resource Efficien Smar Buildings and Disrics, ZEBE, gran 204-2020.4.0.5-006 funded by he European Regional Developmen Fund. REFERENCES [] D. Kumar, F. Zare, and A. Ghosh, DC Microgrid Technology: Sysem Archiecures, AC Grid Inerfaces, Grounding Schemes, Power Qualiy, Communicaion Neworks, Applicaions, and Sandardizaions Aspecs, IEEE Access, vol. 5, pp. 2230 2256, 207. hps://doi.org/0.09/access.207.270594 [2] A. Kwasinski, Quaniaive Evaluaion of DC Microgrids Availabiliy: Effecs of Sysem Archiecure and Converer Topology Design Choices, IEEE Transacions on Power Elecronics, vol. 26, no. 3, pp. 835 85, Mar. 20. [3] G. Tibola and J. L. Duare, Isolaed Bidirecional DC-DC Converer for Inerfacing Local Sorage in Two-Phase DC Grids, in 207 IEEE 8h Inernaional Symposium on Power Elecronics for Disribued Generaion Sysems (PEDG), Florianopolis, 207, pp. 8. hps://doi.org/0.09/pedg.207.7972440 [4] B. Zhao, Q. Yu, and W. Sun, Exended-Phase-Shif Conrol of Isolaed Bidirecional DC DC Converer for Power Disribuion in Microgrid, IEEE Transacions on Power Elecronics, vol. 27, no., pp. 4667 4680, Nov. 202. hps://doi.org/0.09/pel.20.280928 [5] G. Xu, D. Sha, Y. Xu and X. Liao, Dual-Transformer-Based DAB Converer Wih Wide ZS Range for Wide olage Conversion Gain Applicaion, IEEE Transacions on Indusrial Elecronics, vol. 65, no. 4, pp. 3306 336, April 208. [6]. Karhikeyan and R. Gupa, FRS-DAB Converer for Eliminaion of Circulaion Power Flow a Inpu and Oupu Ends, IEEE Transacions on Indusrial Elecronics, vol. 65, no. 3, pp. 235 244, Mar. 208. hps://doi.org/0.09/ie.207.2740853 [7] D. B. W. Abeywardana, B. Hredzak, and. G. Agelidis, Single-Phase Grid-Conneced LiFePO 4 Baery Supercapacior Hybrid Energy Sorage Sysem Wih Inerleaved Boos Inverer, IEEE Transacions on Power Elecronics, vol. 30, no. 0, pp. 559 5604, Oc. 205. hps://doi.org/0.09/pel.204.2372774 [8] X. Sun, X. Wu, Y. Shen, X. Li, and Z. Lu, A Curren-Fed Isolaed Bidirecional DC DC Converer, IEEE Transacions on Power Elecronics, vol. 32, no. 9, pp. 6882 6895, Sep. 207. [9] M. Ryu, D. Jung, J. Baek, and H. Kim, An Opimized Design of Bi- Direcional Dual Acive Bridge Converer for Low olage Baery Charger, in 204 6h Inernaional Power Elecronics and Moion Conrol Conference and Exposiion, Analya, 204, pp. 77 83. hps://doi.org/0.09/epepemc.204.6980709 [0] L. Zhu, A Novel Sof-Commuaing Isolaed Boos Full-Bridge ZS- PWM DC DC Converer for Bidirecional High Power Applicaions, IEEE Transacions on Power Elecronics, vol. 2, no. 2, pp. 422-429, Mar. 2006. hps://doi.org/0.09/pel.2005.869730 [] R. Wason and F. C. Lee, A Sof-Swiched, Full-Bridge Boos Converer Employing an Acive-Clamp Circui, in PESC Record. 27h Annual IEEE Power Elecronics Specialiss Conference, Baveno, 996, vol. 2, pp. 948 954. hps://doi.org/0.09/pesc.996.548847 [2] R. Y. Chen, T. J. Liang, J. F. Chen, R. L. Lin, and K. C. Tseng, Sudy and Implemenaion of a Curren-Fed Full-Bridge Boos DC DC Converer Wih Zero-Curren Swiching for High-olage Applicaions, IEEE Transacions on Indusry Applicaions, vol. 44, no. 4, pp. 28 226, 2008. hps://doi.org/0.09/ia.2008.926056 [3] P. Xuewei and A. K. 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Ivakhno, Full Sof-Swiching High Sep-Up DC-DC Converer for Phoovolaic Applicaions, in 204 6h European Conference on Power Elecronics and Applicaions, Lappeenrana, Finland, 204, pp. 7. hps://doi.org/0.09/epe.204.6903 [7] A. Chub, R. Kosenko, A. Blinov,. Ivakhno,. Zamaruiev, and B. Syslo, Full Sof-Swiching Bidirecional Curren-Fed DC-DC Converer, in 56h Inernaional Scienific Conference on Power and Elecrical Engineering of Riga Technical Universiy (RTUCON), Riga, 205, pp. 89 94. hps://doi.org/0.09/rucon.205.734349 Roman Kosenko (S 4) received he Dipl. Eng. and M. sc. degrees in Elecronics from he Deparmen of Indusrial Elecronics, Chernihiv Sae Universiy of Technology, Chernihiv, Ukraine, in 20 and 203, respecively. He is currenly working oward he Ph. D. degree a he Power Elecronics Group, Deparmen of Elecrical Power Engineering and Mecharonics, Tallinn Universiy (Esonia), and a he Biomedical Radioelecronic Apparaus and Sysems Deparmen of Chernihiv Naional Universiy of Technology (Ukraine). His fields of ineres include research, design and simulaion of swich mode converers for disribued power generaion sysems. He is auhor or co-auhor of 25 scienific papers and is he holder of hree uiliy models in he field of power elecronics. E-mail: roman.kosenko@u.ee ORCID id: hps://orcid.org/0000-0002-624-3790 0

Elecrical, Conrol and Communicaion Engineering Andrei Blinov received he B. sc. and M. sc. degrees in elecrical drives and power elecronics and he Ph. D. degree, wih a disseraion devoed o he research of swiching properies and performance improvemen mehods of high-volage IGBT-based DC-DC converers, from Tallinn Universiy of Technology, Tallinn, Esonia, in 2005, 2008, and 202, respecively. He is currenly a Senior Researcher a he Deparmen of Elecrical Engineering, Tallinn Universiy of Technology. His research ineress are in modelling and research of swich-mode power converers, advanced modulaion echniques, new power semiconducor device echnologies and semiconducor hea dissipaion aspecs. E-mail: andrei.blinov@ieee.org ORCID id: hps://orcid.org/0000-000-8577-4897 Dmiri innikov (M 07 SM ) received he Dipl. Eng., M. sc., and Dr. sc. echn. degrees in elecrical engineering from Tallinn Universiy of Technology, Tallinn, Esonia, in 999, 200, and 2005, respecively. He is currenly he Head of he Power Elecronics Group, Deparmen of Elecrical Power Engineering and Mecharonics, Tallinn Universiy of Technology, and a Gues Researcher a he Insiue of Indusrial Elecronics and Elecrical Engineering, Riga Technical Universiy. He has auhored more han 200 published papers on power converer design and developmen and is he holder of numerous paens and uiliy models in his field. His research ineress include impedance-source power converers, modelling and simulaion of power sysems, applied design of power converers and conrol sysems, and implemenaion of wide bandgap semiconducors. E-mail: dmiri.vinnikov@gmail.com ORCID id: hps://orcid.org/0000-000-600-3464 Andrii Chub (S 2 M 7) received he B. sc. degree in Elecronics and he M. sc. degree in Elecronic Sysems from Chernihiv Sae Technological Universiy, Chernihiv, Ukraine, in 2008 and 2009, respecively. He is currenly pursuing he Ph. D. degree a he Power Elecronics Group, Tallinn Universiy of Technology. He is currenly a Gues Researcher a he Chair of Power Elecronics, Faculy of Engineering, Chrisian Albrechs Universiy of Kiel (Germany). He has coauhored more han 40 papers and one book chaper on power elecronics and is applicaions. His research ineress include DC-DC converers, DC-AC inverers, impedance source elecric energy conversion echnology, implemenaion of he new wide-bandgap semiconducors in power elecronic converers, and conrol of renewable energy conversion sysems. E-mail: andrii.chub@ieee.org ORCID id: hps://orcid.org/0000-0002-4253-7506