Dual P-Channel.5-V (G-S) MOSFET PRODUCT SUMMARY V DS (V) R DS(on) (Ω) I D (A).6 at V GS = -.5 V -.7 -. at V GS = -.5 V - 3.7 FEATURES Halogen-free According to IEC 69-- Definition Compliant to RoHS Directive /95/EC S S SO-8 S 8 D G 7 D S 3 6 D G 5 D G G Top View Ordering Information: Si9933BDY-T-E3 (Lead (Pb)-free) Si9933BDY-T-GE3 (Lead (Pb)-free and Halogen-free) D P-Channel MOSFET D P-Channel MOSFET ABSOLUTE MAXIMUM RATINGS T A = 5 C, unless otherwise noted Parameter Symbol s Steady State Unit Drain-Source Voltage V DS - V Gate-Source Voltage V GS ± Continuous Drain Current (T J = 5 C) a T A = 5 C -.7-3.6 I D T A = 7 C - 3.8 -.8 A Pulsed Drain Current I DM - Continuous Source Current (Diode Conduction) a I S -.7 -.9 T A = 5 C Maximum Power Dissipation a.. P D W T A = 7 C.3.7 Operating Junction and Storage Temperature Range T J, T stg - 55 to 5 C THERMAL RESISTANCE RATINGS Parameter Symbol Typical Maximum Unit Maximum Junction-to-Ambient a t s 55 6.5 R thja Steady State 9 C/W Maximum Junction-to-Foot (Drain) Steady State R thjf 33 Notes: a. Surface Mounted on " x " FR board. For SPICE model information via the Worldwide Web: /www/product/spice.htm S9-95-Rev. C, 8-Sep-9
SPECIFICATIONS T A = 5 C unless otherwise noted Parameter Symbol Test Conditions Min. Typ. Max. Unit Static Gate Threshold Voltage V GS(th) V DS = V GS, I D = - 5 µa -.6 -. V Gate-Body Leakage I GSS V DS = V, V GS = ± V ± na V DS = - V, V GS = V - Zero Gate Voltage Drain Current I DSS V DS = - V, V GS = V, T J = 55 C - 5 µa On-State Drain Current a I D(on) V DS - 5 V, V GS = -.5 V - A V GS = -.5 V, I D = -.7 A Drain-Source On-State Resistance a.8.6 R DS(on) V GS = -.5 V, I D = - A.8. Ω Forward Transconductance a g fs V DS = - V, I D = -.7 A S Diode Forward Voltage a V SD I S = -.7 A, V GS = V -.75 -. V Total Gate Charge Q g Dynamic b 6 9 Gate-Source Charge Q gs V DS = - V, V GS = -.5 V, I D = -.7 A. nc Gate-Drain Charge Q gd.9 Gate Resistance R g f = MHz 9.5 Ω Turn-On Delay Time t d(on) 35 Rise Time t r V DD = - V, R L = Ω 35 55 Turn-Off Delay Time t d(off) I D - A, V GEN = -.5 V, R g = 6 Ω 5 7 ns Fall Time t f 5 Source-Drain Reverse Recovery Time t rr I F = -.7 A, di/dt = A/µs 5 5 Notes: a. Pulse test; pulse width 3 µs, duty cycle %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 6 V GS = 5 V thru 3.5 V 3 V 6 T C = - 55 C 5 C - Drain Current (A) 8.5 V - Drain Current (A) 8 5 C I D V I D.5 V 3 5 V DS - Drain-to-Source Voltage (V) Output Characteristics..5..5..5 3. 3.5 V GS - Gate-to-Source Voltage (V) Transfer Characteristics S9-95-Rev. C, 8-Sep-9
..6 8 - R DS(on)..8. V GS =.5 V V GS =.5 V C - Capacitance (pf) 6 C oss C iss C rss. 8 6 I D - Drain Current (A) On-Resistance vs. Drain Current 8 6 V DS - Drain-to-Source Voltage (V) Capacitance 5.6 - Gate-to-Source Voltage (V) 3 V DS = V I D =.7 A R DS(on) - On-Resistance (Normalized)... V GS = V I D =.7 A V GS.8 3 5 6 7 8 Q g - Total Gate Charge (nc) Gate Charge.6-5 - 5 5 5 75 5 5 T J - Junction Temperature ( C) On-Resistance vs. Junction Temperature 3. I S - Source Current (A) T J = 5 C T J = 5 C - On-Resistance (Ω) R DS(on).6..8. I D = A I D =.7 A....6.8... V SD - Source-to-Drain Voltage (V) Source-Drain Diode Forward Voltage. 3 5 V GS - Gate-to-Source Voltage (V) On-Resistance vs. Gate-to-Source Voltage S9-95-Rev. C, 8-Sep-9 3
.6 5. Variance (V) V GS(th).. I D = 5 µa Power (W) 3 -. -. - 5-5 5 5 75 5 5 - - 6 T J - Temperature ( C) Threshold Voltage Time (s) Single Pulse Power Limited by R DS(on)* I DM Limited I D - Drain Current (A).. I D(on) Limited T A = 5 C Single Pulse BVDSS Limited P(t) =. P(t) =. P(t) =. P(t) = P(t) = DC. V DS - Drain-to-Source Voltage (V) * V GS minimum V GS at which R DS(on) is specified Safe Operating Area Normalized Effective Transient Thermal Impedance Duty Cycle =.5. Notes:.. P DM.5 t t. t. Duty Cycle, D = t. Per Unit Base = R thja = 9 C/W 3. T JM - T A = P DM Z (t) thja Single Pulse. Surface Mounted. - - 3 - - 6 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Ambient S9-95-Rev. C, 8-Sep-9
Normalized Effective Transient Thermal Impedance. Duty Cycle =.5...5.. - Single Pulse - 3 - - Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Foot maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see /ppg?778. S9-95-Rev. C, 8-Sep-9 5
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