Features MIC2194BM VIN EN/ UVLO CS OUTP VDD FB. 2k COMP GND. Adjustable Output Buck Converter MIC2194BM UVLO

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MIC2194 400kHz SO-8 Buck Control IC General Description s MIC2194 is a high efficiency PWM buck control IC housed in the SO-8 package. Its 2.9V to 14V input voltage range allows it to efficiently step down voltages in 3.3V, 5V, and 12V systems as well as 1- or 2-cell Li Ion battery powered applications. The flexible architecture of the MIC2194 allows for it to be configured as a buck or a buck-boost converter. The MIC2194 solution saves valuable board space. The device is housed in the space-saving SO-8 package, whose low pin-count minimizes external components. Its 400kHz PWM operation allows a small inductor and small output capacitors to be used. The MIC2194 can implement allceramic capacitor solutions. The MIC2194 drives a high-side P-channel MOSFET. A low output driver impedance of 2Ω allows the MIC2194 to drive large external MOSFETs to generate a wide range of output currents. The MIC2194 can achieve maximum duty cycles of 100%, which can be useful in low headroom applications. The MIC2194 is available in an 8 pin SOIC package with a junction temperature range of 40 C to +125 C. Features 2.9V to 14V input voltage range 400kHz oscillator frequency PWM current mode control 2Ω output drivers 100% maximum duty cycle 0.5µA micro-power shutdown Programmable UVLO Front edge blanking Cycle-by-cycle current limiting Frequency foldback short circuit protection 8-lead SOIC package Applications Point of load power supplies Negative voltage buck-boost power supplies Distributed power systems Base stations Wireless modems ADSL line cards Servers Step down conversion in 3.3V, 5V, 12V systems 1-and 2-cell Li Ion battery operated equipment Typical Application V IN 12V 0.012Ω 47µF 20V ( 2) MIC2194BM VIN EN/ UVLO CS OUTP Si4431A ( 2) 5.2µH V OUT 5V, 5A 1µF 2.2nF 2k VDD COMP FB GND B530 10k 3.32k 220µF 10V ( 2) Adjustable Output Buck Converter V IN +3.3V 0.040Ω Si9803 22µH 10µF 16V 10µF 16V 1µF MIC2194BM VIN CS EN/ OUTP UVLO VDD FB 4.99k COMP GND B530 3.01k 1k 22nF 220µF 10V ( 2) 10nF V OUT 5V, 0.6A Positive-to-Negative Buck-Boost Converter, Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel + 1 (408) 944-0800 fax + 1 (408) 474-1000 http://www.micrel.com April 2005 1 MIC2194

Ordering Information Part Number Standard Lead-Free Output Voltage Frequency Junction Temp. Range Package MIC2194BM MIC2194YM Adjustable 400kHz 40 C to +125 C 8-lead SOP Pin Configuration COMP 1 8 VIN FB 2 7 OUTP EN/UVLO 3 6 GND CS 4 5 VDD 8 Lead SOIC (M) Pin Description Pin Number Pin Name Pin Function 1 COMP Compensation (Output): Internal error amplifier output. Connect to a capacitor or series RC network to compensate the regulator s control loop. 2 FB Feedback (Input): The circuit regulates this pin to 1.245V. 3 EN/UVLO Enable/Undervoltage Lockout (Input): A low level on this pin will power down the device, reducing the quiescent current to under 0.5µA. This pin has two separate thresholds, below 1.5V the output switching is disabled, and below 0.9V the device is forced into a complete micropower shutdown. The 1.5V threshold functions as an accurate undervoltage lockout (UVLO) with hysteresis. 4 CS The ( ) input to the current limit comparator. A built-in offset of 110mV between VIN and CSL in conjunction with the current sense resistor sets the current limit threshold level. This is also the ( ) input to the current amplifier. 5 VDD 3V internal linear-regulator output. VDD is also the supply voltage bus for the chip. Bypass to GND with 1µF. 6 GND Ground. 7 OUTP High current drive for the synchronous N-channel MOSFET. Voltage swing is from ground to VIN. On-resistance is typically 3Ω @ 5V IN. 8 VIN Input voltage to the circuit. Also the high side input to the current sense amplifier supplies power to the gate drive circuit. MIC2194 2 April 2005

Absolute Maximum Ratings (Note 1) Supply Voltage (V IN )... 15V Digital Supply Voltage ( )... 7V Enable Pin Voltage (V EN )... 0.3V to +15V Comp Pin Voltage (V COMP )... 0.3V to +3V Feedback Pin Voltage (V FB )... 0.3V to +3V Current Sense Voltage (V IN V CS )... 0.3V to +1V Power Dissipation (P D )... 285mW @ T A = 85 C Ambient Storage Temp... 65 C to +150 C ESD Rating, Note 3... 2kV Operating Ratings (Note 2) Supply Voltage (V IN )... +2.9V to +14V Junction Temperature... 40 C T J +125 C Package Thermal Resistance θ JA 8-lead SOP... 140 C/W Electrical Characteristics V IN = 5V, V OUT = 3.3V, T J = 25 C, unless otherwise specified. Bold values indicate 40 C<T J <+125 C. Parameter Condition Min Typ Max Units Regulation Feedback Voltage Reference (1%) 1.233 1.245 1.257 V (2%) 1.22 1.245 1.27 V Feedback Bias Current 50 na Output Voltage Line Regulation 5V V IN 9V 0.15 % / V Output Voltage Load Regulation 0mV < (V IN V CS ) < 75mV 0.9 % Output Voltage Total Regulation 5V V IN 9V, 0mV < (V IN V CS ) < 75mV (±3%) 1.208 1.282 V Input & Supply V IN Input Current (I Q ) (excluding external MOSFET gate current) 1 2 ma Shutdown Current (I SD ) V EN = 0V 0.5 5 µa Digital Supply Voltage ( ) I L = 0 2.82 3.0 3.18 V Digital Supply Load Regulation I L = 0 to 1mA 0.1 V Undervoltage Lockout upper threshold (turn on threshold) 2.65 V UVLO Hysteresis 100 mv Enable/UVLO Enable Input Threshold 0.6 0.9 1.2 V UVLO Threshold 1.4 1.5 1.6 V Enable Input Current V EN/UVLO = 5V 0.2 5 µa Current Limit Current Limit Threshold Voltage V IN V CS voltage to trip current limit 90 110 130 mv Error Amplifier Error Amplifier Gain 20 V/V Current Amplifier Current Amplifier Gain 3.0 V/V Oscillator Section Oscillator Frequency (f O ) 360 400 440 khz Maximum Duty Cycle V FB = 1.0V 100 % Minimum On Time V FB = 1.5V 165 ns Frequency Foldback Threshold Measured on FB 0.3 V Frequency Foldback Frequency 90 khz April 2005 3 MIC2194

Parameter Condition Min Typ Max Units Gate Drivers Rise/Fall Time C L = 3300pF 25 ns Output Driver Impedance Source, V IN = 12V 2 6 Ω Sink, V IN = 12V 2 6 Ω Source, V IN = 5V 3 7 Ω Sink, V IN = 5V 3 7 Ω Note 1. Note 2. Note 3. Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the device outside of its operating ratings. The maximum allowable power dissipation is a function of the maximum junction temperature, T J(Max), the junction-to-ambient thermal resistance, θ JA, and the ambient temperature, T A. The device is not guaranteed to function outside its operating rating. Devices are ESD sensitive, handling precautions required. Human body model, 1.5kΩ in series with 100pF. MIC2194 4 April 2005

Typical Characteristics QUIESCENT CURRENT (ma) 4.5 4 3.5 3 2.5 2 1.5 1 0.5 Quiescent Current vs. Input Voltage Switching Standby 0 0 5 10 15 QUIESCENT CURRENT (ma) Quiescent Current vs. Temperature 2.0 1.8 V IN = 5V 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0-40 -20 0 20 40 60 80 100 120 TEMPERATURE ( C) (V) vs. Input Voltage 3.05 3.00 2.95 2.90 2.85 2.80 0 5 10 15 (V) 3.05 3.03 3.01 2.99 2.97 2.95 2.93 2.91 vs. Load V IN = 3.3V V IN =5V V IN = 12V 2.89 2.87 2.85 0 0.2 0.4 0.6 0.8 1 1.2 LOAD CURRENT (ma) VDD (V) 3.50 3.40 3.30 3.20 3.10 3.00 2.90 2.80 2.70 2.60 vs. Temperature V IN = 5V 2.50-40 -20 0 20 40 60 80 100 120 TEMPERATURE ( C) REFERENCE VOLTAGE (V) Error Amp Reference Voltage vs. Input Voltage 1.2455 1.2450 1.2445 1.2440 1.2435 1.2430 0 2 4 6 8 10 12 14 REFERENCE VOLTAGE (V) Error Amp Reference Voltage vs. Temperature 1.3 1.29 1.28 1.27 1.26 1.25 1.24 1.23 1.22 1.21 V IN = 5V 1.2-40 -20 0 20 40 60 80 100 120 TEMPERATURE ( C) FREQUENCY VARIATION (%) 0.5 0-0.5-1 -1.5 Frequency Variation vs. Input Voltage -2 0 2 4 6 8 10 12 14 SOFT START CURRENT (µa) Frequency Variation vs. Temperature 450 V 440 IN = 5V 430 420 410 400 390 380 370 360 350-50 -30-10 10 30 50 70 90 110 TEMPERATURE ( C) THRESHOLD (mv) 130 125 120 115 110 105 100 95 Overcurrent Threshold vs. Input Voltage 90 0 2 4 6 8 10 12 14 CURRENT LIMIT (mv) 120 115 110 105 100 95 90 85 Current Limit Threshold vs. Temperature V IN = 5V 80-40 -20 0 20 40 60 80 100 120 TEMPERATURE ( C) IMPEDANCE (Ω) OUTP Drive Impedance vs. Input Voltage 4.5 4 3.5 3 2.5 Source(Ω) 2 1.5 Sink (Ω) 1 0.5 0 0 2 4 6 8 10 12 14 April 2005 5 MIC2194

Functional Diagram V IN C DECOUP C IN VIN 8 VREF 1.245V OVERCURRENT COMPARATOR 0.1V Threshold 9 CSH EN/UVLO 3 VDD 5 VDD BIAS GAIN 3 4 CSL R SENSE ON CURRENT SENSE AMP VIN fs/4 CONTROL 7 OUTP Q1 L1 V OUT OSC RESET D1 C OUT SLOPE COMPENSATION PWM COMPARATOR gm = 0.0002 gain = 20 V REF COMP 1 100k ERROR AMP 2 FB fs/4 0.3V FREQUENCY FOLDBACK 6 GND Figure 1. MIC2194 Block Diagram Functional Characteristics Controller Overview and Functional Description The MIC2194 is a BiCMOS, switched-mode, step down (buck) converter controller. It uses a P-channel MOSFET, which allows the controller to operate at 100% duty cycle and eliminates the need for a high side drive bootstrap circuit. Current mode control is used to achieve superior transient line and load regulation. An internal corrective ramp provides slope compensation for stable operation above a 50% duty cycle. The controller is optimized for high efficiency, high performance DC-DC converter applications. Figure 1 is a block diagram of the MIC2194 configured as a buck converter. At the beginning of the switching cycle, the OUTP pin pulls low and turns on the high-side P-channel MOSFET, Q1. Current flows from the input to the output through the current sense resistor, MOSFET and inductor. The current amplitude increases, controlled by the inductor. The voltage developed across the current sense resistor, R SENSE, is amplified inside the MIC2194 and combined with an internal ramp for stability. This signal is compared to the output of the error amplifier. When the current signal equals the error voltage signal, the P-channel MOSFET is turned off. The inductor current flows through the diode, D1. At the beginning of the next switching cycle, the P-channel MOSFET is turned on which turns off the diode, D1. MIC2194 6 April 2005

The MIC2194 controller is broken down into several functions. Control loop PWM operation Current mode control Current limit Reference, enable and UVLO MOSFET gate drive Oscillator Control Loop PWM Control Loop The MIC2194 uses current mode control to regulate the output voltage. This dual control loop method (illustrated in Figure 2) senses the output voltage (outer loop) and the inductor current (inner loop). It uses inductor current and output voltage to determine the duty cycle of the buck converter. Sampling the inductor current effectively removes the inductor from the control loop, which simplifies compensation. V IN Switching Converter Switch Driver V ERROR t ON t PER I INDUCTOR V ERROR D = t ON /t PER I INDUCTOR V REF V OUT Voltage Divider Figure 2. Current Mode Control Example As shown in Figure 1, the inductor current is sensed by measuring the voltage across the resistor, R SENSE. A ramp is added to the amplified current sense signal to provide slope compensation, which is required to prevent unstable operation at duty cycles greater than 50%. A transconductance amplifier is used for the error amplifier, which compares an attenuated sample of the output voltage with a reference voltage. The output of the error amplifier is the compensation pin (COMP), which is compared to the current sense waveform in the PWM block. When the current signal becomes greater than the error signal, the comparator turns off the high side drive. The COMP pin provides access to the output of the error amplifier and allows the use of external components to stabilize the voltage loop. Current Limit The output current is detected by the voltage drop across the external current sense resistor (R SENSE in Figure 1.). The current sense resistor must be sized using the minimum current limit threshold. The external components must be designed to withstand the maximum current limit. The current sense resistor value is calculated by the equation below: R SENSE MIN _ CURRENT _ SENSE _ THRESHOLD = I OUT _ MAX The maximum output current is: I OUT _ MAX MAX _ CURRENT _ SENSE _ THRESHOLD = R SENSE The current sense pins VIN (pin 8) and CSL (pin 4) are noise sensitive due to the low signal level, high input impedance and input ripple voltage. The PCB traces should be short and routed close to each other. A 0.1µF capacitor across the pins will attenuate high frequency switching noise. When the peak inductor current exceeds the current limit threshold, the overcurrent comparator turns off the high-side MOSFET for the remainder of the switching cycle, effectively decreasing the duty cycle. The output voltage drops as additional load current is pulled from the converter. When the voltage at the feedback pin (FB) reaches approximately 0.3V, the circuit enters frequency foldback mode and the oscillator frequency will drop to 1/4 of the switching frequency. This limits the maximum output power delivered to the load under a short circuit condition. Reference, Enable and UVLO Circuits The output drivers are enabled when the following conditions are satisfied: The voltage (pin 5) is greater than its undervoltage threshold. The voltage on the enable pin (pin 3) is greater than the enable UVLO threshold. The enable pin (pin 3) has two threshold levels, allowing the MIC2194 to shut down in a low current mode, or turn off output switching in standby mode. An enable pin voltage lower than the shutdown threshold turns off all the internal circuitry and places the MIC2194 in a micropower shutdown mode. If the enable pin voltage is between the shutdown and standby thresholds, the internal bias, and reference voltages are turned on. The output drivers are inhibited from switching. The OUTP pin is in a high state. Raising the enable voltage above the standby threshold enables the output driver. The standby threshold is specified in the electrical characteristics. A resistor divider can be used with the enable pin to prevent the power supply from turning on until a specified input voltage is reached. The circuit in Figure 3 shows how to connect the resistors. April 2005 7 MIC2194

R1 V IN 1.5V Typical EN/UVLO (3) 140mV Hysteresis (typical) MIC2194 Bias Circuitry Figure 3. UVLO Circuitry The line voltage turn on trip point is: VINPUT _ ENABLE= VTHRESHOLD R1+ where: V THRESHOLD is the voltage level of the internal comparator reference, typically 1.5V. The input voltage hysteresis is equal to: R1+ VINPUT _ HYST= VHYST where: V HYST is the internal comparator hysteresis level, typically 140mV. V INPUT_HYST is the hysteresis at the input voltage The MIC2194 will be disabled when the input voltage drops back down to: V INPUT_OFF = V INPUT_ENABLE V INPUT_HYST = (V THRESHOLD V HYST ) R1+ Either of 2 UVLO conditions will pull the soft start capacitor low: When the voltage drops below its undervoltage lockout level. When the enable pin drops below the its enable threshold The internal bias circuit generates an internal 1.245V bandgap reference voltage for the voltage error amplifier and a 3V VDD voltage for the internal control circuitry. The VDD pin must be decoupled with a 1µF ceramic capacitor. The capacitor must be placed close to the VDD pin. The other end of the capacitor must be connected directly to the ground plane. MOSFET Gate Drive The MIC2194 is designed to drive a high-side P-channel MOSFET. The source pin of the P-channel MOSFET is connected to the input of the power supply. It is turned on when OUTP pulls the gate of the MOSFET low. The advantage of using a P-channel MOSFET is that it does not require a bootstrap circuit to boost the gate voltage higher than the input, as would be required for an N-channel MOSFET. The VIN pin (pin 8) supplies the drive voltage to the gate drive pin, OUTP. MOSFET Selection The P-channel MOSFET must have a V GS threshold voltage equal to or lower than the input voltage when used in a buck converter topology. There is a limit to the maximum gate charge the MIC2194 will drive. MOSFETs with high gate charge will have slower turn-on and turn-off times. Slower transition times will cause higher power dissipation in the MOSFET due to higher switching transition losses. The MOSFET gate charge is also limited by power dissipation in the MIC2194. The power dissipated by the gate drive circuitry is calculated below: P GATE_DRIVE = Q GATE V IN f S where: Q GATE is the total gate charge of both the N- and P- channel MOSFETs. f S is the switching frequency V IN is the gate drive voltage The graph in Figure 4 shows the total gate charge that can be driven by the MIC2194 over the input voltage range, for different values of switching frequency. MAMIMUM GATE CHARGE (nc) 250 200 150 100 50 Max Gate Charge 0 0 5 10 15 Figure 4. MIC2194 V IN vs Max. Gate Charge Oscillator The internal oscillator is free running and requires no external components. The maximum duty cycle for both frequencies is 100%. This is another advantage of using a P-channel MOSFET for the high-side drive; it can be continuously turned on. A frequency foldback mode is enabled if the voltage on the feedback pin (pin 2) is less than 0.3V. In frequency foldback, the oscillator frequency is reduced by approximately a factor of 4. Frequency foldback is used to limit the energy delivered to the output during a short circuit fault condition. Voltage Setting Components The MIC2194 requires two resistors to set the output voltage as shown in Figure 5. MIC2194 8 April 2005

MIC2194 Voltage Amplifier V REF 1.245V Pin 2 V OUT Figure 5 The output voltage is determined by: R1 VOUT= VREF 1+ Where: V REF for the MIC2194 is typically 1.245V. Lower values of R1 are preferred to prevent noise from appearing on the FB pin. A typically recommended value is 10kΩ. If R1 is too small in value it will decrease the efficiency of the power supply, especially at low output loads. Once R1 is selected, can be calculated with the following formula: V = V REF OUT R1 V REF Efficiency Considerations Efficiency is the ratio of output power to input power. The difference is dissipated as heat in the buck converter. Under light output load, the significant contributors are: The V IN supply current, which includes the current required to switch the external MOSFET. Core losses in the output inductor. To maximize efficiency at light loads: Use a low gate charge MOSFET or use the smallest MOSFET, which is still adequate for maximum output current. Use a ferrite material for the inductor core, which has less core loss than an MPP or iron power core. R1 Under heavy output loads the significant contributors to power loss are (in approximate order of magnitude): Resistive on time losses in the MOSFET Switching transition losses in the MOSFET Inductor resistive losses Current sense resistor losses Input capacitor resistive losses (due to the capacitors ESR) To minimize power loss under heavy loads: Use low on-resistance MOSFETs. Use low threshold logic level MOSFETs when the input voltage is below 5V. Multiplying the gate charge by the on-resistance gives a figure of merit, providing a good balance between low load and high load efficiency. Slow transition times and oscillations on the voltage and current waveforms dissipate more power during the turn on and turn off of the MOSFET. A clean layout will minimize parasitic inductance and capacitance in the gate drive and high current paths. This will allow the fastest transition times and waveforms without oscillations. Low gate charge MOSFETs will transition faster than those with higher gate charge requirements. For the same size inductor, a lower value will have fewer turns and therefore, lower winding resistance. However, using too small of a value will require more output capacitors to filter the output ripple, which will force a smaller bandwidth, slower transient response and possible instability under certain conditions. Lowering the current sense resistor value will decrease the power dissipated in the resistor. However, it will also increase the overcurrent limit and will require larger MOSFETs and inductor components. Use low ESR input capacitors to minimize the power dissipated in the capacitors ESR. April 2005 9 MIC2194

Package Information 0.026 (0.65) MAX) PIN 1 0.157 (3.99) 0.150 (3.81) DIMENSIONS: INCHES (MM) 0.050 (1.27) TYP 0.020 (0.51) 0.013 (0.33) 0.0098 (0.249) 0.0040 (0.102) 45 0.010 (0.25) 0.007 (0.18) 0.064 (1.63) 0.045 (1.14) 0.197 (5.0) 0 8 0.189 (4.8) SEATING PLANE 8-Pin SOP (M) 0.050 (1.27) 0.016 (0.40) 0.244 (6.20) 0.228 (5.79) MICREL, INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB http://www.micrel.com The information furnished by in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by for its use. reserves the right to change circuitry and specifications at any time without notification to the customer. Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser s use or sale of Products for use in life support appliances, devices or systems is at Purchaser s own risk and Purchaser agrees to fully indemnify for any damages resulting from such use or sale. 2005, Incorporated. MIC2194 10 April 2005