AON7E 3V NChannel MOSFET General Description The AON7E combines advanced trench MOSFET technology with a low resistance package to provide extremely low R DS(ON). This device is ideal for load switch and battery protection applications. Product Summary V DS I D (at V GS =V) R DS(ON) (at V GS =V) R DS(ON) (at V GS =.V) 3V A <.3mΩ <.mω ESD protected % UIS Tested % R g Tested Top View DFN 3x3 EP Bottom View Top View D 3 8 7 G Pin S Absolute Maximum Ratings T A = C unless otherwise noted Parameter Symbol Maximum DrainSource Voltage 3 GateSource Voltage Continuous Drain Current G Pulsed Drain Current C T C = C T C = C V DS V GS I D 3 I DM Continuous Drain T A = C I DSM Current T A =7 C A Avalanche Current C Avalanche energy L=.mH C I AS, I AR E AS, E AR A mj T C = C 3 P Power Dissipation B D T C = C W T A = C 3. P Power Dissipation A DSM W T A =7 C Junction and Storage Temperature Range T J, T STG to C Units V Thermal Characteristics Parameter Symbol Typ Max Units Maximum JunctiontoAmbient A t s 3 C/W Maximum JunctiontoAmbient A D R θja SteadyState 7 C/W Maximum JunctiontoCase SteadyState.8 3. C/W R θjc ± V A Rev.: June www.aosmd.com Page of
AON7E Electrical Characteristics (T J = C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units STATIC PARAMETERS BV DSS DrainSource Breakdown Voltage I D =µa, V GS =V 3 3 V V DS =3V, V GS =V I DSS Zero Gate Voltage Drain Current µa T J = C I GSS GateBody leakage current V DS =V, V GS =±V ua I GSS GateBody leakage current V DS =V, V GS =± V ua V GS(th) Gate Threshold Voltage V DS =V GS I D =µa.3.8. V I D(ON) On state drain current V GS =V, V DS =V A R DS(ON) 3..3 T J = C..8. mω g FS Forward Transconductance V DS =V, I D =A 8 S V SD Diode Forward Voltage I S =A,V GS =V.7 V I S Maximum BodyDiode Continuous Current G A C iss Static DrainSource OnResistance DYNAMIC PARAMETERS Input Capacitance V GS =V, I D =A V GS =.V, I D =A 9 9 pf C oss Output Capacitance V GS =V, V DS =V, f=mhz 7 39 pf C rss Reverse Transfer Capacitance 3 3 pf R g Gate resistance V GS =V, V DS =V, f=mhz.. 3. Ω SWITCHING PARAMETERS Q g (V) Total Gate Charge 3 nc Q g (.V) Total Gate Charge 9 nc V GS =V, V DS =V, I D =A Q gs Gate Source Charge 7. nc Q gd Gate Drain Charge. nc t D(on) TurnOn DelayTime 7 ns t r TurnOn Rise Time V GS =V, V DS =V, R L =.7Ω, ns t D(off) TurnOff DelayTime R GEN =3Ω. ns t f TurnOff Fall Time. ns t rr Body Diode Reverse Recovery Time I F =A, di/dt=a/µs 7. ns Q rr Body Diode Reverse Recovery Charge I F =A, di/dt=a/µs 3 nc A. The value of R θja is measured with the device mounted on in FR board with oz. Copper, in a still air environment with T A = C. The Power dissipation P DSM is based on R θja t s value and the maximum allowed junction temperature of C. The value in any given application depends on the user's specific board design, and the maximum temperature of C may be used if the PCB allows it. B. The power dissipation P D is based on T J(MAX) = C, using junctiontocase thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Repetitive rating, pulse width limited by junction temperature T J(MAX) = C. Ratings are based on low frequency and duty cycles to keep initial T J = C. D. The R θja is the sum of the thermal impedence from junction to case R θjc and case to ambient. E. The static characteristics in Figures to are obtained using <3µs pulses, duty cycle.% max. F. These curves are based on the junctiontocase thermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of T J(MAX) = C. The SOA curve provides a single pulse rating. G. The maximum current rating is package limited. H. These tests are performed with the device mounted on in FR board with oz. Copper, in a still air environment with T A = C. mω THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Rev.: June www.aosmd.com Page of
AON7E TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 8 V V.V 3.V 8 V DS =V I D (A) V GS =.V 3V I D (A) C C 3 V DS (Volts) Fig : OnRegion Characteristics (Note E) 3 V GS (Volts) Figure : Transfer Characteristics (Note E) R DS(ON) (mω) 3 V GS =.V V GS =V Normalized OnResistance.8... V GS =V I D =A 7 V GS =.V I D =A 3 I D (A) Figure 3: OnResistance vs. Drain Current and Gate Voltage (Note E).8 7 7 Temperature ( C) Figure : OnResistance vs. Junction 8Temperature (Note E) R DS(ON) (mω) 8 C C I D =A I S (A).E.E.E.E.E.E3 C C.E 8 V GS (Volts) Figure : OnResistance vs. GateSource Voltage (Note E).E.....8.. V SD (Volts) Figure : BodyDiode Characteristics (Note E) Rev.: June www.aosmd.com Page 3 of
AON7E TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS V GS (Volts) 8 V DS =V I D =A Capacitance (pf) 3 3 8 C oss C iss 3 Q g (nc) Figure 7: GateCharge Characteristics 8 C rss 3 V DS (Volts) Figure 8: Capacitance Characteristics. I D (Amps).... R DS(ON) limited T J(Max) = C T C = C DC µs µs µs ms ms Power (W) 8 T J(Max) = C T C = C 7... V DS (Volts) Figure 9: Maximum Forward Biased Safe Operating Area (Note F).... Pulse Width (s) Figure : Single Pulse Power Rating 8Junctionto Case (Note F) Z θjc Normalized Transient Thermal Resistance. D=T on /T T J,PK =T C P DM.Z θjc.r θjc R θjc =3. C/W In descending order D=.,.3,.,.,.,., single pulse T on T Single Pulse...... P D Pulse Width (s) Figure : Normalized Maximum Transient Thermal Impedance (Note F) Rev.: June www.aosmd.com Page of
AON7E TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS I AR (A) Peak Avalanche Current T A = C T A = C T A = C T A = C Power Dissipation (W) 3 Time in avalanche, t A (µs) Figure : Single Pulse Avalanche capability (Note C) 7 T CASE ( C) Figure 3: Power Derating (Note F) Current rating I D (A) 3 Power (W) T A = C 7 7 T CASE ( C) Figure : Current Derating (Note F)... Pulse Width (s) 8 Figure : Single Pulse Power Rating Junctionto Ambient (Note H) Z θja Normalized Transient Thermal Resistance.. D=T on /T T J,PK =T A P DM.Z θja.r θja R θja =7 C/W Single Pulse In descending order D=.,.3,.,.,.,., single pulse P D T on T...... Pulse Width (s) Figure : Normalized Maximum Transient Thermal Impedance (Note H) Rev.: June www.aosmd.com Page of
AON7E Gate Charge Test Circuit & Waveform Qg V Qgs Qgd Ig RL Resistive Switching Test Circuit & Waveforms Charge Rg 9% % td(on) t r t d(off) t f t on t off Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L E = / LI AR AR BV DSS Id Rg Id I AR Diode Recovery Test Circuit & Waveforms Q = Idt rr Ig Isd L Isd I F di/dt I RM t rr Rev.: June www.aosmd.com Page of