Purpose The intent of this course is to provide you with information about the main features of the S08 Timer/PWM (TPM) interface module and how to configure and use it in common applications. Objectives List the main features of the TPM module. Identify how to set up and implement an input capture function. Identify how set up and implement an output compare function. Identify how to set up and implement an edge-aligned PWM function. Identify how to set up and implement a center-aligned PWM function. Content 20 pages 3 questions Learning Time 30 minutes Course Introduction This course will provide you with information about the S08 Timer/PWM (TPM) interface module. First, you will examine the main features of the TPM module. Then, you will look at the configuration and usage of the TPM in detail. By the end of this course, you should be able to set up and implement an output compare function, an input capture function, and both edge-aligned and center-aligned PWM functions.
TPM Module Features Multiple channels on timer Each channel may be input capture, output compare, or buffered edge-aligned PWM Rising-edge, falling-edge, or any-edge input capture trigger Set, clear, or toggle output compare option Selectable polarity on PWM outputs Each TPM may be configured for buffered, center-aligned pulse-width modulation (CPWM) on all channels Clock source options: bus clock, fixed system clock, or a clock connected to an external pin 16-bit free-running counter with an up/down counting option 16-bit modulus register to control counter range Timer system enable One interrupt per channel plus a terminal count interrupt Here you can see the main features of the TPM module. They include various configurations for the multiple channels on each timer: input capture, output compare, or buffered edge-aligned PWM. The input capture trigger can be risingedge, falling-edge, or any-edge. The output compare function has set, clear, and toggle options. PWM outputs have selectable polarity. Each TPM can also be configured for buffered, center-aligned PWM (CPWM) for all channels on a timer. The TPM has several clock source options: bus clock, fixed system clock, or a clock connected to an external pin. The clock source to prescaler for each TPM is independently selectable. Finally, the TPM module has these key features: a 16-bit free running counter with an up/down counting option, a 16-bit modulus register to control counter range, the ability to enable the timer system, and one interrupt per channel plus a terminal count interrupt.
Block Diagram Uses one I/O pin per channel Shares its I/O pins with general-purpose I/O port pins Has a single time reference Obtains interrupts from counter overflow and input/output timer channel activity Let s begin with a structural overview of the TPM module. Some S08 derivatives include more than one TPM with varying channel numbers, but this block diagram is a TPM module with two channels. The TPM uses one I/O pin per channel and shares its I/O pins with general-purpose I/O port pins. The central component of the TPM is the single time reference. Interrupts can be obtained from the counter overflow and either input or output timer channel activity.
Time Reference Normal Center-aligned PWM 0 In order to set up the TPM module for an input capture, output compare, or PWM function, you need to understand how to configure the time reference. Normally, the 16-bit counter is an up-counter that runs from 0 to 0xFFFF or to the value in the modulo registers. If it is configured for center-aligned PWM by setting the CPWMS bit, then the counter becomes an up-/down-counter that counts from 0 up to the value in the modulo registers and then counts back down to 0. The counter can be reset by writing any value to the timer count registers. An interrupt flag and enable are associated with the main 16-bit counter. The timer overflow flag (TOF) is a software-accessible indicator that the timer counter has overflowed. The conditions that cause the TOF to be set depend on the counting mode. In up-counting mode, the TOF is set at the 0xFFFF to 0 transition. If there is a limit value in the modulus registers, then the TOF is set at the transition from the value set to 0. When the counter is in up-/down- counting mode, the TOF flag gets set as the counter changes direction at the transition from the value set in the modulus register and the next lower count value.
Clock Source Select & Prescaler Clock Select B and Clock Select A control the clock source select. You can select the clock source for each TPM module to be off (TPM Disabled), the bus rate clock (BUSCLK), the fixed system clock (XCLK), or an external source (TPMCLK). By default, the bus clock drives the timer counter. The fixed system clock is useful for stable and accurate timing. The TPMCLK is an external input through a timer channel pin, and it can be used for pulse accumulator function and timer calibration. The prescaler provides the 16-bit counter with a clock value derived from the selected clock source and a divide-by ratio. Using PS0, PS1, and PS2, you can set the divide-by ratio to any binary value between 1 and 128. In its highest resolution mode (divide-by-1), the TPM supports a resolution of 50 ns at the maximum possible bus frequency of 20 MHz on certain parts such as the GB60.
Question Match each configuration of the 16-bit counter with its description by dragging the letters on the left to the correct description on the right. Click Done when you are finished. A B Input capture, output compare, or edge-aligned PWM mode Center-aligned PWM mode by setting the CPWMS bit configuration B A An up-/down-counter that counts from 0 up to the value in the modulo registers and then counts back down to 0. An up-counter that runs from 0 to 0xFFFF or to the value in the modulo registers. In order to set up the TPM module for an input capture, output compare, or PWM function, you need to understand how to configure the time reference. Let s review. Correct. In input capture, output compare, or edge-aligned PWM mode, the 16-bit counter is an up-counter that runs from 0 to 0xFFFF or to the value in the modulo registers. If it is configured for center-aligned PWM by setting the CPWMS bit, then the counter becomes an up-/down-counter that counts from 0 up to the value in the modulo registers and then counts back down to 0.
Input Capture 1. Active edge occurs on the pin 2. TPM latches the contents of the TPM counter into the channel value registers 3. Flag is set When the CPWMS bit is set to 0, the 16-bit counter is in up-counting mode and the TPM module can be configured for input capture. Let s take a closer look at this function. The input capture function captures the time at which an external event occurs on an associated I/O pin selected by the user. When an active edge (selectable as rising only, falling only, or any edge) occurs on the pin of an input capture channel, the TPM latches the contents of the TPM counter into the channel value registers, saving the time at which the input capture occurred. This event sets a flag that can optionally generate an interrupt request.
Example CPWMS in TPMCnSC = 1 Applications: Performing absolute timer reference to an external even Measuring the width of an input pulse Providing additional external interrupts One application for the input capture function is measuring an input period. First, you set the Mode Select B and A bits in the TPM channel status and control register (TPMCnSC) to 00 to set the channel and its corresponding pin to input capture mode. Second, you configure the input pin to look for rising edges or falling edges using Edge/Lvl select bits B and A in the TPM channel status and control register. In this example, the input pin is looking for rising edges. The input capture interrupt on the channel is enabled, and when the service routine receives an interrupt, it can save a copy of the input capture latch before returning to normal processing until the next edge is detected. At the next interrupt, the service routine subtracts the old saved value from the new value in the latch to determine the period. Finally, always remember to clear the interrupt flag in the service routine by first reading the flag and then writing a 0 to it. If you want to capture a very fine pulse accurately, you can use two timers: one to capture the rising edge, and the other to capture the falling edge. Other input capture applications include performing absolute timer reference to an external event, measuring the width of an input pulse, and providing additional external interrupts.
Output Compare Next, let s look at the output compare TPM function. When the CPWMS bit is set to 0, the 16-bit counter is in up-counting mode and the TPM module can be configured for output compare. The output compare function allows the TPM to generate timed pulses with programmable position, polarity, duration, and frequency. When the counter reaches the value in the channel value registers of an output compare channel, the TPM can set, clear, or toggle the channel pin. When an output compare event occurs, a flag bit is set which can optionally generate a CPU interrupt request. An interrupt service routine allows you to very accurately time and create external events using the output compare pins.
Example CPWMS in TPMSC = 0 Applications: Performing a single timed event, Performing a periodic interrupt event Implementing a single pulse with variable width One application for the output compare function is generating a variable output frequency. First, you set the Mode Select B and A bits in the TPM channel status and control register to 01 to set the channel and its I/O pin to output compare mode. You can then configure the output pin to toggle output on compare, clear output on compare, set output on compare, or allow for a software compare only using Edge/Lvl select bits B and A in the TPM channel status and control register. This example uses the toggle option to simplify the generation of pulses. The user enables the output compare interrupt on the channel, and when the value in the 16- bit counter equals the timer channel value set by the user in the interrupt service routine, the programmed output toggle is forced on the channel s corresponding pin. Typically, an interrupt service routine is used to schedule the next timer output signal transition. You read the value in the channel value register, add a time offset, and save the result back in the channel value register. A good programmer will read the 16-bit counter and check that it is not right at the transition point between the modulus value and 0 before writing to the timer channel value registers. As soon as the counter value catches up and equals the channel value register, the programmed activity occurs. Always remember to clear the interrupt flag in the service routine by first reading the flag and then writing a 0 to it. Other output compare applications include performing a single timed event, performing a periodic interrupt event, and implementing a single pulse with variable width.
Question Order the steps for using the input capture function when measuring an input period by dragging the numbers on the left to their matching steps on the right. Click Done when you are finished. Step 1 2 Configure the input pin to look for rising edges or falling edges using Edge/Lvl select bits B and A in the TPM channel status and control register Step 2 Step 3 1 3 Set the Mode Select B and A bits in the TPM channel status and control register to 00 to set the channel and its corresponding pin to input capture mode. Clear the interrupt flag in the service routine by first reading the flag and then writing a 0 to it. Let s review the steps for the input capture function when measuring an input period. Correct. First, you set the Mode Select B and A bits in the TPM channel status and control register to 00 to set the channel and its corresponding pin to input capture mode. You can then configure the input pin to look for rising edges or falling edges using Edge/Lvl select bits B and A in the TPM channel status and control register. Always remember to clear the interrupt flag in the service routine by first reading the flag and then writing a 0 to it.
PWM PWM generates a waveform with a fixed period and variable duty cycle. The duty cycle is the relative time spent in the high and low portions of the signal period. A common use for PWMs is digital-to-analog conversions using some external filtering. The generated analog voltage is proportional to the duty cycle. Theoretically, a 50 percent duty cycle would generate approximately half of the maximum analog voltage, and a 25 percent duty cycle would generate a quarter of the maximum analog voltage. PWMs are also commonly used to control motors and to control battery charging current. There are two different PWM functions: edgealigned PWM and center-aligned PWM.
Buffered Edge-aligned PWM Edge-aligned PWM mode uses the normal up-counting mode of the 16-bit counter with the CPWMS set to 0. You can use it when other channels in the same TPM are configured for input capture or output compare functions. You can have duty cycle cases of 0 percent and 100 percent if you set the timer channel value registers to 0 and to values greater than the modulus setting respectively. The output compare value in the TPM channel registers determines the pulse width (or duty cycle) of the PWM signal. The time between the modulus overflow and the output compare is the pulse width.
Edge-aligned PWM Registers CPWMS in TPMSC = 0 Let s take a look at the TPM registers that affect edge-aligned PWM configuration. The settings in the modulus registers determine the period of the PWM signal. The timer channel value registers determine the duty cycle. The settings in the Edge/Lvl Select B and A control bits in the TPM channel status and control register determine the polarity of the signal. For now, let s set these bits to 10, which will clear the output signal on a compare and set it when the counter overflows.
Conceptual View Now that you have configured the TPM module for the edge-aligned PWM function, what happens next? When the value in the 16-bit counter equals that of the timer channel value register, the programmed output signal transition (in this case, a clear output on compare), is forced on the signal pin. If interrupts are enabled, an interrupt will occur every time this happens, and the user must clear the channel flag in the interrupt service routine by first reading the flag and then writing a 0 to it. Enabling interrupts allows the user to change the duty cycle within the service routine. When the value in the 16-bit counter equals that of the modulus registers, an overflow is forced, resetting the counter to zero and forcing the signal high.
Buffered Center-aligned PWM The only TPM function that requires the CPWMS bit in the TPM channel status and control register to be set is center-aligned PWM. This type of PWM output uses the up-/down-counting mode of the timer counter, which increments until it reaches the value in the timer channel modulus registers before it decrements back down to 0, where 0 is the middle of the period. To set the duty cycle to 0 percent, the timer channel value registers must equal a negative value or 0. For a 100 percent duty cycle setting, the value in the timer channel value registers must be greater than that in the timer channel modulus registers.
Center-aligned PWM Registers CPWMS in TPMSC = 1 Let s take a look at the TPM registers that affect center-aligned PWM configuration. The period of the PWM signal is equal to 2 times the setting in the modulus registers, effectively giving these registers a usable range of $0001 to $7FFE. Zero is a special case that should not be used in center-aligned PWM mode, and $7FFF can be used only if a 100 percent duty cycle is unnecessary. The duty cycle, or pulse width, is equal to two times the timer channel value registers. The polarity of the signal is determined by the setting in the Edge/Lvl Select B and A control bits in the TPM channel status and control register. For now, we will set these bits to 10, which will clear the output signal on a compare while the counter is counting up and set it on a compare while the counter is counting down. You should also note that you can enable interrupts in centeraligned PWM mode.
Conceptual View After configuring the TPM module for the center-aligned PWM function, when the value in the 16-bit counter equals that of the timer channel value register, if the counter was counting up, the programmed output signal transition (in this case, a clear output on compare counting up), is forced on the signal pin. If the counter was counting down, the opposite signal transition would occur. When the value in the 16- bit counter equals that of the modulus registers, an overflow is forced, and if interrupts are set, the user may change the duty cycle in the interrupt service routine and this change will be synchronized with the next counter overflow. Always remember to clear the interrupt flag in the service routine by first reading the flag and then writing a 0 to it.
Question Take a moment to examine the setting in the registers below. Select the function that they best represent and then click Done. a. Input capture b. Output compare c. Center-aligned PWM function d. Edge-aligned PWM CPWMS in TPMSC = 0 Consider this question concerning TPM register configurations. Correct. The settings in the Edge/Lvl Select B and A control bits in the TPM channel status and control register determine the polarity of the signal. In this example, these bits are set to 10, which will clear the output signal on a compare and set it when the counter overflows.
Course Summary TPM module features Configuration: Output compare Input capture Edge-aligned PWM Center-aligned PWM GB60 Data Sheet www.freescale.com/files/microcontrollers/doc/data_sheet/mc9s08gb60.pdf In this course, you learned about the S08 TPM interface module. First, you examined the main features of the TPM module. For example, you learned that each channel in the TPM module could be individually configured for input capture, output compare, or buffered edge-aligned PWM. Alternatively, all the channels in one of these modules could be configured for buffered centeraligned PWM. You then examined the configuration and usage of the TPM module in detail. You ve learned how to set up and perform output compare and input capture functions. You can use the input capture function to measure an input period, and you can use the output compare function to generate a variable output frequency. You also learned about the edge-aligned and center-aligned PWM functions. For each function, you learned how to set the bits in the TPM channel status and control register. Remember that the only TPM function that requires the CPWMS bit in the TPM channel status and control register to be set is center-aligned PWM. If you have more questions, please refer to the GB60 data sheet for a more detailed explanation.