Presettable Up/Down Counter High-Voltage Silicon-Gate CMOS

Similar documents
8-Stage Static Bidirectional Parallel/ Serial Input/Output Bus Register High-Voltage Silicon-Gate CMOS

HCF4029B PRESETTABLE UP/DOWN COUNTER BINARY OR BCD DECADE

Quad 2-Input Data Selectors/Multiplexer

Quad 2-Input Data Selector/Multiplexer with 3-State Outputs High-Performance Silicon-Gate CMOS

8-BIT SERIAL-INPUT SHIFT REGISTER WITH LATCHED 3-STATE OUTPUTS High-Performance Silicon-Gate CMOS

Quad 2-Input NAND Gate High-Voltage Silicon-Gate CMOS

NTE40192B & NTE40193B Integrated Circuit CMOS, Presettable Up/Down Counters (Dual Clock with Reset)

Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS

Presettable Counter High-Speed Silicon-Gate CMOS

Presettable 4-Bit Binary UP/DOWN Counter High-Speed Silicon-Gate CMOS

Phase-Locked Loop High-Performance Silicon-Gate CMOS

Analog Multiplexer Demultiplexer

10 U.L. 5 (2.5) U.L. LOGIC SYMBOL LS90 LS92 LS VCC = PIN 5 GND = PIN 10 NC = PINS 4, 13 GND = PIN 10 NC = PINS 2, 3, 4, 13

Presettable 4-Bit Binary UP/DOWN Counter High-Speed Silicon-Gate CMOS

EN: This Datasheet is presented by the m anufacturer. Please v isit our website for pricing and availability at ore.hu.

14 STAGE BINARY COUNTER/OSCILLATOR

Synchronous Binary Counter with Synchronous Clear

SN54/74LS390 SN54/74LS393 DUAL DECADE COUNTER; DUAL 4-STAGE BINARY COUNTER DUAL DECADE COUNTER; DUAL 4-STAGE BINARY COUNTER FAST AND LS TTL DATA 5-544

Low Power Low Offset Voltage Dual Comparators

8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS

M74HC160TTR SYNCHRONOUS PRESETTABLE 4-BIT COUNTER

Obsolete Product(s) - Obsolete Product(s)

HCF40103B 8-STAGE PRESETTABLE SYNCHRONOUS 8 BIT BINARY DOWN COUNTERS

description/ordering information

HCF40161B SYNCHRONOUS PROGRAMMABLE 4-BIT BINARY COUNTER WITH ASYNCHRONOUS CLEAR

The data sheets contained in this book were the most current available as of the date of publication, April 1998.

DATASHEET HD Features. Ordering Information. CMOS Programmable Bit Rate Generator. FN2954 Rev 2.00 Page 1 of 8. August 24, FN2954 Rev 2.

Octal 3-State Noninverting Transparent Latch High-Performance Silicon-Gate CMOS

74HCT157. Quad 2 Input Data Selectors / Multiplexers. High Performance Silicon Gate CMOS

Quad Single Supply Comparator

8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Speed Silicon-Gate CMOS

DM74LS191 Synchronous 4-Bit Up/Down Counter with Mode Control

High Performance Silicon Gate CMOS

DM74LS161A DM74LS163A Synchronous 4-Bit Binary Counters

DATASHEET CD4029BMS. Features. Description. Applications. Functional Diagram. Pinout. CMOS Presettable Up/Down Counter. FN3304 Rev 0.

MC14513B. BCD To Seven Segment Latch/Decoder/Driver

M74HC191TTR 4 BIT SYNCHRONOUS UP/DOWN COUNTERS

NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package.

74AC161B SYNCHRONOUS PRESETTABLE 4-BIT COUNTER

Obsolete Product(s) - Obsolete Product(s)

High Performance Silicon Gate CMOS

MM74HC221A Dual Non-Retriggerable Monostable Multivibrator

CD4541BC Programmable Timer

DS1866 Log Trimmer Potentiometer

P54FCT374/74fct374 NON-INVERTING OCTAL D FLIP-FLOP WITH 3-STATE OUTPUTS FEATURES DESCRIPTION

P4C150 ULTRA HIGH SPEED 1K X 4 RESETTABLE STATIC CMOS RAM

M74HC393TTR DUAL BINARY COUNTER

HCF4018B PRESETTABLE DIVIDE-BY-N COUNTER

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4521BP

MARKING DIAGRAMS 16 MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 1.) ORDERING INFORMATION PDIP 16 P SUFFIX CASE 648

DM74ALS169B Synchronous Four-Bit Up/Down Counters

Obsolete Product(s) - Obsolete Product(s)

M74HC107TTR DUAL J-K FLIP FLOP WITH CLEAR

DM74AS169A Synchronous 4-Bit Binary Up/Down Counter

. HIGH SPEED .LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M54/M74HC192 M54/M74HC193

MC14040B. MARKING DIAGRAMS. MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.) ORDERING INFORMATION PDIP 16 P SUFFIX CASE 648

FAST CMOS OCTAL D REGISTERS (3-STATE)

MC14541B. Programmable Timer

M74HC165TTR 8 BIT PISO SHIFT REGISTER

M74HC175TTR QUAD D-TYPE FLIP FLOP WITH CLEAR

MC74LVXT8053. Analog Multiplexer / Demultiplexer. High Performance Silicon Gate CMOS

TC4015BP,TC4015BF TC4015BP/BF. TC4015B Dual 4-Stage Static Shift Register (with serial input/parallel output) Pin Assignment. Truth Table

Sales: Technical: Fax:

HCF4527B BCD RATE MULTIPLEXER

. HIGH SPEED .LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M54/74HC40102 M54/74HC STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS

TC4538BP,TC4538BF TC4538BP/BF. TC4538BP/TC4538BF Dual Precision Retriggerable/Resettable Monostable Multivibrator. Features.

MC74LVX8051. Analog Multiplexer/ Demultiplexer High Performance Silicon Gate CMOS

M74HC690TTR DECADE COUNTER/REGISTER (3-STATE)

TC74HC4020AP, TC74HC4020AF TC74HC4040AP, TC74HC4040AF

HCF4015B DUAL 4-STAGE STATIC SHIFT REGISTER WITH SERIAL INPUT/PARALLEL OUTPUT

Obsolete Product(s) - Obsolete Product(s)

TC74AC390P, TC74AC390F

MC14514B, MC14515B. 4-Bit Transparent Latch / 4-to-16 Line Decoder

HCF4017B DECADE COUNTER WITH 10 DECODED OUTPUTS

TC74HC175AP,TC74HC175AF,TC74HC175AFN

M74HC74TTR DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR

Obsolete Product(s) - Obsolete Product(s)

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

74AC299 74ACT299 8-Input Universal Shift/Storage Register with Common Parallel I/O Pins

TC74HC273AP,TC74HC273AF,TC74HC273AFW

PIN CONNECTION AND IEC LOGIC SYMBOLS

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

TC74HC423AP,TC74HC423AF

M74HC273TTR OCTAL D TYPE FLIP FLOP WITH CLEAR

M74HC164TTR 8 BIT SIPO SHIFT REGISTER

M74HC4518TTR DUAL DECADE COUNTER

CD4538 Dual Precision Monostable

TC74HC374AP,TC74HC374AF,TC74HC374AFW

M74HC299TTR 8 BIT PIPO SHIFT REGISTER WITH ASYNCHRONOUS CLEAR

Low Power Quad Operational Amplifier

HCF40100B 32-STAGE STATIC LEFT/RIGHT SHIFT REGISTER

MM74HC00 Quad 2-Input NAND Gate

TC74HC4094AP, TC74HC4094AF

MC74LVX8051. Analog Multiplexer / Demultiplexer. High Performance Silicon Gate CMOS

HCF4094B 8 STAGE SHIFT AND STORE BUS REGISTER WITH 3-STATE OUTPUTS

SN54/74LS196 SN54/74LS197 4-STAGE PRESETTABLE RIPPLE COUNTERS 4-STAGE PRESETTABLE RIPPLE COUNTERS FAST AND LS TTL DATA 5-372

74F160A 74F162A Synchronous Presettable BCD Decade Counter

Low Power Dual Operational Amplifier

Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS

8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Speed Silicon-Gate CMOS

Transcription:

TECNICA DATA IW029B Presettable Up/Down Counter igh-voltage Silicon-Gate CMOS The IW029B coists of a four-stage binary or BCD-decade up/down counter with provisio for look-ahead carry in both counting modes. The inputs coists of a single COCK, CARRY IN,(COCK ENABE), BINARY/DECADE, UP/DOWN, PRESET ENABE, and four individual JAM signals. Q1, Q2, Q3, Q and a CARRY OUT signal are provided as outputs. A high PRESET ENABE signal allows information on the JAM INPUTS to preset the counter to any state asynchronously with the clock. A low on each JAM line, when the PRESET-ENABE signal is high, resets the counter to its zero count. The counter is advanced one count at the positive traition of the clock when the CARRY IN and PRESET ENABE signals are low. Advancement is inhibited when the CARRY IN or PRESET ENABE signals are high. The CARRY OUT signal is normally high and goes low when the counter reaches its maximum count in the UP mode or the minimum count in the DOWN mode provided the CARRY IN signal is low. The CARRY IN signal in the low state can thus be coidered a COCK ENABE. The CARRY IN terminal must be connected to GND when not in use. Binary counting is accomplished when the BINARY/DECADE input is high; the counter counts in the decade mode when the BINARY/DECADE input is low. The counter counts up when the UP/DOWN input is high, and down when the UP/DOWN input is low. Parallel clocking provides synchronous control and hence faster respoe from all counting outputs. Ripple-clocking allows for longer clock input rise and fall times. Operating Voltage Range: 3.0 to 18 V Maximum input current of 1 μa at 18 V over full packagetemperature range; 0 na at 18 V and 25 C Noise margin (over full package temperature range): 1.0 V min @ V supply 2.0 V min @.0 V supply 2.5 V min @.0 V supply OGIC DIAGRAM ORDERING INFORMATION IW029BN Plastic IW029BD SOIC T A = -55 to 125 C for all packages PIN ASSIGNMENT PIN 16=V CC PIN 8= GND

MAXIMUM RATINGS * Symbol Parameter Value Unit V CC DC Supply Voltage (Referenced to GND) -0.5 to +20 V V IN DC Input Voltage (Referenced to GND) -0.5 to V CC +0.5 V V OUT DC Output Voltage (Referenced to GND) -0.5 to V CC +0.5 V I IN DC Input Current, per Pin ± ma P D Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ P D Power Dissipation per Output Traistor 0 mw Tstg Storage Temperature -65 to +0 C T ead Temperature, 1 mm from Case for Seconds (Plastic DIP or SOIC Package) 2 C * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditio. +Derating - Plastic DIP: - mw/ C from 65 to 125 C SOIC Package: : - 7 mw/ C from 65 to 125 C 7 0 mw RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit V CC DC Supply Voltage (Referenced to GND) 3.0 18 V V IN, V OUT DC Input Voltage, Output Voltage (Referenced to GND) 0 V CC V T A Operating Temperature, All Package Types -55 +125 C This device contai protection circuitry to guard agait damage due to high static voltages or electric fields. owever, precautio must be taken to avoid applicatio of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, V IN and V OUT should be cotrained to the range GND (V IN or V OUT ) V CC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V CC ). Unused outputs must be left open.

DC EECTRICA CARACTERISTICS(Voltages Referenced to GND) V CC Guaranteed imit Symbol Parameter Test Conditio V -55 C 25 C 125 C V I Minimum igh-evel Input Voltage V I Maximum ow - evel Input Voltage V O V O I IN I CC I O I O Minimum igh-evel Output Voltage Maximum ow-evel Output Voltage Maximum Input eakage Current Maximum Quiescent Supply Current (per Package) Minimum Output ow (Sink) Current Minimum Output igh (Source) Current V OUT = 0.5 V or V CC - 0.5V V OUT = 1.0 V or V CC - 1.0 V V OUT = 1.5 V or V CC - 1.5V V OUT = 0.5 V or V CC - 0.5V V OUT = 1.0 V or V CC - 1.0 V V OUT = 1.5 V or V CC - 1.5V V IN =GND or V CC V IN =GND or V CC 3.5 7 11 1.5 3.95 9.95 1.95 3.5 7 11 1.5 3.95 9.95 1.95 3.5 7 11 1.5 3.95 9.95 1.95 Unit V IN = GND or V CC 18 ±0.1 ±0.1 ±1.0 μa V IN = GND or V CC 20 V IN = GND or V CC U O =0. V U O =0.5 V U O =1.5 V V IN = GND or V CC U O =2.5 V U O =.6 V U O =9.5 V U O =13.5 V 5 20 0 0.6 1.6.2-2 -0.6-1.6 -.2 5 20 0 0.51 1.3 3. -1.6-0.51-1.3-3. 0 0 0 00 0.36 0.9 2. -1. -0.36-0.9-2. V V V V μa ma ma

AC EECTRICA CARACTERISTICS (C =pf, R =kω, Input t r =t f =20 ) V CC Guaranteed imit Symbol Parameter V -55 C 25 C 125 C Unit t max Maximum Clock Frequency t P, t P t P, t P t P, t P t P, t P t P, t P t T, t T Maximum Propagation Delay, Clock to Q Maximum Propagation Delay, Clock to Carry Output Maximum Propagation Delay, Preset Enable to Q Maximum Propagation Delay, Preset Enable to Carry Output Maximum Propagation Delay, Carry Input to Carry Output Maximum Output Traition Time, Any Output 2 5.5 0 20 5 2 190 70 1 290 2 30 0 0 80 2 5.5 0 20 5 2 190 70 1 290 2 30 0 0 80 1 2 2.75 00 80 3 1120 520 380 90 00 320 1280 580 20 680 280 00 1 C IN Maximum Input Capacitance - 7.5 pf Mz FUNCTION TABE CONTRO INPUT OGIC EVE ACTION BIN/DEC (B/D) UP/DOWN (U/D) PRESET ENABE (PE) CARRY IN (CI) (COCK ENABE) BINARY COUNT DECADE COUNT UP COUNT DOWN COUNT JAM IN NO JAM NO COUNTER ADVANCE AT POS. COCK TRANSITION ADVANCE COUNTER AT POS. COCK TRANSITION

TIMING REQUIREMENTS (C =pf, R = kω, Input t r =t f =20 ) * V CC Guaranteed imit Symbol Parameter V -55 C 25 C 125 C Unit t w Minimum Pulse Width, Clock t w t su * t rem * t h ** t su t r, t f ** Minimum Pulse Width, Preset Enable Minimum Setup Time, Clock to B/D or U/D Minimum Removal Time, Preset Enable (Figure 1) Minimum old Time, Clock to Carry In (Figure 2) Minimum Setup Time, Carry In to Clock Maximum Input Rise and Fall Times,Clock (Figure 2) 90 1 70 30 0 1 80 25 70 90 1 70 30 0 1 80 25 70 From Up/Down, Binary/Decode, Carry In, or Preset Enable Control Inputs to Clock Edge. ** From Carry In to Clock Edge 3 120 2 0 680 280 00 220 1 0 00 120 μs

Figure 1. Switching Waveforms Figure 2. Switching Waveforms

TIMING DIAGRAM; binary mode; J1=IG; J2=OW; BIN/DEC=IG TIMING DIAGRAM; decade mode; J1=OW; J=OW; BIN/DEC=OW

EXPANDED OGIC DIAGRAM TRUT TABE COCK TE PE J Q Q X X X Q Q X X X Q Q NC X X Q Q NC

N SUFFIX PASTIC (MS - 001BB) A 16 1 G F 0.25 (0.0) M T 9 8 D N B C -T- K SEATING PANE NOTES: 1. imeio A, B do not include mold flash or protrusio. Maximum mold flash or protrusio 0.25 mm (0.0) per side. M J Dimeio, mm Symbol MIN MAX A 18.67 19.69 B 6. 7.11 C 5.33 D 0.36 0.56 F 1.1 1.78 G 2.5 7.62 J 0 K 2.92 3.81 7.62 8.26 M 0.20 0.36 N 0.38 D SUFFIX SOIC (MS - 012AC) 16 A 9 Dimeio, mm -T- 1 D G 0.25 (0.0) M T C M 8 B K P C SEATING PANE J R x 5 NOTES: 1.Dimeio A and B do not include mold flash or protrusion. 2.Maximum mold flash or protrusion 0. mm (0.006) per side for A, for B - 0.25 mm (0.0) per side. F M Symbol. MIN MAX A 9.80.0 B 3.80.00 C 1.35 1.75 D 0.33 0.51 F 0.0 1.27 G 1.27 5.72 J 0 8 K 0. 0.25 M 0.19 0.25 P 5.80 6.20 R 0.25 0.